IPHONE 5C A SP1 RF - WordPress.com · 2017-05-22 · bs2 bs1 bs3 c1 c10 c100 c101 c102 c103 c104...
Transcript of IPHONE 5C A SP1 RF - WordPress.com · 2017-05-22 · bs2 bs1 bs3 c1 c10 c100 c101 c102 c103 c104...
C1_RF
C10_RF
C102_RF
C103
_RF
C104
_RF
C106_RF
C107
C107
_RF
C108_RF
C1
09
C109_RF
C11
C11_RF
C110_RF
C111
_RF
C114
C11
5
C118_RF
C119_RF
C12_RF
C120_RF
C1201
_RF
C1214_RF
C121
5_RF
C126
_RF
C127_RF
C13_RF
C130
C133
C135
C137
C138
C143
C145_RF
C147
C148_RF
C1
49
C149_RF
C150
C151
C15
2
C153
C153_RF
C154
C156
C156_RF
C1
6
C162
C163
C163_RF
C164
_RF
C165
C165_RF
C166
C167
_RF
C168_RF
C169
C169_RF
C17
C170
C170_RF
C1
71
C1726_RF
C173
C174
C185C1
87
C1
89
C189_RF
C1
90
C190_RF
C1
95
C195
_RF
C2_RF
C200_RF
C201
_RF
C202_RF
C2
03
C203_RF
C2
04
C2
05
C207
C208
_RF
C2
09
C210_RF
C212_RF
C213
C214
C214_RF
C215_RF
C216_RF
C217
C217_RF
C2
18
C2
19
C220
C221
C222
C223
C224
C225
C226C226_RF
C227
C227_RF
C228
C228_RF
C229
C229_RF
C230
C230_RF
C231
C231_RF
C2
32
C232_RF
C2
33
C233_RF
C2
34
C234_RF
C235
C236
C236
_RF
C237
C237_RF
C238
C238_RF
C239
C239_RF
C240_RF
C242_RF
C2
43
C243_RF
C2
45
C246
C2
47
C247_RF
C2
48
C248_RF
C249_RF
C2
50
C250_RF
C251
C251_RF
C252
C252_RF
C253_RF
C254
C254
_RF
C255
C256_RF
C2
57
C257
_RF
C258
C2
6
C2
60
C261
C2
62
C263
C2
64
C2
65
C267
C27
C2
71
C2
73
C2
76
C277
C2
78
C2
81
C281_RF
C2
82
C283_RF
C2
85
C2
88
C2
9
C2
90
C2
91
C2
92
C2
93
C2
94
C295
C2
97
C2
99
C3
C3_R
F
C301
C302
C3
04
C305
C306
C307
C3
10
C312
C3
15
C317
C318
C3
19
C320C321
C322
C323
C325
C326
C328
C329
C330
C3
32
C333
C334
C3
35
C336
C337
C338
C339
C34
C3
40
C341
C342
C344 C345
C346
C347
C348
C349
C360
C363
C364
C365
C368
C3
69
C370
C371
C372
C3
78
C3
79
C3
8
C38_RF
C3
85
C3
86
C3
87
C389
C3
9
C39_RF
C391
C392
C3
94
C3
96
C4
C4_RF
C40_
RF
C41_RF
C412
C413
C4
14C416
C42_RF
C420
C421
C422
C424
C4
25
C429
C43_RF C44_RF
C444
C45_RF
C46_RF
C4
7
C47_RF
C48_RF
C488
C49_RF
C5_RF
C5
0
C50_RF
C500
C501
C51_RF
C52
C52_RF
C53_RF
C54
C54_RF
C55
C55_RFC56_RF
C562
C57_RF
C58_
RF
C59
C59_RF
C6
C6_RF
C605
C61
C62
7
C63_
RF
C64
C65
C65_RF
C66_RF
C662
C67_RF
C68
C686
C687
C688
C689
C69
C7
C7_RF
C73
C74
C746
C762
C77
C79
C8_R
F
C9_
RF
C918
C92
C93_RF
C9
35
C942
C95
C96_RF
C961
C962
C97
C97_RF
C98
C98_RF
C987
C99
C99_RF
C997
D1
D2
D4
D5
DZ
4
FL1_RF
FL10_RF
FL1701_RF
FL6
FL9
FL96
J10_RF
J5_RF
J6_RF
L1_RF
L10_RF
L11
L11_RF
L12_RF
L13_RF
L16_
RF
L17
L17_RF
L173
2_RF
L18_RF
L19L19_RF
L2_R
F
L21
L21_RF
L3
L3_RF
L33_RF
L4
L4_RF
L44_RF
L5
L5_RFL6_R
F
L66_RF
L67_RFL68_RF
L69_RF
L7_R
F
L70_RF
L71_
RF
L72_RF
L73_RF
L74_RF
L75_RF
L77_
RF
L8_RF
L9_RF
Q2
Q3
Q4
Q5
R1
0
R100
R102
R103
R129
R13_RF
R136
R145
R15
R1
7
R20_
RF
R21_
RF
R22_RF
R23_RFR24_
RF
R25_RF
R26
R26_RF
R27_RF
R28_
RF
R29_RF
R3_RF
R30_RF
R34_RF
R35
R463
R488
R5_RF
R5
0
R5
4
R5
5
R55_
RFR
56
R5
8
R5
9
R592
R593
R594
R6
0
R6
5
R66
R73
R7
4
R8
3R8
4
R84
01
R857
R8
6
R9
0
SH3
SP1_RF
U11
U11_RF
U12
U12_
RF
U1317_RF
U14
U14_RF
U15
U17
U18
U2
U2_RF
U200
0_RF
U207_RF
U21U22
U23
U23_
RF
U3
U4
U5_R
F
U58_
RF
U7
U7_RF
U8
U8_RF
Y1_RF
Y2
IPHONE 5C A
BS1BS2
BS3
C1
C1
0
C1
00
C101
C102
C103
C104
C105
C105
_RF
C106C
108
C1
11
C11
2
C113
C11
7
C1
18
C119
C12
C1201
C121_RF
C123
C125_RF
C12
7
C1
28
C128_RF
C13
C132
C134
C136
C139
C14
C14_RF
C140
C141
C142
C144
C144_RF
C145
C146
C147_RF
C148
C15
C15_RF
C1
55
C157
C158
C159
C16_RF
C1
61
C16
4
C167
C168
C17_RF
C17
2
C175
C176
C177
C177_RF
C178
C179
C18
C18_RF
C181
C182
C183
C183_RF
C184_RF
C185_RF
C186_RF
C187_RF
C188
C188_RF
C1
9
C19_RF
C191
C192
C193
C193_RF
C194
C196
C197
C198
C199
C2
C2
0
C20_RF
C200
C201
C202
C206
C208
C2
1
C21_RF
C210
C211
C212
C215
C216
C2
2
C22_RF
C2
3
C23_RF
C2307
C2
4
C24_RF
C240
C241
C242
C244
C245_RF
C246
_RF
C249
C2
5
C25_RF
C253
C255_RF
C256
C259
C26_RF
C266
C268C27_RF
C274
C275
C279
C28
C28_RF
C282_RF
C284
C286
C287
C29_RF
C2
96
C298
C30
C30_RF
C300
C303
C3
08
C3
1
C311
C313
C314
C3
16
C3
2
C32_RF
C324
C327
C33_RF
C3
31
C34_RF
C343
C3
5
C35_RF
C350
C351 C352 C353
C355
C357
C358
C359
C36
C36_RF
C361
C37
C37_RF
C373
C376
C380
C381
C388
C390
C397
C398
C399
C4
0
C402
C407
C4
1
C410
C42
C427
C4
3
C430
C432
C433
C434
C435
C436
C437
C438
C44
C441
C4
5
C46
C48
C4
9
C5
C53
C56
C57
C58
C60
C61_
RFC
610
C62
C62_
RF
C63
C66
C67
C68_RF
C69_RF
C70
C70_RF
C71
C71_RFC
72
C72_
RF
C73_RF
C74_RF
C745
C75
C75_RF
C76
C76_RF
C78
C78_RF
C79_RF
C8
C80
C80_RF
C8
1
C81_RF
C82
C82_RF
C83
C83_RF
C8
4
C85
C85_RF
C855
C86
C86_RF
C87
C87_
RF
C878
C879
C88
C88_
RF
C883
C89
C89_RF
C9
C9
0
C90_
RF
C91
C91_
RF
C913
C914
C92_
RF
C93
C9
4
C953
C9
6
CL1
D3
DZ1
DZ10
DZ11
DZ12
DZ
16
DZ17
DZ2
DZ23
DZ
24
DZ3
DZ5
DZ6
DZ7
DZ75
DZ76 DZ9
FL1
FL10
FL11
FL12
FL13
FL14
FL15
FL16
FL17
FL18
FL2
FL2_RF
FL20
FL21
FL22
FL23
FL2302
FL24
FL25
FL26
FL27
FL28
FL29
FL
3
FL30
FL31
FL34
FL35
FL36
FL38
FL39
FL4
FL4_
RF
FL40
FL43
FL44
FL45
FL46
FL47
FL48
FL49
FL495
FL5
FL51
FL52
FL53
FL57
FL58
FL6_RF
FL60
FL61
FL68
FL69FL7
FL7
51F
L752
FL7
53
FL8
FL9_RF
J1
J1
1_
RF
J2
J3
J4
J4_RF
J5
J6
J7
L1
L10
L14_
RF
L15_RF
L2
L20_RF
L22_RF
L25_RF
L27
L28
L2
9
L33 L34
L35
L36
L36_
RF
L37
L37_
RF
L38
L38_
RF
L39
L39_
RF
L45_RF
L46_
RF
L49_RF
L50_RF L51_RF
L52_RF
L53_
RF
L54_RF
L55_RF
L6
L64_RF
L65_
RF
L7
L78_RF
L79_RF
L8 L9
Q1
Q7
R1
R10_RF
R107
R108
R11
R110
R1
2
R12_RF
R13
R130
R137
R14
R143
R15_RF
R16
R16_RF
R17_RF
R1
8
R18_RF
R1
9
R19_RF
R2
R20
R2
1
R22
R24
R2
5
R2
7
R2
8
R2
9
R3
R3
1
R3
2R33
R33_
RF
R3
4
R35_
RF
R36
R3
7
R38
R3
9
R4_
RF
R40
R4
1
R4
2
R43_RF
R44_
RF
R45
R4
6
R46_RF
R47
R47_RF
R48_RF
R5
R51_RF
R5
2
R52_
RF
R5
3
R53_RF
R57
R6
R6_RF
R67
R7
R7_RF
R7
1
R72
R7
8
R7
9
R8
R8
2
R8
5
R9_RF
R9
1
R9
2
R921
R9401
R953
SH1
SH2
SP3_RF
U1
U1_RF
U13
U16
U16_RF
U20_RF
U25
U3_RF
U5
U6_RF
U9_
RF
Y1
IPHONE 5C B
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
PROPRIETARY PROPERTY OF APPLE INC.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
DESCRIPTION OF REVISIONCKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
THE INFORMATION CONTAINED HEREIN IS THE
C
A
D
DATE
R
SHEET
Apple Inc.
THE POSESSOR AGREES TO THE FOLLOWING:
DRAWING TITLE
DSIZE
REVISION
DRAWING NUMBER
BRANCH
REV ECN
7
B
3
II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
IV ALL RIGHTS RESERVEDIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEMTABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
BOARD_ID RADIO BOM OPTIONS
COMPASS BOM OPTIONS
NAND BOM OPTIONS
TO DO: CLEANUP ALTERNATES FOR X155
ALTERNATES X155 BOM CALLOUTS
HORIZONTAL CAP BOM OPTIONS
SCH 051-9584BRD 820-3329
BOM 639-3796 X155
TRISTAR BOM OPTIONS
X155 PROTO1 SINGLE_BRD
GYRO BOM OPTIONS
CHESTNUT BOM OPTIONS
1 OF 46
Mon Oct 8 11:06:07 2012
2012-10-14ENGINEERING RELEASED
1 OF 23
2.0.0
051-9584
2 0001669557
138S0801 5 HRZN CAPS_1:10UF,0402,6.3V HRZN_CAP_GRP6C386,C387,C333,C332,C335 Y
Y2 C52,C156 HRZN_CAP_GRP11HRZN CAPS_1:10UF,0402,10V138S0794
4.7UF 0.55MM HEIGHT LOW_Z_CAPC193138S0582 1 Y
138S0801 HRZN_CAP_GRP2C293,C294,C257,C299,C262HRZN CAPS_1:10UF,0402,6.3V5 Y
138S0801 HRZN CAPS_1:10UF,0402,6.3V C205,C243,C247,C252,C297 HRZN_CAP_GRP55 Y
HRZN CAPS_1:10UF,0402,6.3V138S0801 HRZN_CAP_GRP73 C42_RF,C43_RF,C44_RF Y
12 12 N/AN/AAGATHA PMU(1/2)
11 11 N/AN/ACG FLEX B2B
L67 AUDIO CODEC (2/2)10 10 N/AN/A
H5P SOC/CPU/SRAM PWR N/A5 5 N/A
SCH,SINGLE_BRD,X155
HRZN CAPS_1:10UF,0402,6.3V138S0801 C182,C307,C209,C1874 HRZN_CAP_GRP10Y
HRZN CAPS_1:10UF,0402,6.3V5138S0801 HRZN_CAP_GRP3C264,C378,C189,C203,C245 Y
C190,C204,C239,C246,C195138S0801 HRZN CAPS_1:10UF,0402,6.3V HRZN_CAP_GRP4Y5
COMPASS_POPU16639-4024 1 YST GYRO - COMPASS POP
H5P IO POWER4 4 N/AN/A
DATECSA PAGE SYNC MASTERCONTENTSPDF PAGE
2 N/AN/AH5P JTAG, USB ,PLL2
339S0176339S0177 H5P ALTERNATEALTERNATE ?
?339S0178 339S0176 ALTERNATE H5P ALTERNATE
BUTTON FLEX B2B N/AN/A88
HRZN CAPS_1:10UF,0402,6.3V138S0801 HRZN_CAP_GRP8C1201_RF1 Y
H5P W/ NAND N/A6 6 N/A
118S0626 100K 1% 01005 Y1 R25_RF N53_CFG_B
499K 1% 01005118S0650 Y1 N49_CFG_AR26_RF
267K 1% 01005118S0623 Y1 R26_RF N53_CFG_B
162K 1% 01005118S0726 N53_CFG_AY1 R26_RF
118S0621 Y1.00M 1% 01005 R25_RF N51_CFG_A1
R26_RF50K 1% 01005118S0732 Y1 N51_CFG_A
118S0626 100K 1% 01005 Y1 N49_CFG_AR25_RF
338S1158 U8 Y GYRO_ST1 ST GYRO
138S0652138S0648 4.7UF CERM 0402 6.3VALTERNATE ?
LABEL FOR X155 639-3796 EEEE_16G825-6838 Y1 EEEE_F284N/AH5P GPIO & CONTROL3 N/A3
14 14 CHESTNUT + BACKLIGHT DRIVER N/A N/A
18 18 N/AN/AD404 (TOUCH B2B, DRIVER ICS)
1717 N/ADOCKFLEX B2B N/A
15 15 N/AN/ASPKR AMP + LED DRIVER
N/A13 13 N/AAGATHA PMU(2/2)
L67 AUDIO CODEC (1/2) N/A9 9 N/A
N/A19 19 N/ALCM CONNECTOR
21 21 N/ACAM0 CONNECTOR N/A
20 20 N/ASENSORS N/A
?YSCH051-9584 1 SCH, SINGLE_BRD, X155
1 ?YPCB820-3329 PCB, SINGLE_BRD, X155
N/A22 22 N/ABATT B2B, TPS, PD FEATURES
50K 1% 01005118S0732 N49_CFG_BY1 R25_RF
1.00M 1% 01005118S0621 N49_CFG_BY1 R26_RF
118S0626 100K 1% 01005 Y1 N48_CFG_BR26_RF
N48_CFG_BR25_RF147K 1% 01005 Y1118S0689
R25_RF Y N48_CFG_A255K 1% 010051118S0659
118S0626 1 Y100K 1% 01005 R26_RF N48_CFG_A
470K 5% 01005 R25_RF117S0159 Y1 N51_CFG_B
7 7 N/AH5P VIDEO N/A
R26_RF100K 1% 01005 Y1 N51_CFG_B118S0626
N53_CFG_A118S0626 1 100K 1% 01005 YR25_RF
335S0878 Y1 U4 NAND_16GNAND,19NM,16GX8,MLC,PPN1.5
N/A23 23 RADIO_MLB HIERARCH. SYMBOL N/A
Y1 TI CHESTNUT U3 CHESTNUT_TI338S1172
152S1649 1 YL19 CHESTNUT_TITI CHESTNUT - 1.5 UH IND
152S1611 1 INTERSIL CHESTNUT -2.2 UH IND L19 Y CHESTNUT_INTERSIL5 C422,C74,C92,C250,C265 HRZN_CAP_GRP1HRZN CAPS_1:10UF,0402,6.3V138S0801 Y
338S1168 U3 Y CHESTNUT_INTERSIL1 INTERSIL CHESTNUT
16 16 N/ATRISTAR N/A
1 GYRO_STC11 Y132S0391 ST GYRO - CP CAP
U2 TRISTAR1 CBTL1608A1UK,WCSP,TRISTAR343S0614 Y
CBTL1610A0UK,WCSP,TRISTAR21 TRISTAR2U2343S0639 Y
118S0671 2 RES 15OHM 01005 5% R102,R103 TRISTARY
2 RES 200HM 01005 5%117S0202 R102,R103 TRISTAR2Y
IPHONE 5C 原理图
FAST_SCAN_CLK
HOLD_RESET
USB_ASW_VSS18
USB_ID
USB_ANALOGTEST
USB_DMUSB_DP
USB11_DMUSB11_DP
USB_BRICKID
TST_STPCLK
JTAG_TRST*
HSIC3_DATA
XI0
WDOG
VDD_ANA_PLLUSB
VDD_ANA_PLL7
VDD_ANA_PLL6
VDD_ANA_PLL5
VDD_ANA_PLL4
VDD_ANA_PLL3
VDD_ANA_PLL2
VDD_ANA_PLL1
USB_VDD330
USB_DVDD
USB_ASW_VDD18
TST_CLKOUT
TESTMODE
JTAG_TRTCK
JTAG_TDO
JTAG_SEL
HSIC1_DVDD101
HSIC_VDD123
HSIC_VDD122
HSIC_VDD121
HSIC2_DVDD102
HSIC3_DVDD103
VDD_ANA_PLL0
HSIC3_STB
HSIC2_STB
CPU0_SWITCH
XO0
USB_VBUS
HSIC1_STBHSIC1_DATA
HSIC_VSS121
HSIC_VSS122
DDR1_CKEINDDR0_CKEINCFSB
FUSE1_FSRCUSB_REXT
RESET*
JTAG_TCKJTAG_TMSJTAG_TDI
CPU1_SWITCH
USB_BRICKID_DM_MON
USB_VSSA0
USB_VSSA0
USB_VSSA0
HSIC2_DVSS
HSIC1_DVSS
HSIC_VSS123
HSIC3_DVSS
HSIC2_DATA
SYM 1 OF 12
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
FINAL XTAL PASSIVES 11/30/2011
(22MA)
(28MA)
(1MA)
(1MA)
(1MA)
(2X 1MA)
(3X 2.7MA)
(5.4MA)
(3X 11.9MA)
(2X 1MA)
NO_CONNECT OKAY
(1MA)
USBHS ON/OFF TOLERANCE 5V/1.98V
SERIAL MODE NAMES
WLAN (TOP)
BASEBAND
(1MA)
1.8V TOLERANT
PLACE R49 AND C1 CLOSE TO EACH OTHER AND U1 PER EMC
01005
1%
MF
1/32W
1.00M
1/32W5%
1.00K
01005MF
X5R6.3V20%
0.22UF
0201
0.22UF
0201X5R
20%6.3V
01005MF
1%43.21/32W
10%
X5R-CERM
1000PF6.3V
01005
0.01UF
01005
10%
X5R6.3V
X5R01005
6.3V10%0.01UF
12PF
CERM16V5%
01005
12PF
5%
01005CERM16V
20%
X5R6.3V
0.22UF
0201
10%
NOSTUFF01005X5R6.3V
0.01UF
X5R0201
6.3V20%0.22UF
1.60X1.20MM-SM
24.000MHZ-30PPM-9.5PF-60OHM
SHORT-10L-0.1MM-SM
SMNO_XNET_CONNECTION=TRUE
100PF5%
01005NP0-C0G
10V
0.00
0% 010051/32W MF
01005
0.00
0%
MF1/32W
FCMSPH5P-SC58950C03
6.3V
01005NP0-C0G
5%56PF
CERM-X5R
20%6.3V
10UF
0402-1 0201X5R6.3V20%0.22UF
MF1/32W5%47.0K
01005
0.01UF6.3V10%
X5R01005
10%0.01UF
X5R6.3V
01005
SYNC_MASTER=N/A SYNC_DATE=N/A
H5P JTAG, USB ,PLL
XTAL_GND
90_AP_BI_TRISTAR_USB0_P
90_USBHS_H5P_N
90_AP_BI_TRISTAR_USB0_N
45_XTAL_24M_I
XTAL_24M_O_R
WDOG
CPU0_SWITCH
45_XTAL_24M_O
USB_VBUS_DETECT
CPU1_SWITCH
50_AP_BI_BB_HSIC1_DATA50_AP_BI_BB_HSIC1_STB
50_AP_BI_WLAN_HSIC3_DATA50_AP_BI_WLAN_HSIC3_STB
TRISTAR_TO_AP_JTAG_SWCLK
TRISTAR_BI_AP_JTAG_SWDIO
USB_REXT
90_USBHS_H5P_P
PP1V8
PP1V8
PP1V0
PP3V3_USB
AP_TO_PMU_TEST_CLKOUT
PP1V2
PP1V8_PLL
PP1V0
RESET_1V8_L
PP1V8
C341
2
C321
2
R7
12
R711 2
C2 1
2
C93 1
2
R61
2
C11
2
C211
2
C201
2
C361 2
C371 2
C3921
2
C331
2
C281
2
Y1
24
13
XW441 2
XW51 2
C141 1
2
R11 2
R301 2
U1
AV13
AR9AU10
K16N8
A19
R28
AP14
F34
M29
M28
F33
E34
K29
K28
E33
AV15
AK16
AL16
AU15
L29
J29
AK17
L28
J28
AL17
AN15
AM14
AM16AP15
AN16
AN13AM15
AV11
AT15
AR16AV10
D34C34
E27
G28
H28
F28
G27
A31A32
G29
E29
A30
F29
J26
H27
H26
H29
G19
J19
G18
J18
J21
G20
J20
G21
J22
AT13
A12A13
C351
2
C1281
2
C1571
2
R671
2
051-9584
2.0.0
2 OF 23
2 OF 46
16
16
13
12
12
12
23
23
23
23
16
16
2 3 4 5 6 7 10 11 12 14 18 19 20 21
2 3 4 5 6 7 10 11 12 14 18 19 20 21
2 7 12
12
13
4 12
2 7 12
12 13 14 16 19 22 23
2 3 4 5 6 7 10 11 12 14 18 19 20 21
PP
PP
1Y
GND
2Y2A
1A
VCC
PP
SYM 2 OF 12
GPIO7
GPIO9
UART6_TXDUART6_RXD
UART6_RTSNUART6_CTSN
UART5_TXDUART5_RXD
UART3_TXD
UART3_RTSNUART3_CTSN
UART2_RXD
UART1_RXD
UART1_CTSN
UART0_TXDUART0_RXD
TMR32_PWM2TMR32_PWM1TMR32_PWM0
GPIO_VSEL25_SPI3GPIO_VSEL25_I2C2
GPIO_SVSEL18_FMI
GPIO_3V1GPIO_3V0
GPIO8
GPIO6GPIO5GPIO4
GPIO39GPIO38GPIO37GPIO36GPIO35GPIO34GPIO33GPIO32GPIO31GPIO30
GPIO3
GPIO29GPIO28GPIO27GPIO26GPIO25GPIO24GPIO23GPIO22GPIO21GPIO20
GPIO2
GPIO19GPIO18GPIO17GPIO16
GPIO1GPIO0
EHCI_PORT_PWR3EHCI_PORT_PWR2EHCI_PORT_PWR1EHCI_PORT_PWR0
UART3_RXD
GPIO_SVSEL25_FMI
GPIO12/SDIO_D1GPIO13/SDIO_D0GPIO14/SDIO_CMDGPIO15/SDIO_CLK
UART4_CTSN/SPI4_SSINUART4_RTSN/SPI4_SCLKUART4_RXD/SPI4_MISOUART4_TXD/SPI_MOSI
UART1_RTSN
UART2_TXD
UART2_RTSNUART2_CTSN
UART1_TXD
GPIO11/SDIO_D2GPIO10/SDIO_D3
SYM 3 OF 12
SPI3_SSIN
SPI3_MOSISPI3_MISO
SPI3_SCLK
I2S4_MCK
I2S4_LRCKI2S4_DIN
I2S4_BCLK
I2S4_DOUT
SPDIF
SPI0_MISOSPI0_MOSISPI0_SCLKSPI0_SSIN
SPI1_MISO
SPI1_SCLKSPI1_MOSI
SPI1_SSIN
SPI2_MISO
SPI2_SCLKSPI2_MOSI
SPI2_SSIN
I2S1_BCLKI2S1_MCK
I2S0_DOUTI2S0_DIN
I2S3_DINI2S3_DOUT
SWI_DATA
I2S3_MCK
I2S3_LRCKI2S3_BCLK
I2S2_MCK
I2S2_LRCKI2S2_DIN
I2S2_BCLK
I2S1_LRCK
I2S1_DOUTI2S1_DIN
I2S0_MCKI2S0_BCLK
I2C2_SDA
DWI_DODWI_DI
DWI_CLK
I2S2_DOUT
I2C2_SCL
I2C1_SDAI2C1_SCL
I2C0_SDAI2C0_SCL
I2S0_LRCK
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
BOOT_CONFIG0
(OPEN DRAIN@PMU) NEW --->
R12 MUST WIN OVER 6X INTERNAL PULL-DOWNS THAT ARE ~100K
COMMON PULL UP FOR BOARD_REV, BOARD_ID AND BOOT_CONFIG PINS
0101 FMI0 4CS
CODEC ASP
GRAPE
BOARD_REV1BOARD_REV0
BOARD_ID0
BB_JTAG_TCK
L19A KEEP (STAYING) ALIVE -->
NOSTUFF FOR TRISTAR2
MENU & POWER / HOLD KEY
1010 FMI1 4CS W/TEST1001 FMI1 4 CS
1101 FMI0/1 4/4 CS
I2C2
I2C0
BASEBAND
BB
RESERVED FOR NON-TRISTAR DESIGN --->
DEV_HSIC1_RDY
BOOT_CONFIG2
RESERVED
0100 FMI0 2CS
CODEC VSP
<50MHZ
BT
CODEC
FMI, 00=1.8V | 01=3.0V | 10=3.3V
AK8963C COMPASS:
0101001XCT814 ALS:
1110100X
0011010X
0011101X
1101010X
<50MHZ
I2C1
AGATHA PMU:
DEBUG UART: TOLERANCE 1.98V
I2C2, 0=1.8V | 1=3.0VSPI3, 0=1.8V | 1=3.0V
0011 SPI3 W/TEST
BOOT_CONFIG1
0110 FMI0 4CS W/TEST
1000 FMI1 2 CS
FLOAT=LOW, PULLUP=HIGH
0010 SPI0 W/TEST
0111 RESERVED
BOARD_REV3
BOOT_CONFIG3
DFU STATUS
BOARD_REV[3:0]={EHCI_PORT3,EHCI_PORT_PWR2,EHCI_PORT_PWR1,EHCI_PORT_PWR0}
GAS GAUGE
BOARD_ID2
BLUETOOTH
WIFI UART
FLOAT=LOW, PULLUP=HIGH1010 X155 MLB
BB_JTAG_TDOBB_JTAG_TMSBB_JTAG_TDI
BOARD_ID3
BOARD_ID1
<--- SELECTED1100 FMI0/1 2/2 CS
BOARD_REV2
STUFF FOR TRISTAR
1111 X155 INITIAL
1110 FMI0/1 4/4 CS W/TEST
AP3DSH ACCEL:
AP3GDL20-BC GYRO:????????
0001100X
CS35L20 AMP:
LM3534:TRISTAR:
CHESTNUT:1100011X0100111X
FLOAT=LOW, PULLUP=HIGH0000 SPI00001 SPI3
1100 - PROTO1 TRISTAR 21101 - PROTO1 TRISTAR <---PROTO1 SELECTED
BOARD_ID[3:0]={GPIO16,SPIO0_MISO,SPI0_MOSI,SPI0_SCLK}
<--- SELECTED
BOOT_CONFIG[3:0]={GPIO29_CONFIG3,GPIO28_CONFIG2,GPIO25_CONFIG1,GPIO18_CONFIG0}
CODEC XSP & SPKR AMP
1111 RESERVED
01005MF
33.2
1/32W1%
1.00K01005
2.2K
01005MF
5%1/32W 1/32W
MF
5%
01005
2.2K
01005MF
5%2.2K1/32W
01005MF
5%1/32W
2.2K
01005MF
33.2
1%1/32W
220K
MF
5%1/32W
01005
01005
1/32WMF
392K1%
MF1/32W
01005
392K1%
SMP4MM
SMP4MM
74AUP2G34GNSOT1115
P2MMSM
1/32W
MF1%
01005
33.2
FCMSPH5P-SC58950C03
FCMSPH5P-SC58950C03
2.2K5%1/32WMF01005
MF
5%2.2K1/32W
01005
1.00K
01005
H5P GPIO & CONTROLSYNC_DATE=N/ASYNC_MASTER=N/A
BOARD_INFOAP_TO_BB_HSIC1_RDY
WLAN_TO_AP_HSIC2_REMOTE_WAKE
BUTTON_TO_AP_HOLD_KEY_BUFF_L
PP1V8
PP1V8PP1V8
BOARD_REV0
PP1V8
BUTTON_TO_AP_VOL_UP_L
GYRO_TO_AP_INT2
45_AP_TO_PMU_DWI_DO
ACCEL_TO_AP_INT2
ALS_TO_AP_INT_L
AP_TO_HEADSET_HS3_CTRLAP_TO_HEADSET_HS4_CTRL
VIB_PWMAP_TO_CODEC_SPI3_CS_L
BUTTON_TO_AP_VOL_DOWN_L
AP_BI_I2C2_SDA
45_AP_TO_PMU_DWI_CLK45_AP_TO_PMU_DWI_DI
45_AP_TO_PMU_DWI_CLK_H5P
AP_TO_I2C1_SCL
AP_TO_I2C2_SCL
PP1V8
AP_TO_I2C0_SCLAP_BI_I2C0_SDA
AP_TO_BB_I2S1_DOUT
CODEC_TO_AP_SPI3_MISO
VIB_LDO_EN
BB_TO_AP_PP_SYNCAP_TO_SPKAMP_RESET_L
AP_TO_TOUCH_GRAPE_RESET_L
PP1V8
AP_TO_BB_WAKE_MODEMCOMPASS_TO_AP_INT_2
PP1V8
CODEC_TO_AP_INT_L
SPKAMP_TO_AP_INT_L
FCAM_TO_AP_ALS_INT_LBB_TO_AP_IPC_GPIO
AP_TO_BB_JTAG_TDI BB_TO_AP_UART1_CTS_L
ACCEL_TO_AP_INT1
AP_TO_BB_UART1_TXD
AP_TO_LEDDRV_EN
BUTTON_TO_AP_MENU_KEY_BUFF_L
45_AP_TO_SPKAMP_I2S2_MCLK
BUTTON_TO_AP_HOLD_KEY_L
45_AP_TO_CODEC_I2S_MCLK
BUTTON_TO_AP_MENU_KEY_L
BB_TO_AP_HSIC1_REMOTE_WAKE
AP_TO_BB_UART1_RTS_LAP_TO_BB_JTAG_TMS
BT_TO_AP_UART3_RXD
KEEPACT
TOUCH_TO_AP_INT_LAP_TO_LCM_RESET_LLCM_TO_AP_HIFA_BSYNC
FORCE_DFU
45_AP_TO_TOUCH_CLK32K_RESET_L
AP_TO_SPKAMP_BEE_GEES
AP_TO_CODEC_ASP_I2S0_LRCLK
AP_TO_CODEC_XSP_I2S2_DOUT
45_I2S0_MCK_R
BB_TO_AP_I2S1_DIN
45_AP_TO_CODEC_XSP_I2S2_BCLK
CODEC_TO_AP_XSP_I2S2_DINAP_TO_CODEC_XSP_I2S2_LRCLK
45_I2S2_MCK_R
45_AP_TO_BT_I2S3_BCLKAP_TO_BT_I2S3_LRCLK
AP_TO_BT_I2S3_DOUTBT_TO_AP_I2S3_DIN
CODEC_TO_AP_ASP_I2S0_DINAP_TO_CODEC_ASP_I2S0_DOUT
45_AP_TO_BB_I2S1_BCLK
WLAN_TO_AP_HSIC2_RDYAP_TO_WLAN_HSIC2_RDY
AP_TO_TOUCH_SPI1_CS_L
AP_TO_TOUCH_SPI1_MOSIAP_TO_TOUCH_SPI1_CLK
AP_TO_CODEC_VSP_I2S4_LRCLK
AP_TO_CODEC_SPI3_MOSIAP_TO_CODEC_SPI3_CLK
BB_TO_AP_UART1_RXD
AP_TO_TRISTAR_ACC_UART2_TXDTRISTAR_TO_AP_ACC_UART2_RXD
TRISTAR_TO_AP_DEBUG_UART6_RXD
AP_BI_BATTERY_SWI
AP_TO_CAM_RF_VDDCORE_EN
BB_TO_AP_RESET_DET_L
AP_TO_WLAN_UART4_TXDWLAN_TO_AP_UART4_RXD
AP_TO_BB_JTAG_TRST_L
AP_TO_BT_UART3_TXD
AP_TO_BT_UART3_RTS_LBT_TO_AP_UART3_CTS_L
AP_TO_BB_I2S1_LRCLK
45_AP_TO_CODEC_VSP_I2S4_BCLK
CODEC_TO_AP_VSP_I2S4_DINAP_TO_CODEC_VSP_I2S4_DOUT
BB_TO_AP_HSIC1_RDYAP_TO_RADIO_ON_LGYRO_TO_AP_INT1
TRISTAR_TO_AP_INT
PP1V8_SDRAM
AP_TO_TRISTAR_DEBUG_UART6_TXD
BUTTON_TO_AP_HOLD_KEY_BUFF_L
PP1V8_ALWAYS
45_AP_TO_CODEC_ASP_I2S0_BCLK
BUTTON_TO_AP_MENU_KEY_BUFF_L
BOARD_INFO
AP_TO_BT_WAKE
BUTTON_TO_AP_RINGER_A
BOARD_INFO
TOUCH_TO_AP_SPI1_MISO
LCM_TO_AP_PIFA
AP_TO_BB_JTAG_TCK
AP_TO_BB_RST_L
BB_TO_AP_JTAG_TDO
PMU_TO_AP_IRQ_L
AP_BI_I2C1_SDA
R161 2
R121 2
R171
2
R181
2
R191
2
R211
2
R51 2
R521
2
R201
2
R221
2
PP151PP131
U25
1 6
3 4
25
PP5 1
R471 2
U1AE4AD3AD4AE3
W3N2
W1M2R3N3M1AC3T3V1AC2V4
M4
R31P34P33P32N32L33P30P31L34M32
V3
K32L32C22D22C21D21C20D20C19D19
T4W2P3M3U3P4
AT11AP12
AU13AR14
AR13AT12
AT6AP8AP1
AR15AU12
AA3AB2AB3AF5
AG3AA1AE2AF3
AH3AB1AF4AG4
AJ4AE1AJ2AH4
AK4AJ3
AH2AL1AK3AD1
U1
AT7AV7AM8
AR7AT4
AV6AT3
AT9AR8
AM30
AH30AJ30
AH31
AP30
AL31
AH29AH32
AN31
AK29
AM28
AM33AN30
AJ31
AM29
AK31
AL30AP31
AL28
AM31
AM32
AK32AR32
AP32
AK30
AR31
AM4AR5AM2AP3
AN3AL3AK1AR4
AN4AM3AN6AN1
AP9AM9
AM13AN12
AP5
R911
2
R921
2
R511 2
051-9584
2.0.0
3 OF 23
3 OF 46
3
23
23
3 13
2 3 4 5 6 7 10 11 12 14 18 19 20 21
2 3 4 5
6 7 10 11 12 14
18
19 20 21
2 3 4 5 6 7 10 11 12 14 18 19
20 21
2 3 4 5 6 7 10
11 12 14 18 19 20 21
8 13
20
13 14
20
11
17
17
8 10
8 13
11
13 14
13
20
11
2 3 4 5 6 7 10 11 12 14 18 19 20 21
13 14 15 16 20
13 14 15 16 20
23
10
8
23
15
18
2 3 4 5 6 7 10 11 12 14 18 19 20
21
23
20
2 3 4 5 6 7 10 11 12 14 18 19 20
21
10
15
11
23
23 23
20
16 23
15
3 13
15
8
10
17
23
23 23
23
13
18
19
18 19
22
18
15
10
10 15
23
10 15
10 15
10 15
23
23
23
23
10
10
23
23
23
18
18
18
10
10
10
16 23
16
16
16
13 22
21
23
23
23
23
23
23
23
23
10
10
10
23
23
20
13 16
4 10 12 13 14 16 23
16
3 13
12
10
3 13
3
23
8 13
3
18
19
23
23
23
13
20
SYM 7 OF 12DDR1_RREF
VDDCA
DDR1_VREF_CADDR0_VREF_DQDDR1_VREF_DQ
VDD2
DDR0_VDD_CKEDDR1_VDD_CKE
DDR0_ZQDDR1_ZQ
DDR0_VREF_CA
VSS
VDD1
VDDQ
DDR0_RREF
SYM 9 OF 12
PVDDP_I2C2_SDA
VDDIO18_GPIO22
VSS
VDDIO18_I2S0_MCK
VDDIO18_GRP2
VDDIO18_GRP1
VDDIOD
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
(666MA)
POR CAPS 9/1/11
(80MA)BUCK4 1P2
(20MA)
(<1MA)
(45MA)
(7MA)
POR CAPS NOV/1/2010
(INCLUDED IN VDDQ)
(8MA)
(<1MA)
CAPS FOR VDDIOD ARE SHARED WITH VDDQ
(340MA)
(18MA)
(DDR IMPEDANCE CONTROL) 1/32W1%
243
MF01005
1/32W
01005MF
243
1%
1%1/32WMF
10K
01005
1/32W1%
MF
10K
01005
1/32WMF
1%10K
01005
1/32W1%
MF
10K
01005
MF1/32W
4.7K1%
01005
MF1/32W1%4.7K
01005
4.7K1%1/32WMF01005
4.7K1%1/32WMF01005
20%4V
0.47UF
X7S02040204
1UF
X6S4V20%
6.3VCERM-X5R0402-1
20%10UF
0610X5R-CERM
4.3UF4V20%
0204X7S
20%0.47UF4V
X5R-CERM
4.3UF
0610
4V20%
6.3VCERM-X5R0402-1
10UF20%
1UF
0204X6S
20%4V4V
20%
0610
4.3UF
X5R-CERM
20%0.1UF6.3VX5R-CERM01005
0.01UF6.3V10%
X5R01005
6.3V
0.01UF10%
X5R01005
0.01UF6.3V10%
X5R01005
6.3V
0.01UF10%
X5R01005
10%0.01UF6.3VX5R01005
10%0.01UF6.3VX5R01005
10%0.01UF6.3VX5R01005
10%0.01UF6.3VX5R01005
2.2UF
0201X5R-CERM
4V20%
20%4V
0.47UF
X7S0204
NP0-C0G
56PF5%6.3V
01005NP0-C0G01005
6.3V5%56PF
0201
1KOHM-25%-0.2A
FCMSPH5P-SC58950C03
FCMSPH5P-SC58950C03
NOSTUFF
X5R-CERM
20%6.3V
01005
0.1UF
01005
15PF5%16VNP0-C0G-CERM
SYNC_DATE=N/ASYNC_MASTER=N/A
H5P IO POWER
PP1V2
PP1V2_SDRAM
PP1V8
PP1V2PP1V2_SDRAM
DDR0_VREF_CADDR1_VREF_DQ
DDR0_VREF_DQDDR1_VREF_CA
DDR0_ZQ
PP1V8_SDRAM
DDR0_VREF_CA
DDR1_ZQDDR0_ZQ
PP1V2_SDRAM
DDR1_VREF_DQDDR0_VREF_DQDDR1_VREF_CA
DDR1_ZQ
PP1V2
PP1V8_XTAL
R341 2
R331 2
R131
2
R111
2
R141
2
R241
2
R251
2
R271
2
R281
2
R291
2
C881
2
C751
2
C681
2
C871
2
C891
2
C851
2
C761
2
C771
2
C721
2
C811
2
C601
2
C661
2
C781
2
C801
2
C901
2
C911
2
C941
2
C961
2
C123 1
2
C8831
2
C3901
2
C3881
2
FL401 2
U1AV4
L16
AV8
B31
AV3
AN34
N9
AK34
R2
AP34
A10A11
AB33AF2
AT33AU3
AV16B32M33T2
AA34AF1
M34P1R1
AL33AR33AT1
AU16AU7B10B11B29
AD33AJ33AN33AU14AU5AU9
A3AA2
B20B22B25B27B30B5B7B9C33D2
AD2
F2G33J2K33L2N33P2T33U2W33
AG2AK2AN2AR2B12B14B17
A1A2AT30AV9B15C1C12C27D18D7E1E12E23F16F5G3G32H15J1K3K30L19M16N15P10R32R9T20U6V2V29W21W23W25Y1Y12Y14Y16Y18Y2Y20Y22Y24Y10Y29Y3Y32Y4Y5Y8
U1
AT10
R29
AA7AB7
AK11AK12AK13AK14AK15AK7AK8AK9
AC7AD7AE7AF7AG7AH7AJ7
AK10
K20K21
AJ28AK28
G11G13
H16H6H8J10J11J12J13J14J15J16
G15
J17J5J7J8J9K6K7L5L7M6
G17
M7N5N7P6P7R5R7T6T7U5
G5
U7V6V7W5W7Y6Y7
G7G9H10H12H14
AE13AE15AE17AE19AE21AE23AE25AE27K26AF10AF12AF14AF16AF18AF20AF22AF24AF26AF28AF29AF30AF31AF32AF33AF34AF6AF8AG1AG11AG13AG15AG17AG19AG21AG23AG25AG27AG28AG29AG30AG31AG32AG33AG34AG5AG6AG9AH10AH12AH14AH16AH18AH20AH22AH24AH26AH28AH33AH5AH6AH8AJ1AJ11AJ13AJ15AJ17AJ19AJ21AJ23AJ25AJ27AJ29AJ32AJ5AJ6AJ9AK33AK5AK6AR25D33
C816 1
2
C9531
2
051-9584
2.0.0
4 OF 23
4 OF 46
2 4 12
4 12
2 3 5 6 7 10 11 12 14 18 19 20 21
2 4 12 4 12
4 4
4 4
4
3 10 12 13 14 16 23
4
4
4
4 12
4
4
4
4
2 4 12
SYM 8 OF 12
VDD_ANA_TMPSADC0VDD_ANA_TMPSADC1
VDD_ANA0VDD_ANA1
PVDDP_FAST_SCAN_CLK
VSS
VDDIOD1
VDDIOD0
VDDIO30_GPIO_3V0VDDIO30_USB11_DMVDDIO30_FAST_SCAN_CLK
VDD_SRAM
VDD_CPU1
VDD_CPU0
VDD_CPUB
VDDIOD3
VDDIOD2
SYM 10 OF 12
VDD VDD
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
C104 MOVED TO CPU0 FROM PP1V8 PER SEG SIMS
C86 MOVED TO PP1V1_SOC FROM PP1V2, PER SEG SIMS
C83 MOVED TO CPUB FROM 1V2_SDRAM PER SEG SIM RESULTS
POR CAPS 5/6/2011
(1500MA)
(1500MA)
POR CAPS 12/14/2011
(2MA SPI3)
(2MA I2C2)
(5MA)
(5MA)(5MA)
(45MA NAND 1CH)
(7MA)
(2MA)(40MA)
THERE WERE 10X 0.01UF HERE
(400MA)
POR CAPS 9/1/2011
(716MA)
(45MA NAND 1CH)
NAND POWER GROUP
BUT THEY WERE NOT NEEDED PER P.CODD 1/6/11
(VDD_SOC 3700MA)
PER SEG - ZHENGGANG - 09/01/12 PRE-PROTO1C181,C177,C174 CHANGED FROM 0.47UF TO 1UF
4V20%
0204
0.47UF
X7S
4.3UF
0610
4V20%
X5R-CERM
0204
4V
0.47UF20%
X7S
0.47UF
X7S4V20%
0204
CERM-X5R
20%10UF
0402-1
6.3V 4V
0.47UF20%
X7S0204
20%
X5R0201
0.22UF6.3V
4VX5R-CERM0610
4.3UF20%
0204
4V
1UF20%
X6S0610X5R-CERM4V20%4.3UF
CERM-X5R
20%6.3V
0402-1
10UF
20%
X5R-CERM
0.1UF
01005
6.3V
CERM-X5R
10UF
0402-1
6.3V20%
01005
20%
X5R-CERM
0.1UF6.3V
4VX5R-CERM0610
4.3UF20%
X5R-CERM
20%4.3UF
0610
4V
20%
X6S
1UF4V
02040204
20%1UF4VX6S
10UF
0402-1CERM-X5R6.3V20%
10UF
0402-1CERM-X5R6.3V20%
10UF6.3V20%
CERM-X5R0402-10402-1
CERM-X5R
10UF6.3V20%
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
4VX5R-CERM0610
4.3UF20%
0.00
1/32W
01005MF
0%
1/32W0%
MF01005
0.00
4.3UF20%4VX5R-CERM0610
20%4VX5R-CERM0610
4.3UF
6.3V
0.47UF
CERM0402
20%
0402CERM
1UF20%4V
CERM4V20%1UF
0402
20%
CERM
0.47UF6.3V
0402
1UF20%
0402
4VCERM
6.3VCERM
20%
0402
0.47UF
1UF
0402
20%4V
CERM
CERM4V
1UF20%
0402
20%
0402
0.47UF6.3VCERM
4V20%
0204X6S
1UF
20%1UF4VX6S0204
FCMSPH5P-SC58950C03 FCMSP
H5P-SC58950C03
1UF
X6S
20%4V
0204
0.47UF20%
0204X7S4V
4.3UF
0610X5R-CERM4V20%
4.3UF
0610X5R-CERM4V20%
0.00
MF
0%1/32W
010055%
NP0-C0G01005
6.3V
56PF
0204
20%1UF
X6S4V
X6S
20%
0204
4V
1UF
1UF20%
X6S0204
4V
X6S4V
1UF20%
0204X6S4V
1UF20%
0204
0402
20%4V
CERM
1UF
H5P SOC/CPU/SRAM PWRSYNC_DATE=N/ASYNC_MASTER=N/A
PP1V1_CPU0
PP1V1_CPUB
PP1V8
CPU0_SENSE
CPU1_SW_S
BUCK2_FB
CPU0_SW_S
CPU1_SENSE
PP1V1_CPU1
PP1V8
PP3V0_NAND_XW
PP1V0_SRAM
PP3V0_IO
PP1V1_SOC
C1581
2
C1171
2
C1401
2
C1421
2
C1001
2
C1541
2
C1391
2
C1271
2
C1451
2
C1121
2
C1711
2
C1831
2
C1621
2
C1781
2
C1721
2
C1641
2
C1791
2
C1751
2
C1611
2
C1551
2
C1341
2
C1111
2
XW11 2
XW31 2
XW41 2
C1151
2
R461 2
R531 2
C1461
2
C1521
2
C135
1
2
3
4
C151
1
2
3
4
C113
1
2
3
4
C132
1
2
3
4
C114
1
2
3
4
C133
1
2
3
4
C166
1
2
3
4
C173
1
2
3
4
C169
1
2
3
4
C1031
2
C1011
2
U1
F19
AJ18AJ22
Y17K18
AE16AE18
AJ20
AE20AF19AG16AG18AG20AH17AH19AJ16
AE22AE24AF21AF23AG22AG24AH21AH23AH25AJ24
AA16AA18AA20AA22AA24AC16AC18AC20AC22AC24
AB17AB19
AF17AF25
AB21AB23AB25AD17AD19AD21AD23AD25
F20
AR10G30
AN10
AP11
AB27AC27AD27
V27W27Y26
A14A15A16A17A18A20A23A26A29A33A34A4A5A6A7A8A9AA11AA13AA15AA17AA19AA21AA23AA25AA33AA4AA5AA6AA9AB10AB12AB14AB16AB18AB20AB22AB24AB26AB29AB32AB4AB5AB6AB8AC1AC11AC13AC15AC17AC19AC21AC23AC25AC34AC4AC5AC6AC9AD10AD12AD14AD16AD18AD20AD22AD24AD26AD29AD32AD5AD6AD8AE11AE5AE6AE9AK27AL13AM22AN21AP16AP33AR26AT19
U1AA10AA12
AC12
T13T15T17T19T21T23T25T27T9U10
AC14
U12U14U16U18U20U22U24U26U8V11
AC26
V13V15V17V19V21V23V25V9W10W12
AC8
W14W16W18W20W22W24W26W8Y11Y13
AD11
Y15Y9Y19Y21Y23Y25
AD13AD15AD9
AE10AE12
AA14
AE14AE26AE8
AF11AF13AF15AF27AF9
AG10AG12
AA26
AG14AG26AG8
AH11AH13AH15AH27AH9
AJ10AJ12
AA8
AJ14AJ26AJ8K11K13K15K17K23K25K27
AB11
K9L10L12L14L18L20L22L24L26L8
AB13
M11M13M15M17M19M21M23M25M27M9
AB15
N10N12N14N16
N18N20N22N24N26P11
AB9
P13P15P17P19P21P23P25P27P9R10
AC10
R12R14R16R18R20R22R24R26R8T11
C7451
2
C7461
2
C1061
2
C1081
2
R9531 2
C1481
2
C831
2
C1041
2
C861
2
C1811
2
C1771
2
C174
1
2
3
4
051-9584
2.0.0
5 OF 23
5 OF 46
12
12
2 3 4 5 6 7 10 11 12 14 18 19 20 21
12
12
12
12
2 3 4 5 6 7 10 11 12 14 18 19 20 21
6
12
12
IO0-1
IO7-1IO6-1
IO3-1IO4-1IO5-1
IO1-1IO2-1
IO7-0
IO5-0IO6-0
IO4-0
IO2-0IO3-0
IO1-0IO0-0
VCC
CLE1CE1*
CLE0CE0*
WE0*ALE0
RE0RE0*
DQS0*
R/B0*
DQS0
ALE1WE1*
RE1RE1*
DQS1DQS1*
R/B1*
ZQ
VREF
VSSQVSS
VCCQVDDI
TMSCTCKC
PP
PP
PP
PP
PP
SYM 4 OF 12
FMI1_VREFFMI0_VREF
FMI0_RENFMI1_WEN
FMI1_DQSFMI1_REN
FMI0_CLEFMI0_WEN
FMI0_IO2FMI0_IO3
FMI0_IO5
FMI1_DQSN
FMI0_ALE
FMI0_CEN0FMI0_CEN1FMI0_CEN2FMI0_CEN3FMI0_CEN4FMI0_CEN5FMI0_CEN6FMI0_CEN7
FMI0_DQSFMI0_DQSNFMI0_DQVREF
FMI0_IO0FMI0_IO1
FMI0_IO4
FMI0_IO6FMI0_IO7
FMI1_ALE
FMI1_CEN0FMI1_CEN1FMI1_CEN2FMI1_CEN3FMI1_CEN4FMI1_CEN5FMI1_CEN6FMI1_CEN7
FMI1_CLE
FMI1_DQVREF
FMI1_IO0FMI1_IO1FMI1_IO2FMI1_IO3FMI1_IO4FMI1_IO5FMI1_IO6FMI1_IO7
PVDDP_FMI0 PVDDP_FMI1
FMI0_WENN/RE_P FMI1_WENN/RE_P
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
POR CAPS 1/7/11500MA
NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE
1000MA
FOR NAND CURRENT MEASUREMENT
NAND
SM
OMIT_TABLE
CERM-X5R
20%
0402-1
6.3V
10UF
0204X6S4V20%1UF10UF
0402-1
20%6.3VCERM-X5R
01005
1/32WMF
243
1%
01005
NOSTUFF
MF
5%1/32W
100K
XXNM-XGBX8-MLC-PPN1.5-ODP
LGA-12X17
OMIT5%
01005MF
100K1/32W
5%100K
MF1/32W
01005
10%
X5R6.3V
0.01UF
01005
01005
0.01UF
X5R6.3V10%
OMIT_TABLE
20%10UF6.3V
0402-1CERM-X5R
SMP4MM
P4MMSM
SMP4MM
1%1/32WMF
50K
01005
50K1%1/32W
01005MF
OMIT_TABLE0402-1
20%6.3VCERM-X5R
10UF
OMIT_TABLE
CERM-X5R0402-1
6.3V
10UF20%
P2MMSM
SMP2MM
X5R4V20%
0402
15UF
4V
2.2UF20%
0201X5R-CERM
0204X6S4V20%1UF
X7S
0.47UF20%4V
0204
20%4.3UF4V
0610X5R-CERM
20%4VX7S0204
0.47UF
NOSTUFF
100K
01005MF1/32W5%
NOSTUFF
0201X5R-CERM
20%2.2UF4V
H5P-SC58950C03FCMSP
4V20%
X6S
1UF
0204
SYNC_MASTER=N/A SYNC_DATE=N/A
H5P W/ NAND
FMI1_IO<5>
FMI0_IO<0>FMI0_IO<1>FMI0_IO<2>FMI0_IO<3>FMI0_IO<4>
FMI1_IO<0>FMI1_IO<1>
FMI0_DQVREFFMI0_DQVREF
45_FMI0_RE_LFMI1_WE_L
45_FMI1_DQS45_FMI1_RE_L
FMI0_CLEFMI0_WE_L
FMI0_IO<5>
FMI0_ALE
FMI0_CEN0
45_FMI0_DQS
FMI0_DQVREF
FMI0_IO<6>FMI0_IO<7>
FMI1_ALE
FMI1_CEN0
FMI1_CLE
FMI0_DQVREF
FMI1_IO<2>FMI1_IO<3>FMI1_IO<4>
FMI1_IO<6>FMI1_IO<7>
PP1V8 PP1V8NAND_TMSC
45_FMI0_RE_L
FMI0_DQVREF
45_FMI0_DQS
PPN_ZQ
45_FMI0_DQS
PP3V0_NAND
NAND_TCKC
FMI0_IO<3>FMI0_IO<2>
FMI0_IO<0>
FMI0_IO<4>
45_FMI0_RE_L
FMI0_IO<1>
FMI0_IO<5>
FMI0_CEN0
FMI1_ALE
FMI1_CEN0
FMI1_WE_L
FMI1_CLE
FMI0_IO<0>
FMI0_IO<6>
FMI0_ALE
FMI0_DQVREF
PP1V2_NAND_VDDI
NAND_RDYBSY1_L
FMI0_WE_L
FMI0_CLE
PP1V8
45_FMI1_DQS
45_FMI1_RE_L
NAND_RDYBSY0_L
FMI0_IO<7>
PP3V0_NAND_XW
PP1V8
C31
2
XW21 2
C1821
2
C1071
2
C951
2
R81 2
R1601
2
U4C1
D2
A5
C5
A3
C3
H4F4
M4K4
G3
G1
H2
J1
J3
L1
K2
N3
L5
N5
K6
L7
J5
J7
H6
G7
E5
E7
B4C7
D4D6
OA0OB0
B6F2M6
N1N7OC8
OD8
OE0
OF8
G0OA8
OB8
G5
B2F6L3
A7M2
OC0
OD0
OE8
OF0G8
E3
E1
A1
R821
2
R781
2
C1361
2
C1441
2
C3071
2
PP3 1PP2 1
PP14 1
R1371
2
R1431
2
C2091
2
C1871
2
PP171PP19
1
C1091
2
C501
2
C1851
2
C1051
2
C6271
2
C6051
2
R481
2
C261
2
U1
AC31
AE29AE30AE32AE34AA29AB30AA30AB28
AD30
AC33AC32AD28
AA28AA31AB34AB31AD31AE31AD34AE33
AC30
AE28
AC29
AC28W29
W28Y34AA32Y33T34V31U34U31
Y28
V34V33V30
U33U29V32W32W34W31Y30Y31
W30
Y27
V28
U28
AA27 U27
051-9584
2.0.0
6 OF 23
6 OF 46
6
6
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
2 3 4 5 6 7 10 11 12 14 18 19 20 21
2 3 4 5 6 7 10 11 12 14 18 19 20 21
6
6
6
6
12
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
2 3 4 5 6 7 10 11 12 14 18 19 20 21
6
6
6
5
2 3 4 5 6 7 10 11 12 14 18 19 20 21
SYM 11 OF 12
VSS VSS
SYM 12 OF 12
VSSVSS
SYM 5 OF 12
MIPI0D_VDD18
MIPI1D_VDD18
MIPI0D_VDD10_PLL
MIPI1D_VDD10_PLL
MIPI0C_DPDATA1
SENSOR1_RST
MIPI1D_DPCLK
MIPI1D_VREG_0P4V
MIPI0D_VREG_0P4V
MIPI_VDD10
MIPI_VSS
MIPI_VSYNC
MIPI0C_DNCLK
MIPI0C_DNDATA0
MIPI0C_DNDATA1
MIPI0C_DNDATA2
MIPI0C_DNDATA3
MIPI0C_DPCLK
MIPI0C_DPDATA0
MIPI0C_DPDATA2
MIPI0C_DPDATA3
MIPI0D_DNCLK
MIPI0D_DNDATA0
MIPI0D_DNDATA1
MIPI0D_DNDATA2
MIPI0D_DNDATA3
MIPI0D_DPCLK
MIPI0D_DPDATA0
MIPI0D_DPDATA1
MIPI0D_DPDATA2
MIPI0D_DPDATA3
MIPI1C_DPDATA1
SENSOR0_CLKSENSOR0_RST
SENSOR1_CLK
MIPI1C_DNDATA1
MIPI1C_DPDATA0
ISP1_SDA
MIPI1C_DNDATA0
MIPI1D_DNCLK
MIPI1D_DPDATA1MIPI1D_DNDATA1
MIPI1D_DPDATA0MIPI1D_DNDATA0
ISP1_FLASH
ISP1_SCL
ISP0_PRE_FLASHISP0_SCLISP0_SDA
ISP1_PRE_FLASH
ISP0_FLASH
MIPI1C_DPCLKMIPI1C_DNCLK
LPDP_PAD_TX0PLPDP_PAD_TX0N
LPDP_PAD_TX1PLPDP_PAD_TX1N
LPDP_PAD_R_BIAS
DAC_COMP
DP_PAD_DC_TP
DP_PAD_R_BIAS
LPDP_HPD
LPDP_PAD_AUXPLPDP_PAD_AUXN
DAC_IREF
DAC_VREF
DAC_AVSS18D
DP_PAD_AVSS_AUX
DP_PAD_AVSS0
DP_PAD_AVSS1
DP_PAD_AVSSP0
DP_PAD_AVSSX
DP_PAD_DVSS
LPDP_PAD_AVSS0
LPDP_PAD_AVSS1
LPDP_PAD_AVSS2
DAC_AVSS18A2
DP_PAD_TX1NDP_PAD_TX1P
DP_PAD_TX0NDP_PAD_TX0P
DP_PAD_AUXN
DP_HPD
DAC_OUT1
DP_PAD_AUXP
DAC_OUT2
DAC_OUT3
LPDP_PAD_LN1_AVDD
LPDP_PAD_CMN_AVDD
LPDP_PAD_CMN_AVDDH
LPDP_PAD_LN0_AVDD
DP_PAD_AVDDX
DP_PAD_DVDD
LPDP_PAD_AUX_AVDD
DP_PAD_AVDD0
DP_PAD_AVDD1
DP_PAD_AVDDP0
DP_PAD_AVDD_AUX
DAC_AVDD18D
DAC_AVDD18A
SYM 6 OF 12
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
LPDP NOT USED, NO CAP NEEDED ON THIS PIN
(0MA LPDP)
(2X 65MA)
(8MA)
(2MA)
(2MA)
FF CAMERA
RESET CAM1SHUTDOWN IS ALSO
MAIN CAMERA
(12MA)
(12MA)
(11MA)
(15MA)
(28MA)
(1MA)
01005
2200PF6.3V10%
X5R-CERM01005X5R-CERM
10%6.3V
2200PF20%0.1UF
X5R-CERM6.3V
01005
33.2
1/32W
01005MF
1%
MF
1% 1/32W
33.2
01005
20%
X5R-CERM6.3V
0.1UF
01005 X5R-CERM
20%0.1UF
01005
6.3V
1.00K
01005
5%
MF1/32W
01005MF
5%1/32W
1.00K
01005MF
5%1.00K1/32W
01005
1.00K5%1/32WMF
6.3V20%0.1UF
01005X5R-CERM
20%0.1UF
01005X5R-CERM
6.3V
01005
6.3VNP0-C0G
5%56PF
NP0-C0G6.3V
01005
56PF5%
01005
6.3V
56PF5%
NP0-C0G
5%56PF
NP0-C0G6.3V
01005
20%4V
4.3UF
X5R-CERM0610
H5P-SC58950C03FCMSP FCMSP
H5P-SC58950C03
H5P-SC58950C03FCMSP
FCMSPH5P-SC58950C03
SYNC_DATE=N/ASYNC_MASTER=N/A
H5P VIDEO
PP1V0
PP1V8
90_AP_TO_LCM_MIPI_DATA2_P
AP_TO_CAM_FF_SCL
PP1V8
90_CAM0_TO_AP_MIPI_CLK_P90_CAM0_TO_AP_MIPI_CLK_N
90_AP_TO_LCM_MIPI_DATA1_N
90_AP_TO_LCM_MIPI_DATA2_N
90_CAM0_TO_AP_MIPI_DATA3_P
90_CAM0_TO_AP_MIPI_DATA2_N
PP1V8PP1V0
90_CAM0_TO_AP_MIPI_DATA1_P
MIPI1D_VREG
MIPI0D_VREG
90_CAM0_TO_AP_MIPI_DATA0_N
90_CAM0_TO_AP_MIPI_DATA1_N
90_CAM0_TO_AP_MIPI_DATA2_P
90_AP_TO_LCM_MIPI_CLK_N
90_AP_TO_LCM_MIPI_DATA0_N
90_AP_TO_LCM_MIPI_DATA3_N
90_AP_TO_LCM_MIPI_CLK_P
90_AP_TO_LCM_MIPI_DATA0_P
90_AP_TO_LCM_MIPI_DATA1_P
AP_BI_CAM_FF_SDA
CAM0_TORCHAP_TO_CAM_RF_SCLAP_BI_CAM_RF_SDA
45_AP_TO_CAM_FF_CLK
45_AP_TO_CAM_RF_CLK
AP_TO_CAM_RF_SHUTDOWN
45_AP_TO_CAM_RF_CLK_R
AP_TO_CAM_FF_SHUTDOWN
45_AP_TO_CAM_FF_CLK_R
90_CAM1_TO_AP_MIPI_DATA0_N90_CAM1_TO_AP_MIPI_DATA0_P
90_CAM1_TO_AP_MIPI_CLK_N90_CAM1_TO_AP_MIPI_CLK_P
90_CAM0_TO_AP_MIPI_DATA3_N
90_CAM0_TO_AP_MIPI_DATA0_P
90_AP_TO_LCM_MIPI_DATA3_P
C6 1
2
C71
2
C1911
2
R381 2
R401 2
C531
2
C571
2
R371
2
R391
2
R411
2
R421
2
C2681
2
C58 1
2
C2591
2
C2741
2
C2801
2
C2841
2
C2661
2
U1AL10AL11
AL7
B24B26B28B3B33B34B4B6B8C10
AL8
C11C13C14C15C16C17C18C2C23C24
AL9
C25C26C28C29C3C30C31C32C4C5
AM1
C6C7C8C9D1D10D11D12D13D14
AM17
D15D16D17D23D24D25D26D27D28D29
AM18
D3D30D31D32D4D5D6D8D9E10
AM26
E11E13E14E15E16E17E18E19E2E20
AM5
E21E22E24E25E26E28E3E30E4E5
AM6
E6E7E8E9
AM7
AL12
AN11AN14AN17AN18AN19AN20AN22AN23AN24AN25
AL14
AN26AN32AN5AN7AN8
AP10AP13AP17AP18AP19
AL15
AP20AP21AP22AP23AP24AP25AP26AP4AP7AR1
AL29
AR11AR17AR18AR19AR20AR21AR22AR23AR24AR27
AL32
AR28AR29AT14AT16AT17AT18AT2
AT20AT21AT22
AL4
AT23AT24AT25AT26AT27AT28AT29AT31AT32AT5
AL5
AT8AU1AU2
AU33AU34AU4AV1
AV14AV2
AV33
AL6
AV34AV5
B1B13B16B18B19B2B21B23
U1E31E32F1F10F11F12F13F14F15F17F18F21F22F27F3F30F31F32F4F6F7F8F9G1G10G12G14G16G2G22M31G31G34G4G6G8H1H11H13H17H18H19H2H20H21H22H3H30H31H32H33H4H5H7H9J27J3J30J31J32J33J4J6K1K10K12K14U30K19K2K22K24K31K4K5K8L1L11L13L15L17L21L23L25L27L3L31L4L6L9M10M12
M14M18M20M22M24M26M5M8N1N11N13N17N19N21N23N25N27N31N34N4N6P12P14P16P18P20P22P24P26P5P8R11R13R15R17R19R21R23R25R27R30R33R34R4R6T1T10T12T14T16T18T22T24T26T28T29T30T31T32T5T8U1U11U13U15U17U19U21U23U25U32U4U9V10V12V14V16V18V20V22V24V26V5V8W11W13W15W17W19W4W6W9
U1 AR12AM11AR6AH1
AU11AM12AL2AU6
AV19
AV21
AV20
AV18
AV17
AU19
AU21
AU20
AU18
AU17
AV24
AV26
AV25
AV23
AV22
AU24
AU26
AU25
AU23
AU22
AM21
AM19
AM20
AV31
AV30
AV32
AU31
AU30
AU32
AV28
AV27
AV29
AU28
AU27
AU29
AM23
AM25
AM24
AK18
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AR3
AN9AP6
AP2AM10
U1
N29
L30
N28
M30
P28
P29
K34
J34
H34N30
AU8
A27A28
J23
G23
J24
G24
G25
H23
F23
H24
F24
F25
G26
J25
H25
F26
A24A25
A21A22
AV12
AP27
AR34AT34
AN27
AN28
AN29
AM27
AL27
AP28
AP29
AR30
AL34AM34
AH34AJ34
051-9584
2.0.0
7 OF 23
7 OF 46
2 7 12
2 3 4 5 6 7 10 11 12 14 18 19 20 21
19
11
2 3 4 5 6 7 10 11 12 14 18 19 20 21
21
21
19
19
21
21
2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 7 12
21
21
21
21
19
19
19
19
19
19
11
15
15 21
15 21
11
21
21
11
11
11
11
11
21
21
19
VEN
VOUT
GND
VIN
G
SYM_VER_1
D
S Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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D
8 7 6 5 4 3
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B
A
NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
VDD (3.0V)
516S1040 PLUG
WIFI FLEX PAC:
R970 TO VIB NET MINIMIZEDCR
ON MLB ----> MIC2/3 BIAS,
STROBE NTC
STROBE:
STROBE:
VIBE DRIVE
PAC SPI BUSWIFI FLEX PAC:
VIBE RETURN
BUTTON FLEX
MIC2_P,_N
BUTTONS:RINGER, HOLD,VOL_UP/DOWN
516S1041 RCPT (FLEX)
MIC2 (ANC REF MIC):
LED COOL
(VIBE DRIVER, BUTTONS, ANC REF MIC, STROBE, STROBE_NTC)
12V-33PF01005-1
120-OHM-210MA
01005
100PF5%10V
NP0-C0G01005
120-OHM-210MA
01005
120-OHM-210MA
01005
120-OHM-210MA
01005
01005NP0-C0G
10V
100PF5%
01005NP0-C0G
10V
100PF5%
5%
NP0-C0G10V
01005
100PF
01005-112V-33PF
01005-112V-33PF
12V-33PF01005-1
27PF
NP0-C0G16V
01005
5%100PF
NP0-C0G16V5%
01005
M-ST-SM105847-018
01005
5%6.3V
56PF
NP0-C0G
01005
120-OHM-210MA
120-OHM-210MA
01005
NP0-C0G01005
56PF6.3V5%
0201-1
1.0UF
X5R
20%6.3V
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUESHORT-10L-0.1MM-SM
01005
120-OHM-210MA
56PF6.3V01005
5%
120-OHM-210MA
01005
010056.3V
56PF5%
120-OHM-210MA
01005
6.3V01005
5%56PF
16VNP0-C0G
5%100PF
01005
BAS40LPLLP-DFN1006-2
01005
1/32WMF
0%
0.00
NOSTUFFLP5907UVX-3.3V
USMD
NOSTUFF
MF01005
1/32W
100K
NOSTUFF
5%
100PF5%
01005NP0-C0G
16V
1%10K1/32WMF01005
DFN1006H4-3DMN3730UFB4
56PF6.3V
01005NP0-C0G
5%
SM
20%6.3V
4.7UF
X5R0402
1/32W
01005MF
0%
0.00
5%
NP0-C0G6.3V
56PF
01005
1/32WMF
0%
0.00
01005
SYNC_DATE=N/ASYNC_MASTER=N/A
BUTTON FLEX B2B
BUTTON_TO_AP_VOL_UP_CONN_LBB_TO_ANT_PAC_SPI_CS_BUTTON_CONN_L
BB_TO_ANT_PAC_SPI_MOSI_BUTTON_CONNBB_TO_ANT_PAC_SPI_SCLK_BUTTON_CONN
MIC2_TO_CODEC_PMIC2_TO_CODEC_NBUTTON_TO_AP_HOLD_KEY_CONN_L
CODEC_TO_MIC2_BIAS_CONN
BUTTON_TO_AP_RINGER_A_CONN
BUTTON_TO_AP_VOL_DOWN_CONN_L
PP_VIBE
PP3V0_ALWAYS_CONN
PP3V0_ALWAYS_CONN
PP3V0_ALWAYS
PP_STRB_DRIVER_TO_LED
PGND_VIBE_RETURN
PP_VIBE
CODEC_TO_MIC2_BIAS_CONN
CAM_RF_TO_STROBE_NTC_CONNMIC2_TO_CODEC_NMIC2_TO_CODEC_P
PP_CODEC_TO_MIC2_3_BIAS
PGND_VIBE_RETURN
CAM_RF_TO_STROBE_NTC
BUTTON_TO_AP_VOL_DOWN_L
BB_TO_ANTENNA_PAC_SPI_CS_L
BB_TO_ANTENNA_PAC_SPI_MOSI
BB_TO_ANTENNA_PAC_SPI_SCLK
BUTTON_TO_AP_VOL_UP_L
BUTTON_TO_AP_RINGER_A
BUTTON_TO_AP_HOLD_KEY_L
PP_BATT_VCC
VIB_LDO_EN
VIB_PWM VIBE_PWM_G
PP3V3_VIB
PP3V0_VIBE
DZ11
2
FL31 2
C314 1
2
FL71 2
FL81 2
FL461 2
C311 1
2
C197 1
2
C313 1
2
DZ21
2
DZ31
2
DZ71
2
C2081
2
C2411
2
J2
19
20
2122
1
10
11 12
13 14
15 16
17 18
2
3 4
5 6
7 8
9 C244 1
2
FL471 2
FL2112
C451
2
C2161
2
XW411
2
FL701 2
C384 1
2
FL711 2
C3831
2
FL721 2
C382 1
2
C120 1
2
D3
A
K
R701 2
U70
B2
B1
A1 A2
R691
2
C1201 1
2
R94011
2
Q7
3
1
2
C3971
2
XW801 2
C1181
2
R9701 2
C6971
2
R9771 2
051-9584
2.0.0
8 OF 23
8 OF 46
8 9 22
8 9
8
8
8
8
12 16
15
8
8
8
8 9
8 9 22
10 11
8
15
3 13
23
23
23
3 13
3 13
3
12 15 22 23
3
3
12
AIN1-
AIN2+
AIN2-
AIN6+
AIN6-
DMIC2_SCLKDMIC2_SD
DMIC1_SDDMIC1_SCLK
AIN8+
AIN7-
AIN7+
AIN5-
AIN4+
AIN1+
LINEOUT_REF
AOUT2-AOUT2+
AOUT1-AOUT1+
AIN8-
AIN5+
AIN4-
AIN3-AIN3+
LINEOUTBLINEOUTA
HPOUTAHPOUTB
HS3
HS4
HS3_REFHS4_REF
HPDETECT
DNDP
MBUS_REF
SYM 1 OF 3
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
15OHM FOR TRISTAR, 20OHM FOR TRISTAR2R102, R103 VALUE CONTROLLED VIA BOMOPTION
MIKEY TO TRISTAR
MIC IN
ANALOG
N/C,INTERNAL WEAK BIAS TO VCM
HEADPHONE
ANC
N/C,INTERNAL WEAK BIAS TO VCM
REF MIC1
N/C,INTERNAL WEAK BIAS TO VCM
50PF LIMIT ON AOUTX PINS
WHICH INPUT FOR WHICH MIC, ETC.
(ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS)
AUDIO I/O
LINEIN
LINEIN
ANCREF MIC2
ANC
ANALOG
ERROR MIC
PRIMARY
ANALOG
MIC
HEADPHONES
ANC ERROR MIC
ANC REF MIC
HEADPHONE MIC
VOICE MIC
L67 AUDIO CODEC
TO DO: REVIEW AUDIO MIC PATHS,WHICH BIAS OUTPUT USED FOR WHICH MIC,
(VOICE) MIC
NP0-C0G
56PF
01005
6.3V5%
20% X5R4V 01005
0.1UF
01005
56PF
NP0-C0G6.3V5%
01005X5R
4V20%
0.1UF
20%
0.1UF
01005X5R
4V
6.3V5%
NP0-C0G01005
56PF6.3V5%
01005NP0-C0G
56PF4V
0.1UF
20% X5R01005
01005
0.1UF
20%4V
X5R
NP0-C0G01005
6.3V5%56PF56PF
6.3V
01005NP0-C0G
5%X5R
01005
0.1UF
20%4V
10%
01005X5R6.3V
0.01UF
01005
0.01UF
10%6.3VX5R
6.3V
01005
5%
NP0-C0G
56PF
20%01005
0.1UF
4VX5R
01005NP0-C0G6.3V5%56PF20% X5R
4V
0.1UF
01005
01005
6.3V5%
56PF
NP0-C0GNP0-C0G01005
5%56PF
6.3V
5%
NP0-C0G01005
10V
100PF
100PF10V
01005NP0-C0G
5% NOSTUFF
01005MF5%
15.0
1/32W
OMIT_TABLE
1/32W5% MF
01005
15.0
OMIT_TABLE
01005
10VNP0-C0G
5%
100PF
01005
0.01UF
10%6.3VX5R
WLCSP
CS42L67-CWZR-A0
SYNC_DATE=N/ASYNC_MASTER=N/A
L67 AUDIO CODEC (1/2)
CODEC_TO_HPHONE_HS4
90_CODEC_BI_TRISTAR_MIKEYBUS_P
RCVR_TO_CODEC_RCVR_TEST_L67
HPHONE_TO_CODEC_DET
CODEC_TO_HPHONE_HS3
EXTMIC_TO_CODEC_L67_N
CODEC_TO_HPHONE_HS4_REFCODEC_TO_HPHONE_HS3_REF
90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P
90_CODEC_BI_TRISTAR_MIKEYBUS_N
HAC_TO_CODEC_TEST_L67
EXTMIC_TO_CODEC_L67_P
MIC3_TO_CODEC_L67_PMIC3_TO_CODEC_L67_N
HPHONE_TO_CODEC_HPHONE_TEST_L67
MIC2_TO_CODEC_L67_PMIC2_TO_CODEC_L67_N
MIC1_TO_CODEC_P
HAC_TO_CODEC_TEST
HPHONE_TO_CODEC_HPHONE_TEST
RCVR_TO_CODEC_RCVR_TEST
MIC1_TO_CODEC_N
MIC2_TO_CODEC_N
EXTMIC_TO_CODEC_N
EXTMIC_TO_CODEC_P
MIC3_TO_CODEC_N
CODEC_TO_HPHONE_R
CODEC_TO_RCVR_P
CODEC_TO_HAC_PCODEC_TO_HAC_N
MIC1_TO_CODEC_L67_N
CODEC_TO_HPHONE_L
CODEC_TO_RCVR_N
MIC2_TO_CODEC_P
MIC3_TO_CODEC_P
MIC1_TO_CODEC_L67_P
C2301
2
C2221 2
C2271
2
C2241 2
C2231 2
C2311
2
C2281
2
C2251 2
C551 2
C651
2
C641
2
C611 2
C3541 2
C3561 2
C2291
2
C2201 2
C2261
2
C2211 2
C236 1
2
C235 1
2
C1381 2
C511
2
R1021 2
R1031 2
C1431 2
C3621 2
U21
G1G2
F3F4
F1F2
E3E4
E2E1
D2D1
D4D3
C2C1
L7K7
K5L5
B6A6
A2A3
G10F10
G8
J9K9
K1
L9
L2
L8
K8
J8H8
F11
051-9584
2.0.0
9 OF 23
9 OF 46
17
16
17
17
17
17
16
17 22
11
17
11
17
8
17
17
11
17
11
11
11
17
11
8 22
11 22
MIC3_BIAS
MIC2_BIAS_FILT_IN
MIC2_BIAS_FILT
FLYP
VD
FLYC
MIC1_BIAS
MIC2_BIAS_IN
MIC2_BIAS
VCP
MIC1_BIAS_FILT
MIC3_BIAS_FILT
MIC4_BIAS_FILTMIC4_BIAS
GNDHS0
GNDHS1
GNDD
VA
VPROG_CP
VL
VP
+VCP_FILT
GNDCP0
GNDCP1
-VCP_FILT
GNDP
SPEAKER_VQ
FILT+FILT-
GNDA
FLYN
SYM 2 OF 3
XSP_LRCK/FSYNCXSP_SDIN/DAC2B_MUTE
WAKE*
MCLK
ASP_LRCKASP_SDINASP_SDOUT
VSP_SCLK
VSP_SDOUT
VSP_LRCK/FSYNC GND
INT*
CDOUTCDIN
CS*
VSP_SDIN
ASP_SCLK
XSP_SCLK
TSTI
TSTO
RESET*
CCLK
XSP_SDOUT
SYM 3 OF 3
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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8 7 6 5 4 3
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NOTICE OF PROPRIETARY PROPERTY:
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DSIZEDRAWING NUMBER
REVISION
BRANCH
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THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
KEEP THESE CAPS AT CODEC PINS
DIGITAL SYSTEM I/OPOWER, MICBIAS
L67 AUDIO CODEC
KEEP THIS CAP AT CODEC PINS
TSTO MUST BE NC
KEEP THIS CAP AT CODEC PINS
KEEP THESE CAPS AT CODEC PINS
PCB: C421 AT U21.L6
KEEP THESE CAPS AT CODEC PINS
X5R
20%0.1UF
01005
4V
0.1UF4V20%
X5R01005
0402-1CERM-X5R6.3V20%10UF
OMIT_TABLE10%6.3VX5R
0.1UF
201
X5R-CERM1
4.7UF20%6.3V
402
0.1UF10%6.3VX5R201
CERM-X5R
20%
0402-1
6.3V
10UF
X5R6.3V
1.0UF20%
0201-1
01005
1%1/32W
2.21K
MF
20%4.7UF6.3V
402X5R-CERM1
5%
MF01005
1/32W
1.00K
402
4.7UF
X5R-CERM16.3V20%
402
20%
4.7UF
6.3VX5R-CERM1
6.3VX5R
1.0UF20%
0201-1
CERM-X5R0402-1
6.3V20%
10UF
20%6.3V
402
4.7UF
X5R-CERM1
6.3V
4.7UF
402X5R-CERM1
20%
6.3VX5R-CERM1402
20%4.7UF
402
4.7UF6.3V20%
X5R-CERM1
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
WLCSP
CS42L67-CWZR-A0
WLCSP
CS42L67-CWZR-A0
120-OHM-210MA
01005
SYNC_DATE=N/ASYNC_MASTER=N/A
L67 AUDIO CODEC (2/2)
PP_EXTMIC_BIAS_FILT_IN
PP_EXTMIC_BIAS
PP1V7_VA_L67
PP1V8_SDRAM
PP_CODEC_VCPFILT-
PP_CODEC_SPKR_VQ
PP_CODEC_FILT+
PP1V8
PGND_MIC2_3_TO_CODEC_RET_FILT
PP_CODEC_VHP_FLYC
PP_CODEC_VCPFILT+
AP_TO_CODEC_SPI3_MOSI
PP_EXTMIC_BIAS_FILT
PP_CODEC_TO_MIC1_BIAS
PP_CODEC_TO_MIC2_3_BIAS
PP_VCC_MAIN
PP_EXTMIC_BIAS_IN
PP_CODEC_VHP_FLYN
PP_CODEC_VHP_FLYP
CODEC_TO_AP_XSP_I2S2_DIN
AP_TO_CODEC_SPI3_CLK
CODEC_RESET_L
45_AP_TO_CODEC_XSP_I2S2_BCLK
45_AP_TO_CODEC_ASP_I2S0_BCLK
AP_TO_CODEC_VSP_I2S4_DOUT
AP_TO_CODEC_SPI3_CS_L
CODEC_TO_AP_SPI3_MISO
CODEC_TO_AP_INT_L
AP_TO_CODEC_VSP_I2S4_LRCLK
CODEC_TO_AP_VSP_I2S4_DIN
45_AP_TO_CODEC_VSP_I2S4_BCLK
CODEC_TO_AP_ASP_I2S0_DINAP_TO_CODEC_ASP_I2S0_DOUTAP_TO_CODEC_ASP_I2S0_LRCLK
45_AP_TO_CODEC_I2S_MCLK
CODEC_TO_PMU_MIKEY_INT_L
AP_TO_CODEC_XSP_I2S2_DOUTAP_TO_CODEC_XSP_I2S2_LRCLK
PGND_CODEC_GNDCP
PGND_MIC1_TO_CODEC_RET_FILT
PP_VCC_MAIN_CODEC
PP1V8_SDRAM
C4221
2
C4211
2
C4201
2
C4131
2
C4161
2
C2341
2
C4141
2
C4121
2
R1001
2
C2381
2
R1451
2
C21812
C21912
C2371
2
C424 1
2
C2321
2
C2331
2
C4291
2
C4251
2
XW431 2
XW481 2
U21
H2H1
G9H10
J10H9
J11
J2
K10L11
A10
L1K2
K6
L10
J5
J6
L3
K3
K4
L4
H7G6
H6H5
K11
J7
J1
G11
A11
B10
B9
L6
H11
U21
B11C10
C9A8
B4B3A4
B5
A1C5
F6F7F8G7H3H4J3J4
B1F9D5D7E5E6E7F5
G4
A9
G3
D8D9B2C3C4C11
E10E11A5C6C8D6
E8E9
D10D11
G5
B7B8
C7A7FL96
12
051-9584
2.0.0
10 OF 23
10 OF 46
3 4 10 12 13 14 16 23
2 3 4 5 6 7 11 12 14 18 19 20 21
3
17
8 11
12 13 14 23
3 15
3
3 15
3
3
3
3
3
3
3
3
3
3
3
3
13
3 15
3 15
3 4 10 12
13
14 16
23
SYM_VER-2
G
SYM_VER_1
D
S
SYM_VER-2
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
FRONT CAM:POWER AND MIPI
NOTE: J1.30 IS GND ON POR BOARDS,J1.30 IS ALS_INT FROM FF CAM FORSPECIAL CONFIG OF PROTO2(CONTROLLED VIA BOMOPTION)
516S0986 RCPT
FCAM ANALOG GROUND
NOTE: MIC3_TO_CODEC_NNOTE: MIC3_TO_CODEC_P
CG FLEX B2B
MIPI GROUND
MIPI GROUND
MIPI GROUND
CLK, I2C, SHDN
PCB: PLACE THESE AT J1 CONN
THIS ON ONE MLB --->516S0987 PLUG
(FF CAM, PROX, ALS, RECEIVER, ANC ERROR MIC)
(ANC ERROR MIC)
CAM1 ALS INT
PROX: PWR, TX EN
RX, RX_ENPROX: POWER,
-21.4 DB SIGNAL OF HAC VPP
I2C, INT
5 MA
0.25 MA
ALS: POWER,
HAC
RECEIVER
50 MA
NOTE: IRLED_A
SPECIAL Z = 0.60 MM MAX
IRLED = 104-128MA
MIC3
PROX GROUND
-21.4 DB SIGNAL OF RCVR VPP
FRONT CAM:
PROX_RX SIGNAL MUST BE TREATED WITH CARE
1/32WMF01005
1%10K
01005-1
70-OHM-300MA
120-OHM-25%-250MA-0.5DCR
01005
01005
120-OHM-25%-250MA-0.5DCR
NO_XNET_CONNECTION=TRUE01005-1
70-OHM-300MA
F-ST-SMAA22L-S034VA1
X5R6.3V
603
20%4.7UF
OMIT_TABLE
5%
NP0-C0G6.3V
01005
56PF
6.3V
56PF5%
NP0-C0G01005
120-OHM-210MA01005
1/20W
201
11.51%
MF
01005
0.1UF20%4VX5R
01005
5%6.3VNP0-C0G
56PF
01005NP0-C0G
6.3V5%
56PF
1.00M5%1/32WMF01005
TCM0605-190-OHM-50MA
DFN1006H4-3DMN3730UFB4
56PF6.3V
01005NP0-C0G
5%
120-OHM-210MA
01005
12V-33PF01005-1
56PF5%6.3V
01005NP0-C0G
5%6.3V
01005NP0-C0G
56PF
120-OHM-25%-250MA-0.5DCR
01005
01005
120-OHM-25%-250MA-0.5DCR
120-OHM-25%-250MA-0.5DCR
01005
NP0-C0G01005
5%6.3V
56PF
01005
56PF5%6.3VNP0-C0G
56PF6.3V
01005NP0-C0G
5%
NP0-C0G6.3V
5%56PF
01005
01005
6.3VNP0-C0G
5%56PF
NP0-C0G6.3V5%56PF
01005
TCM0605-190-OHM-50MA
56PF
01005
5%6.3VNP0-C0G
6.3V
01005
56PF5%
NP0-C0G
01005
120-OHM-25%-250MA-0.5DCR
1.0UF6.3V20%
X5R0201-1
1/32W0%
0.00
01005MF
01005120-OHM-210MA
01005120-OHM-210MA
120-OHM-210MA01005
01005-112V-33PF
56PF6.3V5%
01005NP0-C0G
0.1UF
X5R
20%
01005
4V
70-OHM-300MA
01005-1
15.8K1%
MF1/32W
01005
01005-1
70-OHM-300MA
12V-33PF01005-1
12V-33PF01005-1
01005-1
70-OHM-300MA
01005-1
70-OHM-300MA
01005
0.1UF
X5R4V20%
10K1%
MF01005
1/32W
15.8K
MF
1%1/32W
01005 0402
20%
X5R
4.7UF6.3V
SHORT-10L-0.1MM-SM
NO_XNET_CONNECTION=TRUE
1UF6.3V20%
X5R0201
FF_ALS_INT
01005
0.00
1/32W0% MF
0.00
MF
NO_FF_ALS_INT
0%1/32W 01005
SYNC_MASTER=N/A SYNC_DATE=N/A
CG FLEX B2B
90_CAM1_TO_AP_MIPI_CLK_CONN_N90_CAM1_TO_AP_MIPI_CLK_CONN_P
90_CAM1_TO_AP_MIPI_DATA0_CONN_N90_CAM1_TO_AP_MIPI_DATA0_CONN_P
PP2V8_CAM_AVDD
PP3V0_PROX_IRLED
FCAM_TO_AP_ALS_INT_L
CUMULUS_TO_PROX_TX_EN_BUFF
PP2V8_FCAM_CONN
PP1V8_FCAM_CONN
CODEC_TO_RCVR_CONN_P
CODEC_TO_HAC_CONN_PCODEC_TO_HAC_CONN_N
AP_TO_I2C2_SCL_ALS_CONNALS_TO_AP_INT_CONN_L
PP3V0_ALS
AP_BI_I2C2_SDA_ALS_CONNCUMULUS_TO_PROX_RX_EN_1V8_CONN
45_PROX_TO_CUMULUS_RX_CONN
AP_BI_CAM_FF_SDA_CONN
45_AP_TO_CAM_FF_CLK_CONN
AP_TO_CAM_FF_SCL_CONN
AP_BI_I2C2_SDA
CODEC_TO_RCVR_CONN_N
AP_TO_CAM_FF_SHUTDOWN
AP_TO_CAM_FF_SHUTDOWN_CONN
PP3V0_PROX_ALS
PP3V0_PROX_ALS
ALS_TO_AP_INT_L
CUMULUS_TO_PROX_RX_EN_1V8
45_AP_TO_CAM_FF_CLK
PGND_IRLED_DRAINAP_TO_I2C2_SCL
AP_BI_CAM_FF_SDA
RCVR_TO_CODEC_RCVR_TEST
CODEC_TO_HAC_NHAC_TO_CODEC_TEST
CODEC_TO_HAC_P
CODEC_TO_RCVR_PCODEC_TO_RCVR_N
90_CAM1_TO_AP_MIPI_DATA0_P
AP_TO_CAM_FF_SCL
45_PROX_TO_CUMULUS_RX
90_CAM1_TO_AP_MIPI_DATA0_N
PP3V0_PROX
MIC3_TO_CODEC_PMIC3_TO_CODEC_N
PP_CODEC_TO_MIC3_BIAS_CONNFCAM_TO_AP_ALS_INT_CONN_L
PGND_IRLED_K
PP_CODEC_TO_MIC2_3_BIAS
90_CAM1_TO_AP_MIPI_CLK_N90_CAM1_TO_AP_MIPI_CLK_P
PP1V8
R31
2
FL571 2
L351
2 3
4
L391
2 3
4
C441
2
C402 1
2
C410 1
2
R451
2
C407 1
2
C671
2
C200 1
2
R851
2
Q13
1
2
C2531
2
FL481 2
DZ161
2
C1981
2
C1921
2
FL131 2
FL151 2
FL121 2
C2021
2
C1961
2
C621
2
C63 1
2
C2011
2
C2111
2
C2121
2
C2101
2
FL141 2
C194 1
2
R12512
FL5812
FL21 2
FL201 2
DZ171
2
C1991
2
C561
2
FL5112
R91
2
FL5212
DZ181
2
DZ191
2
FL651 2
FL641 2
R941
2
R951
2
C2561
2
XW421
2
C3801
2
R1331 2
R1321 2
FL4412
FL4512
FL41 2
FL231 2
J1
35 36
37 38
39
40
1
10
11 12
13 14
15 16
17 18
19
2
20
21 22
23 24
25 26
27 28
29
3
30
31 32
33 34
4
5 6
7 8
9
C1931
2
051-9584
2.0.0
11 OF 23
11 OF 46
12 21
12
3
18
3
7
11 12
11 12
3
18
7
3
7
9
9 9
9
9
9
7
7
18
7
9 22
9
8 10
7
7
2 3 4 5 6 7 10 12 14 18 19 20 21
S
G
D
G
S
D
G
S
D
GND
VOUT
ON
VIN
CPUA_EN
VDD_BUCK2R
BUCK2_LXM
VDD_BUCK2LM
VDD_BUCK4
BUCK0A_LXM
VDD_BUCK0A
BUCK0A_LXL
BUCK0B_LXM
VDD_BUCK0BVDD_BUCK0C
CPUB_EN
VBAT
ACT_DIO
BUCK0A_FB
IBAT
BUCK3_FB
VCC_MAIN
VDD_BUCK3
CHG_LX
BUCK3_LX
VCENTER
CPUB_SW_OUT
VCC_MAIN_S
VBUCK3_SW
VBUS
TCAL
CPUA_SW_OUT
VPUMP
TDEV4
TBAT
VBUCK4_SW
XTAL2
VDD_LDO5
XTAL1
TDEV2VLDO1
VDD_LDO2
VDD_LDO9
VDD_LDO12VDD_LDO11VDD_LDO10
VLDO4
VLDO7
ON_BUF
VLDO3
VLDO8
VIB_PWM_EN
VLDO5
TDEV1
TDEV3
VDD_LDO1_6
VLDO6
VLDO2
VLDO9
VLDO12VLDO11VLDO10
VDD_LDO4_7
VDD_LDO16
VLDO16
VDD_VIBVIB
VDD_LDO3_8
WDIG_SW
CPU1V2_SW
BUCK4_FBBUCK4_LXMBUCK4_LXL
CPU1V8_SW
BUCK0C_FB
BUCK2_FBBUCK2_LXR
BUCK2_LXL
BUCK0C_LX
BUCK0B_FBBUCK0B_LXL
CPUB_SW_S
CPUA_SW_S
(1 OF 3)
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
NOTE: ROUTE TRACES BETWEEN LDO AND CAP TO ALLOW 0.050 OHM ESR
TBD: VALUE MUST BE TUNED
H5P NTC
PLACE CLOSE TO PMU
NOTE: PLACE C987 UNDERNEATH C270
SAME POLARITY
THIS XW LINK AT PMU AREA
RADIO PA NTC
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
PLACE CLOSE TO PMU
SAME POLARITY
TO SOC
19-25 MILLIOHM
PLACE CLOSE TO PMUPLACE CLOSE TO PMUPLACE CLOSE TO PMU
SAME POLARITY
CAMERA NTCFOREHEAD NTC
CALIBRATION
L11-L13 POLARITY ALL SAME
01005
18PF16V
CERM
2%
2012-1
32.768K-20PPM-12.5PF
18PF
CERM
2%16V
01005
0.01UF
201
10%
X5R10V
1UF25V10%
0402X5R
20%6.3VX5R-CERM1402
4.7UF
15UF4V20%
X5R0402 0402
15UF4VX5R
20%
20%0.1UF6.3VX5R-CERM01005
0201-1X5R-CERM
20%10V
1.0UF
20%6.3VCERM-X5R0402-1
10UF
OMIT_TABLE
20%1.0UF6.3VX5R0201-1
10UF6.3V20%
0402-1CERM-X5R
OMIT_TABLE
6.3V
10UF20%
CERM-X5R0402-1
OMIT_TABLE
CERM-X5R0402-1
6.3V
10UF20%
OMIT_TABLE
20%6.3V
0402-1OMIT_TABLE
10UF
CERM-X5R
6.3V20%
CERM-X5R0402-1
10UF
OMIT_TABLE0402-1CERM-X5R
20%6.3V
10UF
OMIT_TABLE0402-1
6.3V20%10UF
CERM-X5R
OMIT_TABLE
6.3V
0402-1
20%
CERM-X5R
10UF
OMIT_TABLE
NO_XNET_CONNECTION=TRUE
020110KOHM-1%-0.31MA
I382
10KOHM-1%-0.31MA
NO_XNET_CONNECTION=TRUE
0201
I390
NO_XNET_CONNECTION=TRUE
020110KOHM-1%-0.31MA
I394
MF
3.92K0.1%1/20W
020116V5%
NP0-C0G01005
100PF
16V
01005NP0-C0G
5%100PF
BGACSD68803W15
15UF4VX5R
20%
0402 0402
15UF4VX5R
20%
0201-1
20%10VX5R-CERM
1.0UF
CSD58874W1015
BGA BGA
CSD58874W1015
CERM-X5R0402-1
10UF6.3V20%
0402X5R
15UF4V20%
X5R-CERM1
4.7UF
402
6.3V20%
SHORT-10L-0.1MM-SM
NO_XNET_CONNECTION=TRUE
SHORT-10L-0.1MM-SM
NO_XNET_CONNECTION=TRUE
SHORT-10L-0.1MM-SM
NO_XNET_CONNECTION=TRUE
SHORT-10L-0.1MM-SM
NO_XNET_CONNECTION=TRUE
SHORT-10L-0.1MM-SM
NO_XNET_CONNECTIO=TRUE
SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM
01005
0.01UF10%
6.3VX5R
NOSTUFF
01005
0.01UF10%
6.3V
NOSTUFF
X5R
NOSTUFF
6.3VX5R
10%0.01UF
01005
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
2.2UH-20%-1.7A-200MOHM
TFA201610G-SM
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
1.5UH-20%-2A-0.142OHM
TFA201610G-SM
TFA201610G-SM
1.5UH-20%-2A-0.142OHM
TFA201610G-SM
1.5UH-20%-2A-0.142OHM
1.5UH-20%-2A-0.142OHM
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
TFA201610G-SM
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
TFA201610G-SM
2.2UH-20%-1.7A-200MOHM
20%15UF
0402
4VX5R
15UF
0402
4V20%
X5RX5R
15UF
0402
4V20%
10UF6.3V20%
CERM-X5R0402-10402-1
10UF20%6.3VCERM-X5R
10UF
0402-1CERM-X5R6.3V20%
0402-1
6.3VCERM-X5R
20%10UF
0402-1
10UF6.3V20%
CERM-X5R
0402-1CERM-X5R6.3V20%10UF
MF1/32W 01005
68.1K
1%
NOSTUFF201
10%
X5R6.3V
0.1UF
201NOSTUFF
0.1UF
X5R
10%6.3V
0402
15UF4VX5R
20%15UF
X5R0402
4V20%
0402
15UF4VX5R
20%
0402
15UF4VX5R
20%
X5R
20%15UF4V
0402
15UF
0402
4VX5R
20%
0402-1CERM-X5R6.3V20%10UF
OMIT_TABLE
20%6.3V
0402-1CERM-X5R
10UF
OMIT_TABLE
20%
X5R4V
0402
15UF 15UF
0402
4VX5R
20%
SM
SOD523
PMEG3010EB/S500
100PF
NO_XNET_CONNECTION=TRUE
5%16V
NP0-C0G01005
NO_XNET_CONNECTION=TRUE
NP0-C0G
5%100PF
16V
01005
NO_XNET_CONNECTION=TRUE
5%100PF
16VNP0-C0G
01005
CSPTPS22924X
SHORT-10L-0.1MM-SM
5%100PF
NO_XNET_CONNECTION=TRUE
16VNP0-C0G
01005
NO_XNET_CONNECTION=TRUE
020110KOHM-1%-0.31MA
I649
10UF20%
6.3V
0402-1CERM-X5R
0201
56PF25V5%
NP0-C0G-CERM
10.2
MF1/32W1%
01005
15UF
0402
4VX5R
20%20%
X5R4V
0402
15UF20%
X5R4V
0402
15UF20%
X5R4V
0402
15UF
CERM0402
6.3V20%10UF
OMIT_TABLE0402
6.3VCERM
20%10UF
OMIT_TABLE
6.3VCERM
20%10UF
0402
OMIT_TABLE
0402
6.3VCERM
20%10UF
OMIT_TABLE
10UF20%6.3VCERM0402
OMIT_TABLE
0402
20%6.3VCERM
10UF
OMIT_TABLE
10UF6.3V
0402
20%
CERM
OMIT_TABLE
10UF20%6.3VCERM0402OMIT_TABLE
10UF20%6.3VCERM0402
OMIT_TABLE0402
10UF20%
CERM6.3V
OMIT_TABLE
6.3V20%10UF
CERM0402
OMIT_TABLE
01005NP0-C0G
56PF6.3V5%
01005NP0-C0G
16V5%
100PF5%16V
01005NP0-C0G
100PF56PF
01005
5%6.3VNP0-C0G
20%6.3VX5R
1.0UF
0201-1
D2013B28HGAHVCC2BGA
6.3V
10UF20%
0402-1CERM-X5R
AGATHA PMU(1/2)SYNC_DATE=N/ASYNC_MASTER=N/A
VCENTER
PP5V0_USB_PROT
ACT_DIO
BATTERY_TO_PMU_SENSE
PP_BATT_VCC
BUCK0A_LXL
PP_VCC_MAIN
USB_VBUS_DETECT
PP1V7_VA_L20
PP2V5_CAM0_AF
PP3V0_ACC
BUCK4_FB
PP3V0_ALWAYS
PP3V0_VIBE
PP1V2_SDRAM
PP1V0
PP3V0_PROX_IRLED
BATTERY_TO_PMU_NTC
CPU0_SW_S
BUCK0C_FB
NTC_H5P_P
CPU0_SWITCH
BUCK2_LXM
BUCK0A_LXM
BUCK0B_LXM
CPU1_SWITCH
BUCK0A_FB
BUCK3_FB
VSW_CHG
BUCK3_LX
CPU1_SW_CONTROL
TCAL
CPU0_SW_CONTROL
VPUMP
NTC_H5P_P
OSC32OOSC32I
NTC_CAM_P
PP1V8_SDRAM
PP3V0_IMU
PP1V8_ALWAYS
PP3V3_USB
PP3V0_PROX_ALS
PP3V0_NAND
NTC_FOREHEAD_P
NTC_PA_P
PP2V8_CAM_AVDD
PP1V0_SRAM
PP1V8_GRAPE
PP1V2
BUCK4_LXMBUCK4_LXL
PP1V8
BUCK2_FBBUCK2_LXR
BUCK2_LXL
BUCK0C_LX
BUCK0B_FBBUCK0B_LXL
CPU1_SW_S
VCENTERPP1V1_CPU0_FET
PGND_CAM0_AF_RET
NTC_PA_P
NTC_FOREHEAD_N NTC_CAM_N
NTC_CAM_P
PP1V8_SDRAM PP1V8
RESET_1V8_L
NTC_PA_N
PP1V1_CPU0 PP1V1_CPU1
NTC_H5P_N
NTC_FOREHEAD_P
PP1V1_CPU1_FET
PP2V5_CAM0_AF_COMP
PP1V1_CPUB
PP1V1_SOC
PP_VCC_MAIN
PP1V8_SDRAM
PP1V2_SDRAM
PP_VCC_MAIN
C260 1
2
C16 1
2
C251 1
2
Y21 2
C2631
2
C248 1
2
C2771
2
C2711
2
C2951
2
C2671
2
C2581
2
C2451
2
C2171
2
C1901
2
C2041
2
C2391
2
C2461
2
C2431
2
C2051
2
C1951
2
C2471
2
R57
1
2R110
1
2R108
1
2
R541
2
C207 1
2
C2551
2
Q5
A2B1B2C1
A1
A3B3C2C3
C2761
2
C3021
2
C2611
2
Q3
A1
B1
C1
A2
B2
C2
Q4
A1
B1
C1
A2
B2
C2
C3191
2
C2881
2
C171
2
XW10
12
XW16
12
XW15
12
XW17
12
XW201 2
XW61 2
XW81 2
XW91 2
C289 1
2
C269 1
2
C2831
2
L261 2
L24
12
L25
12
L111 2
L12
12
L13
12
L18
12
L23
12
L14
12
L15
12
L16
12
L17
12
C2921
2
C2901
2
C2851
2
C3081
2
C3031
2
C3101
2
C2961
2
C3171
2
C3161
2
R551 2
C2721
2
C2701
2
C2781
2
C2811
2
C3051
2
C3121
2
C2821
2
C3181
2
C1891
2
C2031
2
C2731
2
C3011
2
XW141 2
D4A K
C159 1
2
C167 1
2
C168 1
2
U11
C1
C2
A2B2
A1B1
XW111 2
C322 1
2
R90
1
2
C291 1
2
C4441
2
R561 2
C3911
2
C3891
2
C3851
2
C3791
2
C741
2
C921
2
C2501
2
C2651
2
C2931
2
C2941
2
C2571
2
C2991
2
C2621
2
C2641
2
C3781
2
C6861
2
C687 1
2
C689 1
2
C6881
2
C9871
2
U7
C2
D21A14A12
C22A18A16
C21A20
D2
A6A4A2
E22H22
D1
A10A8
H1H2
M22
L22
B19
L19N21
A22
J19K19
E1E2
P17
M4L4
Q1P2Q2M2
C1
K22
M21
L1L2
F1F2K1
J1J2
A13A17A21A5A1G22A9
P8P7P6Q12
Q3P4Q19Q10N22P5
Q17Q18P20
P3
Q9Q8Q7Q13
Q5P18P9P22Q4P10P19Q6
L21
K21
P1N1
051-9584
2.0.0
12 OF 23
12 OF 46
12
17
22
8 15 22 23
10 12 13 14 23
2
15
21
16
8 16
8
4 12
2 7
11
17 22
5
12
2
2
12
12
3 4 10 12 13 14 16 23
20
3
2
11
6
12
12
11 21
5
18
2 4
2 3 4 5 6 7 10 11 12 14 18 19 20 21
5
5
12
21
12 12
3 4 10 12 13 14 16 23 2 3 4 5 6 7 10 11 12 14 18 19 20 21
2 13 14 16 19 22 23
5 5
12
21
5
5
10 12 13 14 23
3 4 10 12 13 14 16 23
4 12
10 12 13 14 23
NC
(3 OF 3)VSS_BUCK0AB
VSS
VSS_BUCK2VSS_BUCK3VSS_BUCK24VSS_BUCK40
VSSA_BUCK2VSSA_BUCK3VSSA_BUCK40
VSS_WLEDVSS_LCM
VSS_BUCK0BC
VSS
VSS_SW_CHG
VSS_REF
(2 OF 3)VREF
DPHP
AMUX_A3AMUX_A2AMUX_A1AMUX_A0
AMUX_B7AMUX_BY
GPIO1GPIO2GPIO3GPIO4GPIO5GPIO6GPIO7GPIO8GPIO9
BUTTON1BUTTON2BUTTON3
GPIO10GPIO11GPIO12
LCM2_EN
ACC_DET
VDD_REF
AMUX_B4AMUX_B5AMUX_B6
AMUX_B2AMUX_B3
AMUX_B0AMUX_B1
SHDN
ADC_REF
VDD_RTC
SCL
KEEPACT
AMUX_AYAMUX_A7AMUX_A6
SDA
AMUX_A5AMUX_A4
ADC_IN7BRICK_ID
DWI_DODWI_DIDWI_CK
FW_DPHP_DET
VLCM3
VBOOST_LCMVLCM1
WLED1
IREF
VLCM2
WLED2
LCM_LX
WLED_LX
ACC_ID
VOUT_LED
IRQ*RESET*RESET_IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
EMC REVIEW REQUESTS THIS GO TO 1K
ACTIVE HIGH
GPIO11
I2C ADDRESS: 1110100X
ACCESS POINTS
VCC_MAIN OUPUT ’0’
PP1V8_SDRAM OUPUT ’0’INPUT, W/O PDPP1V8_SDRAM OUPUT ’0’PP1V8_SDRAM OUPUT ’0’INPUT, W/ PU IN BATTERY PCMINPUT, W/ PD IN PMU
INPUT, W/ PD IN PMU
OPEN DRAIN OUTPUTACTIVE HIGH INPUT W/ INTERNAL 200K PDOPEN DRAIN OUTPUT
INPUT, W/ PU TO PP1V8_SDRAM
GPIO3GPIO5GPIO6GPIO7
GPIO2GPIO4
GPIO1
GPIO12GPIO10GPIO9GPIO8
PP1V8_SDRAM OUPUT ’0’
PP1V8_SDRAM OUTPUT ’0’
RESET*IRQ*
PP1V8_SDRAM OUTPUT ’0’
RESET_IN
FROM H5P
1.8V --->
BASEBAND --->
1.8V --->1.8V --->BASEBAND --->
FROM TRISTAR
AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN
1.8V --->1.8V --->
1.8V --->1.8V --->
3.33V --->
DRIVEN TO VCC_MAIN ------------>
01005
1.00K
5%
MF1/32W
5%010051/32WMF
10K
1/32W
10K5% MF
01005
1/20W1% MF
200K
201
6.3VX5R10%
201
0.1UF
0201-16.3V20%
1.0UF
X5R
0.1UF
X5R10%2016.3V
0.01UF
01005X5R
6.3V10%
01005
1/32WMF
5%220K
SM
SM
SM
74LVC1G32SOT891
MF1/32W
01005
100K5%
5%
01005
1.00M
MF1/32W
0%
0.00
1/32WMF
01005
1%MF
1/32W6.34K
01005
0.01UF6.3V
01005X5R
10%
D2013B28HGAHVCC2BGA
D2013B28HGAHVCC2BGA
NP0-C0G10V5%100PF
01005
0.00
NOSTUFF
0%1/32WMF01005
SYNC_MASTER=N/A SYNC_DATE=N/A
AGATHA PMU(2/2)
E75_TO_PMU_ACC_DETECT
PMU_RESET_IN
45_AP_TO_PMU_DWI_DI
PMU_DWI_CLKAP_BI_I2C0_SDA
PMU_TO_BT_REG_ON
PMU_TO_BB_RST_L
TRISTAR_TO_PMU_USB_BRICKID
WDOG
PMU_TO_WLAN_REG_ON
45_AP_TO_PMU_DWI_CLK45_AP_TO_PMU_DWI_DO
RESET_1V8_LPMU_TO_AP_IRQ_L
IREF
PMU_DWI_DI
BUTTON_TO_AP_VOL_DOWN_L
TRISTAR_TO_PMU_USB_BRICKID_R
AP_TO_I2C0_SCL
RADIO_TO_PMU_ADC_SMPS1_MSMC_1V05
TRISTAR_TO_PMU_MIKEYBUS_TEST_NEG45_PMU_TO_WLAN_CLK32K
PMU_TO_BB_VBUS_DETWIFI_REG_ON_RBT_TO_PMU_HOST_WAKE
BUTTON_TO_AP_MENU_KEY_BUFF_L
BT_REG_ON_RCODEC_TO_PMU_MIKEY_INT_LWLAN_TO_PMU_HOST_WAKEAP_BI_BATTERY_SWI
TRISTAR_TO_AP_INT
BUTTON_TO_AP_MENU_KEY_BUFF_LBUTTON_TO_AP_RINGER_A
PP_VCC_MAIN
RADIO_TO_PMU_ADC_SMPS3_MSME_1V8
TRISTAR_TO_PMU_HOST_RESET
PP1V8_SDRAM
BUTTON_TO_AP_VOL_UP_L
BB_RST_PMU_R_L
LCD_PWR_EN
VREFVDD_REF
CHESTNUT_TO_PMU_ADCIN7
E75_TO_PMU_ACC_DETECT_R
BUTTON_TO_AP_RINGER_A
KEEPACT
VDD_RTC
TRISTAR_TO_PMU_USB_BRICKID_R
BUTTON_TO_AP_HOLD_KEY_BUFF_L
45_PMU_TO_WLAN_CLK32K
CHESTNUT_TO_PMU_ADCIN7
BUTTON_TO_AP_HOLD_KEY_BUFF_L
AP_TO_PMU_TEST_CLKOUT
PMU_AMUX_AY
RADIO_TO_PMU_ADC_LVS1PMU_AMUX_BY
TRISTAR_TO_PMU_MIKEYBUS_TEST_POS
RADIO_TO_PMU_ADC_LDO6_RUIM_1V8
BB_TO_PMU_HOST_WAKEPMU_AP_TO_LCM_RESET_L
PMU_DWI_DO
R601 2
R631 2
R641 2
R651 2
C3231 2
C3251 2
C3261 2
C327 1
2
R681
2
XW261 2
XW271 2
XW281 2
U142
1
3
6
4
R591
2
R661
2
R4871 2
R921
1 2
C3431
2
U7
D7D8
D17
L17L18M5M6M7M8M9M10M11M12
D18
M13M14M15M16
E6E7E8E9E10E11E12E13
D9
E14E15E16E17E18F6F7F8F9F10
D10
F11F12F13F14F15F16F17F18G5G6
D11
G7G8G9G10G11G12G13
G14G15G16
D12
G17G18H7H8H9H10H11H12H13H14
D13
H15H16H17H18J7J8J9J10J11J12
D14
J13J14J15J16J17J18K7K8K9K10
D15
K11K12K13K14K15K16K17K18L5L6
D16
L7L8L9L10L11L12L13L14L15L16
A15
A19
A3
A7J22
A11
P15
D22
G1G2
P16
G4E19E21
U7
B21
Q20
K2
F21
K6K5K4J6J5J4H6H5H4F4F5E4E5D4D5D6B1B2
M1
B12B13B14
B18
M19M18M17
N2
B3
B15B16B17
B4B5B6B7B8B9B10B11
P21
H21
G21
B20
Q15
D19J21
G19H19
F19
P12
B22F22
P13Q11
P11
Q22
Q21
P14Q14
Q16
C991
2
R4881
2
051-9584
2.0.0
13 OF 23
13 OF 46
5
16 17
3
3 14 15 16 20
23
23
16
2
23
3 14
3 14
2 12 14 16 19 22 23
3
3 8
13
3 14 15 16 20
23
16
13 23
23
23
3 13
10
23
3 22
3 16
3 13
3 8 13
10 12 14 23
23
16
3 4 10 12 14 16 23
3 8
14 19
13 14
3 8 13
3
13
3 13
13 23
13 14
3 13
2
22
23
22
16
23
23
19
SW
SDA
IN
SCL
VIO_SPI
HWEN
GND
OVP
ILED1
SCK
ILED2
SDI
NRINEN
GND
OUT
CPCN
NRST
VPOSVPOS
VNEG
PGND
AGND
SDA
SCL
SYNC
EN
AMUX
VIN
LXP
VO3
VO2
VO1
VSUB
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
D404 DISPLAY PMU (INTERSIL CHESTNUT, 338S1168)(TI CHESTNUT, 338S1172)
ACTIVE DISCHARGE 2MS TO RAIL DOWN
2 MS NOMIAL START UP DELAY FOR LCM POWER SEQUENCING
NOTE: STACKED TO MEET VOLTAGE REQ, LOOK INTO 18+V CAPS
CHESTNUT, BACKLIGHT DRIVER
0 MS DELAY AT SHUTDOWN
SAGE NEG BOOST TIMING INFO:
I2C0: 1100011X
D404 BACKLIGHT DRIVER
OPTION TO ZERO OUT U10 AND POWER IT DOWN
I2C0: 0100111X
TO DO: ADD 1NF CAP HERE ON ADCIN7
TO POTENTIALLY IMPLEMENT LCD PANIC FUNCTIONREFER TO RADAR 12410499. THIS IS PART OF BUILD MATRIX
X5R-CERM0603
22UF10V20%
22UH-20%-0.38A-0.876OHM
VLF302510T-SM
X5R-CERM
20%10UF10V
0402-1
OMIT_TABLETFA201610G-SM
2.2UH-20%-1.7A-200MOHM
BGALM3534TMX-A1
01005
10%
X5R6.3V
0.01UF
NOSTUFF
WCSPTPS799L57
NOSTUFF
6.3VX5R
20%
0402
4.7UF
NOSTUFF
0402X5R6.3V20%4.7UF
NOSTUFF
0.00
0%
01005
1/32WMF
0402-1X5R-CERM25V20%2.2UF
0402-1
2.2UF20%25VX5R-CERM
0402-1
2.2UF20%25VX5R-CERM
56PF
01005
5%16VNP0-C0G
56PF
01005
5%16VNP0-C0G
NP0-C0G16V
01005
56PF5%
OMIT_TABLE
ISL97751IIA0PZWLCSP
20%
X5R6.3V
0201
1UF
1/32W
01005
0%
NOSTUFF
0.00
MF
0%
MF01005
1/32W
0.00
SOD-923-HF
NSR0620P2XXG
56PF
01005
5%16VNP0-C0G
01005NP0-C0G
5%16V
56PF
OMIT_TABLE0402-1
6.3V20%10UF
CERM-X5RCERM-X5R6.3V
OMIT_TABLE
10UF20%
0402-1
10UF10V20%
0402-1X5R-CERM
402X5R-CERM1
6.3V20%
4.7UF
10UF
X5R-CERM0402-1
20%10V
OMIT_TABLE
10UF20%10V
0402-1X5R-CERM
CHESTNUT + BACKLIGHT DRIVERSYNC_DATE=N/ASYNC_MASTER=N/A
PP_VCC_MAIN
CHESTNUT_NRESET
PP5V1_GRAPE_VDDH
PP5V7_SAGE_AVDDH
PP5V7_TO_LCD_AVDDH_CHESTNUT
PP_CHESTNUT_CP
PP_CHESTNUT_CN
PP6V0_LCM_BOOST
PN5V7_SAGE_AVDDNAP_BI_I2C0_SDA
LCD_PWR_EN
PP5V7_TO_LCD_AVDDH
PP5V7_TO_LCD_AVDDHU10_BYPASS
45_AP_TO_PMU_DWI_DO45_AP_TO_PMU_DWI_CLK
LCD_PWR_EN
PP_WLED_LX
AP_BI_I2C0_SDA
LCM_DESENSE
PP6V0_LCM_BOOST
PP_LCM_BL_ANODE
AP_TO_I2C0_SCL
PP1V8
PP_VCC_MAIN
PP_LCM_BL_CAT1PP_LCM_BL_CAT2
PP1V8_SDRAM
PP5V7_TO_LCD_AVDDH_CHESTNUT
RESET_1V8_L
PP_CHESTNUT_LXP
LCM_TO_AP_HIFA_BSYNC_BUFF
AP_TO_I2C0_SCL
CHESTNUT_TO_PMU_ADCIN7
PP1V8
D1KA
C2131
2
C2141
2
C2971
2
C252 1
2
C691
2
C47 1
2
C521
2
C541
2
C3291
2
L31 2
C3301
2
L19
1
2
U23
B3
B1
D3D2
C3D1
B2A2A1
C2
A3
C1
C122 1
2
U10
A1
B2
C3A3
C1
C1211
2
C5921
2
R5121 2
C271
2
C971
2
C981
2
C5621
2
C6621
2C7621
2
U3
C1
E1
E4C4
C3
B2
C2
B1D4
D3
D2
A2
D1
E3
A4
A3
A1
B3B4
E2
C4411
2
R491 2
R611 2
051-9584
2.0.0
14 OF 23
14 OF 46
10 12 13 14 23
18
18
14
14
18 19
3 13 14 15 16 20
13 14 19
14 19
14 19
3 13
3 13
13 14 19
3 13 14 15 16 20
14
19
3 13 14 15 16 20
2 3 4 5 6 7 10 11 12 14 18 19 20 21
10 12 13 14 23
19
19
3 4 10 12 13 16 23
14
2 12 13 16 19 22 23
18
3 13 14 15 16 20
13
2 3 4 5 6 7 10 11 12 14 18 19 20 21
SDOUT
SDIN
LRCK/FSYNC
SCLK
MCLK
ALIVE
RESET*
INT*
GNDP
LDO_FILT
VSENSE-VSENSE+
ISENSE-ISENSE+
OUT-OUT+
IREF+
GNDA
SW
VP
ADO
VA
SDA
VP
SCL
FILT+
VBST_A
VBST_A
VBST_A
VBST_B
VER1
SCL
SDA
TX
TORCH
STROBE
ENABLE
IN
TEMP
SW0SW1
OUT0OUT1
LED0LED1
GND0
GND1
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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D
8 7 6 5 4 3
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NOTICE OF PROPRIETARY PROPERTY:
PAGE
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D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
V = 1.0V C= 1UF MIN
PCB: PLACE AT C335.1
LED DRIVER
V= VA PIN
I2C ADDRESS: 1100011X
(LEFT CONFIG)
C= 2.2UF MIN
PCB: PLACE C332, C333 AT L4.1
I2C ADDRESS: 1000000X
PCB: PLACE C335,337 AT VP INPUT
SPEAKER AMP, LED DRIVER
SPEAKER AMP (REPLACED WITH L20)
TO DO: CHANGE NETNAMES WITH ’L19’ TO ’L20’ WHEN WE UPDATE TO NEW SILICON
~700MA RMS @ 4.1W INTO 8OHM
10%6.3V
0.1UF
X5R201
X5R-CERM
0.1UF
0201
16V10%
TFA252010-SM
1.0UH-20%-3.2A-0.065OHM
WLCSPCS35L20
0201-1
1.0UF20%
X5R6.3V
01005
10K
1/32WMF1%
1/32W1% MF
10K
01005
220PF
01005
10%10VX7R-CERM
X5R-CERM
20%6.3V
01005
0.1UF
01005
10VX5R
1000PF10%
01005
10VX5R
1000PF10%
10%1000PF
X5R10V
01005
1000PF10%
X5R10V
01005
MF1/32W5%510K
01005
44.2K1%1/32WMF01005
5%
01005NP0-C0G16V
100PF
01005
100PF16V
NP0-C0G
5%
10UF6.3VCERM-X5R0402-2
20%20%6.3VCERM-X5R0402-2
10UF
0.47UH-20%-3.2A-0.046OHM
TFA201610G-SM
OMIT_TABLE
6.3V
10UF
CERM0402
20%
OMIT_TABLE
20%6.3VCERM0402
10UF
BGALM3563A3TMX
01005
1/32WMF
5%220K
0402
120OHM-25%-1.8A-0.06DCR
120OHM-25%-1.8A-0.06DCR
0402
NOSTUFF
10%1000PF
X5R10V
01005NOSTUFF
1000PF10%
X5R10V
01005
6.3V20%
402X5R-CERM1
4.7UF
X5R-CERM
22UF20%
0603
10V
OMIT_TABLE0402-1
10UF6.3V20%
CERM-X5R
X5R6.3V20%
0201-1
1.0UF
OMIT_TABLE
10UF
0402-1
20%6.3V
CERM-X5R
OMIT_TABLE
20%6.3V
10UF
0402-1CERM-X5R
20%6.3V
0201-1X5R
1.0UF
SYNC_DATE=N/ASYNC_MASTER=N/A
SPKR AMP + LED DRIVER
SPKAMP_TO_SPEAKER_OUT_N
PP_SPKAMP_FILTPP_SPKAMP_LDO_FILT
SPKAMP_TO_SPEAKER_OUT_P
SPEAKER_TO_SPKAMP_ISENSE_P
SPKAMP_IREF
AP_TO_LEDDRV_EN
AP_BI_CAM_RF_SDA
CAM_RF_TO_STROBE_NTC
SPEAKER_TO_SPKAMP_VSENSE_N
LED_DRV_LX
BB_TO_LEDDRV_GSM_BLANK
CAM0_TO_LEDDRV_STROBE_EN
CAM0_TORCH
LED_BOOST_OUT
PP_STRB_DRIVER_TO_LED
PP_BATT_VCC
AP_TO_CAM_RF_SCL
AP_TO_I2C0_SCL
AP_BI_I2C0_SDA
SPKAMP_TO_AP_INT_L
AP_TO_SPKAMP_RESET_L
AP_TO_SPKAMP_BEE_GEES
45_AP_TO_SPKAMP_I2S2_MCLK
45_AP_TO_CODEC_XSP_I2S2_BCLK
AP_TO_CODEC_XSP_I2S2_LRCLK
AP_TO_CODEC_XSP_I2S2_DOUT
CODEC_TO_AP_XSP_I2S2_DIN
PP1V7_VA_L20
PP_BATT_VCC
PP_L20_VBOOST
PP_SPKAMP_SW
SPKAMP_TO_SPEAKER_OUT_CONN_P
SPKAMP_TO_SPEAKER_OUT_CONN_N
SPEAKER_TO_SPKAMP_VSENSE_P
L20_SPKAMP_VSENSE_PL20_SPKAMP_VSENSE_N
SPEAKER_TO_SPKAMP_ISENSE_N
C3401
2
C3411
2
C291
2
C3391
2
C3421
2
C3481
2
C3351
2
C333 1
2
C332 1
2
L41 2
U22
C7
D7
F2
B5B6
C6E4F3F4
A3B3B4
C3C4D3D4
A7
B7
F1E1
C5
F6
E7
C2D2
A6
D6
E6
D5
F7
E5
A2B2
F5
B1
C1
D1
A1
A4A5
E3E2
C3371
2
R1261 2
R1271 2
C3671
2
C3091
2
C5011
2
C500 1
2
C363 1
2
C360 1
2
R1291
2 R351
2
C4881
2
C73 1
2
C3961
2
C3941
2
L51 2
C387 1
2
C386 1
2
U17
D4A4
B4
C4
A1B1
A2B2
D3
D2
C3
A3B3
C1
C2
D1
R4631
2
FL61 2
FL91 2
C5461
2
C545 1
2
051-9584
2.0.0
15 OF 23
15 OF 46
3
7 21
8
17
23
21
7 8
8 12 15 22 23
7 21
3 13 14 16 20
3 13 14 16 20
3
3
3
3
3 10
3 10
3 10
3 10
12
8 12 15 22 23
17 22
17 22
17
PP
BYPASS
SCLINT
SDA
SWITCH_ENHOST_RESET
OVP_SW_EN*
CON_DET_L
DN2DP2
DN1DP1
ACC2ACC1P_IN
VDD_1V8
VDD_3V0
ACC_PWR
JTAG_DIO
UART2_RX
JTAG_CLK
UART1_RX
UART2_TX
UART0_RX
UART1_TX
USB0_DN
UART0_TX
BRICK_ID
USB0_DP
USB1_DNUSB1_DP
DIG_DN
DVSS
DVSS
DVSS
DIG_DP
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
ACCESSORY UART
DEBUG UART
TO DO: ADD PPS TO SOC-SIDE USBHOST_RESETACTIVE HIGH
PLACEHOLDERS FOR INDUCTORS
ACC_PWR
12C ADDRESS: 0011010X
TRISTAR
BRICK_ID
BB DEBUG USB
SOC USB
PIN FOR HANDSHAKE
AMBER HAS 200K INT PD
X5R
10%
0402
25V
1UF
5%
MF1/32W
01005
100K
NO_XNET_CONNECTION=TRUE
0201-1X5R6.3V
1.0UF20%
X5R4V20%0.1UF
01005
SMP4MM
WCSPCBTL1608A1
OMIT_TABLE
NO_XNET_CONNECTION=TRUE
100K5%1/32WMF01005
100PF5%
NP0-C0G10V
01005
MF01005
5%
NO_XNET_CONNECTION=TRUE
100K1/32W
201MF
1/20W
05%
1/20W 2015% MF
0
X5R
10%0.01UF6.3V
01005
0201-1
6.3VX5R
20%1.0UF
TRISTARSYNC_DATE=N/ASYNC_MASTER=N/A
PP3V0_ALWAYS
TRISTAR_BYPASS
PP_E75_TO_TRISTAR_ACC2PP_E75_TO_TRISTAR_ACC1
90_TRISTAR_BI_E75_PAIR1_P
90_CODEC_BI_TRISTAR_MIKEYBUS_N
TRISTAR_TO_PMU_MIKEYBUS_TEST_NEG
90_TRISTAR_BI_E75_PAIR1_N
PP3V0_ACC
90_CODEC_BI_TRISTAR_MIKEYBUS_P
TRISTAR_TO_PMU_MIKEYBUS_TEST_POS
90_TRISTAR_BI_BB_USB_P90_TRISTAR_BI_BB_USB_N
AP_TO_TRISTAR_ACC_UART2_TXDTRISTAR_TO_AP_ACC_UART2_RXD
TRISTAR_TO_AP_DEBUG_UART6_RXD
90_AP_BI_TRISTAR_USB0_N90_AP_BI_TRISTAR_USB0_P
TRISTAR_TO_PMU_USB_BRICKID
90_CODEC_BI_TRISTAR_MIKEYBUS_DIG_P
90_TRISTAR_BI_E75_PAIR2_N90_TRISTAR_BI_E75_PAIR2_P
PP5V0_USB_RPROT
PP1V8_SDRAM
90_CODEC_BI_TRISTAR_MIKEYBUS_DIG_N
AP_TO_TRISTAR_DEBUG_UART6_TXD
TRISTAR_TO_PMU_OVP_SW_EN_L
RESET_1V8_L
TRISTAR_TO_AP_INT
AP_BI_I2C0_SDA
TRISTAR_TO_PMU_HOST_RESET
TRISTAR_BI_AP_JTAG_SWDIO
AP_TO_BB_UART1_TXDBB_TO_AP_UART1_RXD
E75_TO_PMU_ACC_DETECT
AP_TO_I2C0_SCL
TRISTAR_TO_AP_JTAG_SWCLK
C304 1
2
C391
2
C3381
2
R831
2
C381
2
R841
2
R431 2
R441 2
C2541
2
PP221
U2
C5E5
D5
C2
E6
E3
C4C3
B2
B4
A2
A4
A6C1F5
B6
C6A5B5
D6
F6
D4D3
E4
E1E2
F1F2
D1D2
B3A3
B1A1
F3
F4
R84011
2
C110 1
2
051-9584
2.0.0
16 OF 23
16 OF 46
8 12
17
17
17 22
9
13
17 22
12
9
13
23
23
3
3
3
2
2
13
17 22
17 22
17
3 4 10 12 13 14 23
3
17
2 12 13 14 19 22 23
3 13
3 13 14 15 20
13
2
3 23
3 23
13 17
3 13 14 15 20
2
SYM_VER-2
SYM_VER-2
D2
(1 OF 2)
G2
SSD1
G1
(2 OF 2)
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
TO DO: REMOVE L20, L22 TO OPEN USB EYE? (SEE EUGENE)
PRIMARY MICMIC1
MIC1 (VOICE MIC), ACC DET/ID/PWR, E75 DIFFPAIRS)(USB VBUS, MENU BTN, SPEAKER, HP, HP EXTMIC, NAVAJO, ANTENNA PAC/LAT SW CTRL,
HS3/HS4 CTRL,
LAT SW CTRL
DOCKFLEX B2B
HPHONE:
ANTENNA:
ACCESSORY:
SPEAKER:
PAC VDD (2.65V)
HS3/HS4
MENU BUTTON
E75 DIFFPAIRS
EXTMICHS3/HS4 REF
ANTENNA:
HPHONE AUDIO
DETECT,
50NA @ 2.5V
BATTERY NTC
SPEAKER LEADSVSENSE,
ID, PWR
TO TRISTAR
FROM TRISTAR
VBUS
HPHONE:
PCB: PLACE NEAR J7
516S1032 PLUGPCB: PUT XWAT J7.17
HPDET
PER STAN, REPLACING L7 AND L6 WITH 01005 PARTS
NOTE: RSVD ANTENNA
PCB: PLACE THESE XW
516S1031 RCPT (USED ON FLEX)THIS ONE ON MLB --->
LINKS AT DOCK CONNECTOR
(DESENSE CAPS)
TCM0605-190-OHM-50MA
NOSTUFF
TCM0605-190-OHM-50MANOSTUFF
16V
27PF
01005NP0-C0G
5%
01005-1
10-OHM-750MA
10-OHM-750MA
01005-1
NOSTUFF
01005-112V-33PF
NO_XBET_CONNECTION=TRUE
0.00
MF
0%
01005
1/32W
NO_XBET_CONNECTION=TRUE
0.00
01005
1/32WMF
0%
120-OHM-210MA
01005
01005
120-OHM-210MA1/32W
1%
01005MF
100K
1/32W1%100K
01005MF
SM
SM
01005
120-OHM-210MA
01005
16V5%100PF
NP0-C0G
5%16V
100PF
NP0-C0G01005
120-OHM-210MA
01005
120-OHM-210MA
01005
01005
120-OHM-210MA
120-OHM-210MA01005
MF
3.3K5%
1/32W 01005
01005
5%56PF6.3VNP0-C0G
01005NP0-C0G
5%6.3V
56PF
01005
120-OHM-210MA
NO_XNET_CONNECTION=TRUE
0201-1
20%6.3VX5R
1.0UF
X7R-CERM
220PF10V10%
01005NOSTUFF
010056.8V-100PF
010056.8V-100PF
6.8V-100PF01005
6.8V-100PF01005
010056.8V-100PF
010056.8V-100PF
SHORT-10L-0.1MM-SM
01005150OHM-25%-200MA-0.7DCR
01005150OHM-25%-200MA-0.7DCR
01005
1/32W
MF5%
1.00K
120-OHM-210MA
01005
56PF
01005
5%
NP0-C0G16V
M-ST-SM105847038102829
01005
6.3V5%56PF
NP0-C0G
16V5%
NP0-C0G
100PF
01005
5%16V
NP0-C0G01005
100PFX5R-CERM0201
25V10%0.01UF
CSPCSD75202W15
MF
5%
201
1/20W
5.1K
1.0UF20%10VX5R-CERM0201-1
100K
1/20WMF201
1%
CSD75202W15CSP
15.00K
01005
1%
MF1/32W
10%25VX5R-CERM
0.01UF
0201
MF 02011%
0.00
1/20W
1% 0201
0.00
1/20WMF
0.00
MF 1%1/20W
0201
MF 02011/20W1%
0.00
01005
5%6.3VNP0-C0G
56PF
NP0-C0G
5%56PF6.3V
01005
01005150OHM-25%-200MA-0.7DCR
01005NP0-C0G
5%6.3V
56PF
5%6.3V
56PF
NP0-C0G01005
01005
56PF5%16VNP0-C0GNP0-C0G
56PF16V
01005
5%
5%16V
NP0-C0G01005
100PF
NOSTUFF
NP0-C0G6.3V
5%56PF
01005
01005
16V5%
NP0-C0G
100PF
NOSTUFF
56PF
01005
5%6.3V
NP0-C0G
SYNC_DATE=N/ASYNC_MASTER=N/A
DOCKFLEX B2B
SPEAKER_TO_SPKAMP_VSENSE_PSPEAKER_TO_SPKAMP_VSENSE_N
AP_TO_HEADSET_HS4_CTRL_CONN
CODEC_TO_HPHONE_L
CODEC_TO_HPHONE_RHPHONE_TO_CODEC_HPHONE_TEST
PP_E75_TO_TRISTAR_ACC2_CONNPP_LDO14_2P65
AP_TO_HEADSET_HS3_CTRL
PP5V0_USB_CONN
CODEC_TO_HPHONE_HS3_REF_CONN
EXTMIC_TO_CODEC_P
90_TRISTAR_BI_E75_PAIR1_N
90_TRISTAR_BI_E75_PAIR2_N90_TRISTAR_BI_E75_PAIR2_P
CODEC_TO_HPHONE_HS4_REFCODEC_TO_HPHONE_HS4_REF_CONN
AP_TO_HEADSET_HS4_CTRL
BATTERY_TO_PMU_NTC
PP_E75_TO_TRISTAR_ACC1
HPHONE_TO_CODEC_DET
PP_E75_TO_TRISTAR_ACC2
E75_TO_PMU_ACC_DETECT
PP5V0_USB_RPROT
OVP_GATE
PP5V0_USB_PROT
USB_CONN_SNUBREVERSE_GATE
CODEC_TO_HPHONE_HS3_REF
90_TRISTAR_BI_E75_PAIR1_P
PP_E75_TO_TRISTAR_ACC1_CONN
CODEC_TO_HPHONE_HS3_CONN
CODEC_TO_HPHONE_HS3CODEC_TO_HPHONE_HS4
PP5V0_USB_CONN
PP_CODEC_TO_MIC1_BIAS
AP_TO_HEADSET_HS4_CTRL_CONN
CODEC_TO_HPHONE_HS4_REF_CONN
CODEC_TO_HPHONE_HS3_CONN
BB_TO_LAT_SW1_CTL
TRISTAR_TO_PMU_OVP_SW_EN_L
CODEC_TO_HPHONE_HS3_REF_CONN
EXTMIC_TO_CODEC_N
BUTTON_TO_AP_MENU_KEY_L
CODEC_TO_HPHONE_L_CONN
BUTTON_TO_AP_MENU_KEY_CONN_L
CODEC_TO_HPHONE_HS4_CONN
PP_CODEC_TO_MIC1_BIAS_CONN
HPHONE_TO_CODEC_DET_CONN
AP_TO_HEADSET_HS3_CTRL_CONN
MIC1_TO_CODEC_N
PP_LDO14_2P65_CONN
MIC1_TO_CODEC_P
SPKAMP_TO_SPEAKER_OUT_CONN_PSPKAMP_TO_SPEAKER_OUT_CONN_N
E75_TO_PMU_ACC_DETECT_CONN
90_TRISTAR_BI_E75_PAIR2_CONN_P90_TRISTAR_BI_E75_PAIR2_CONN_N
90_TRISTAR_BI_E75_PAIR1_CONN_N90_TRISTAR_BI_E75_PAIR1_CONN_P
BATTERY_NTC_CONNCODEC_TO_HPHONE_R_CONN
BB_TO_LAT_SW2_CTL
L201
2 3
4
L221
2 3
4
C240 1
2
FL6012
FL5312
DZ15 1
2
FL512
C1761
2
C71 1
2
C70 1
2
R501
2
R151
2
L712
L612
R101
2
R231
2
XW22 12
XW21 12
C81
2
C5 1
2
FL11 2
FL101 2
FL161 2
FL171 2
R1071 2
C3551
2
C3591
2
FL4912
C215 1
2
C4 1
2
DZ6 1
2
DZ5 1
2
DZ9 1
2
DZ101
2
DZ11 1
2
DZ121
2
XW45
1
2
FL681 2
FL691 2
R1301 2
FL23021 2
C23071
2
J7
1
10
11 12
13 14
15 16
17 18
19
2
20
21 22
23 24
25 26
27 28
29
3
30
31 32
33 34
35 36
37 38
39
4
40
41 42
5 6
7 8
9
C12 1
2
C13 1
2
C3681
2
Q2
B2
C2
C3
C1
B1
R741
2
C1531
2
R7312
Q2
A2
A3
B3
A1
B1
R5812
C1191
2
R6171 2
R6181 2
R619 1 2
R620 1 2
C2061
2
C1881
2
FL4951 2
C8551
2
C2421
2
C8781
2
C879 1
2
C913 1
2
C9141
2
051-9584
2.0.0
17 OF 23
17 OF 46
15
15
17
9
9
9
22
23
3
17 22
17 22
9
16 22
16 22
16 22
9 17 22
3
12 22
16
9
16
13 16
16
12
9
16 22
22
17
9
9
17 22
10
17
17 22
17
23
16
17 22
9
3
9
9 22
15 22
15 22
22
23
VSTM_9VSTM_8VSTM_7VSTM_6VSTM_5VSTM_4VSTM_3VSTM_2
VSTM_16VSTM_15
VSTM_13VSTM_12VSTM_11VSTM_10
VSTM_1VSTM_0
VDDIO
VDDH
VDDCORE
VDDANA
RSTOVR*
IN9_0IN8_0IN7_0IN6_0IN5_0IN4_0IN3_0IN2_0
IN14_1IN14_0IN13_0IN12_0IN11_0IN10_0
IN1_0
H_SDOH_SDIH_SCLKH_INT*
GPIO_4GPIO_3
GPIO_2/SDGPIO_1/CK
GND
VSTM_18VSTM_19
TM_OVR
VSTM_17
IN0_0
H_CS*
VSTM_14
VDDLDO
JTAG_TMSJTAG_TDOJTAG_TDIJTAG_TCK
CLKIN/RESET*BCFG_RTCK
TM_ACS*
AGND6
AVDDL1
VBST_OUTLVBST_OUTH
VCPL_REF/ENVCPH_REF/EN
L_XL_Y
VBIAS
DRV_IN19
DRV_IN17DRV_IN18
DRV_IN16
DRV_IN10DRV_IN11DRV_IN12
DRV_IN15DRV_IN14
DRV_IN5DRV_IN6DRV_IN7DRV_IN8DRV_IN9
DRV_IN0DRV_IN1DRV_IN2
DRV_IN4DRV_IN3
SNS_IN10SNS_IN11SNS_IN12SNS_IN13SNS_IN14
SNS_IN6
SNS_IN8
SNS_IN1
AGND1
AGND2
AGND3
AGND5
AGND4
GO
DRV_OUT17
DRV_OUT19DRV_OUT18
DRV_OUT15DRV_OUT16
DRV_OUT13DRV_OUT12DRV_OUT11DRV_OUT10
DRV_OUT8DRV_OUT9
DRV_OUT7DRV_OUT6DRV_OUT5DRV_OUT4
DRV_OUT2
DRV_OUT0DRV_OUT1
SNS_OUT14SNS_OUT13
SNS_OUT10SNS_OUT11
SNS_OUT9SNS_OUT8SNS_OUT7SNS_OUT6SNS_OUT5
SNS_OUT3SNS_OUT4
SNS_OUT2SNS_OUT1SNS_OUT0
SNS_OUT12
VCPH
VCPL
VCPL_F
VDDIO
DRV_IN13
SNS_IN9
SNS_IN7
I2C_SCL
GCM_TEST
I2C_SDA
SNS_IN5SNS_IN4SNS_IN3SNS_IN2
SNS_IN0
AVDDH4
AVDDH3
AVDDH2
DRV_OUT3
AVDDH1
VCM_IN
BOOST_EN
DRV_OUT14
BSYNC
PP
PP
PP
GS
D
PP
PP
VCC
1A
2A2Y
GND
1Y
PP
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CUMULUS C0
TOUCH B2B
VGL_REF
R16
R14R13R12
516S1060 RCPT (ON FLEX)516S1061 PLUG
VGL
R10
R1R5
R4R3R2R0_LEFT
NEGATIVE RAIL
D404 (B2B,DRIVER ICS)
C7
(ALSO A RESET IF CLOCK STOPS)
THESE ARE ROUTED TOGETHER
GS0C1
C4
R18
C3GS1
R6R8
SPECIAL - CANNOT SWAPSPECIAL - CANNOT SWAP
5.45-5.98V
GS4
GS3
VCOMGS2
R17
C8C9
R11
R19
C2
C5
R9
R7
VGH
ON MLB --->
343S0574
13.5V
VGH_REFC0
C6
R15
R0_RIGHT
NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF
CUMULUS_IN IS SENSITIVE
(TURN OFF SAME TIME AS PP1V8_GRAPE)(TURN ON LATER THAN PP1V8_GRAPE)
TO CLAMP THE
KEEP THESE NETS FROM XTALKCUMULUS_IN IS SENSITIVE
SAGE_PANEL_IN IS SENSITIVEKEEP THESE NETS FROM XTALK
3.5V
-12V
SAGE2 C0343S0628: B0 APN FOR PROTO1343S0645: C0 APN FOR EVT1
WLBGACUMULUS-C0
01005
20%0.1UF4VX5R
10%
201X5R
6.3V
0.1UF
SM-201DSF01S30SC
NOSTUFF
0201
10%25V
X7R-CERM
1000PF
X7R-CERM25V10%
1000PF
0201
X7R-CERM25V10%
1000PF
0201X7R-CERM
25V10%
1000PF
0201
0402
0.33UF20%
TANT20V
X5R-CERM16V10%
0201
0.1UF
MF1/32W
5%1.00M
01005
504459-4210M-ST-SM
0.1UF
0201X5R-CERM
16V10%
PSB12101T-SM10UH-0.32A-1.56OHM
SM
NO_XNET_CONNECTION=TRUE
SM
NO_XNET_CONNECTION=TRUE
SM
NO_XNET_CONNECTION=TRUE
SM
NO_XNET_CONNECTION=TRUE
SM
NO_XNET_CONNECTION=TRUE
SM
10UF10VX5R-CERM0402-1
20%
CSPSAGE2-C06
GDZT2R6.2BGDZ-0201
01005
0.01UF10%
6.3VX5R
6.3V
0.01UF
X5R01005
10%
X5R201
6.3V10%
0.1UF
5%
220K
MF01005
1/32W
SMP4MM
P4MMSM
100K1/32WMF01005
5%
100K1/32W
5%
01005MF
P4MMSM
20%4.7UF6.3VX5R-CERM1402
X5R-CERM1402
20%6.3V
4.7UF
100K1/32W
01005MF
5%
20%
TANT25V
1UF
0603-LLP
NP0-C0G
27PF5%
01005
16V
10%
X5R-CERM16V
0201
0.1UF
1.0UF6.3VX5R
20%
0201-1
SM
0.1UF16V10%
0201X5R-CERM
SM
SMRV1C002UN
10%6.3V
X5R-CERM
1000PF
01005
0.1UF
X5R-CERM
10%
0201
16VX6S-CERM0402
1UF16V10%
X6S-CERM
1UF16V10%
0402
16V
1UF10%
0402X6S-CERM
10.2 1%MF1/32W01005
01005MF1%
1/32W
22.1K
P4MMSM
P4MMSM
SOT111574AUP2G3404GN
0402-1
10UF20%
X5R-CERM10V
OMIT_TABLE
10UF20%10V
0402-1X5R-CERM
SMP4MM
D404 (TOUCH B2B, DRIVER ICS)SYNC_MASTER=N/A SYNC_DATE=N/A
TOUCH_TO_SAGE_SENSE_IN<12>
SAGE_TO_TOUCH_VSTM_OUT<12>SAGE_TO_TOUCH_VSTM_OUT<11>SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<14>SAGE_TO_TOUCH_VSTM_OUT<15>
TOUCH_TO_SAGE_SENSE_IN<10>TOUCH_TO_SAGE_SENSE_IN<1>TOUCH_TO_SAGE_SENSE_IN<2>
TOUCH_TO_SAGE_SENSE_IN<3>TOUCH_TO_SAGE_SENSE_IN<0>TOUCH_TO_SAGE_SENSE_IN<4>TOUCH_TO_SAGE_SENSE_IN<5>
CUMULUS_TO_SAGE_VSTM_OUT<16>
45_PROX_TO_CUMULUS_RX_INSAGE_TO_CUMULUS_IN<12>
TOUCH_TO_AP_INT_L
TOUCH_TO_AP_SPI1_MISO_R
AP_TO_TOUCH_SPI1_CLK
PP_CUMULUS_VDDCORE
SAGE_TO_CUMULUS_IN<1>SAGE_TO_CUMULUS_IN<2>
SAGE_TO_CUMULUS_IN<6>
SAGE_TO_CUMULUS_IN<4>
SAGE_TO_CUMULUS_IN<3>SAGE_TO_CUMULUS_IN<5>
PP1V8_CUMULUS_VDDLDO
SAGE_TO_CUMULUS_IN<0>SAGE_TO_CUMULUS_IN<14>SAGE_TO_CUMULUS_IN<10>
SAGE_TO_CUMULUS_IN<7>
SAGE_TO_CUMULUS_IN<8>
TOUCH_TO_SAGE_SENSE_IN<7>
45_AP_TO_TOUCH_CLK32K_RESET_L
CUMULUS_TO_SAGE_VSTM_OUT<2>
45_PROX_TO_CUMULUS_RX SAGE_DUMP_GATE
TOUCH_TO_SAGE_SENSE_IN<8>TOUCH_TO_SAGE_SENSE_IN<14>
SAGE_TO_TOUCH_VSTM_OUT<17>
TOUCH_TO_SAGE_SENSE_IN<13>
SAGE_TO_TOUCH_VSTM_OUT<18>
SAGE_TO_TOUCH_VSTM_OUT<13>
SAGE_TO_TOUCH_VSTM_OUT<16>
TOUCH_TO_SAGE_SENSE_IN<6>
SAGE_TO_TOUCH_VSTM_OUT<0>SAGE_TO_TOUCH_VSTM_OUT<2>SAGE_TO_TOUCH_VSTM_OUT<3>SAGE_TO_TOUCH_VSTM_OUT<4>SAGE_TO_TOUCH_VSTM_OUT<9>SAGE_TO_TOUCH_VSTM_OUT<8>SAGE_TO_TOUCH_VSTM_OUT<6>SAGE_TO_TOUCH_VSTM_OUT<5>SAGE_TO_TOUCH_VSTM_OUT<1>SAGE_TO_TOUCH_VSTM_OUT<7>SAGE_TO_TOUCH_VSTM_OUT<10>PP_SAGE_TO_TOUCH_VCPH_CONN
TOUCH_TO_SAGE_SENSE_IN<11>
TOUCH_TO_SAGE_SENSE_IN<9>PP_SAGE_TO_TOUCH_VCPL_CONN
TOUCH_TO_SAGE_VCM_IN_CONNSAGE_TO_TOUCH_VCPL_REF_CONNSAGE_TO_TOUCH_VCPH_REF_CONN
SAGE_VBIAS_DRAIN
CUMULUS_TO_SAGE_BOOST_EN
SAGE_TO_CUMULUS_IN<13>
CUMULUS_TO_SAGE_GCM_SEL
CUMULUS_TO_PROX_RX_EN_1V8
AP_TO_TOUCH_SPI1_MOSI
CUMULUS_TO_PROX_TX_EN_1V8_LCUMULUS_TO_PROX_TX_EN_BUFF
LCM_TO_AP_HIFA_BSYNC
TOUCH_TO_AP_SPI1_MISO
CUMULUS_TO_PROX_TX_EN_1V8_L
SAGE_TO_CUMULUS_IN<9>
AP_TO_TOUCH_GRAPE_RESET_L
PP1V8_CUMULUS_VDDLDO
PP1V8_GRAPE
CUMULUS_TO_SAGE_VSTM_OUT<6>
CUMULUS_TO_SAGE_VSTM_OUT<19>
CUMULUS_TO_SAGE_VSTM_OUT<13>CUMULUS_TO_SAGE_VSTM_OUT<11>CUMULUS_TO_SAGE_VSTM_OUT<17>CUMULUS_TO_SAGE_VSTM_OUT<18>
CUMULUS_TO_SAGE_VSTM_OUT<7>CUMULUS_TO_SAGE_VSTM_OUT<3>
CUMULUS_TO_SAGE_VSTM_OUT<15>
SAGE_TO_CUMULUS_IN<11>PP_SAGE_VCPL_F
45_PROX_TO_CUMULUS_RX_FILT
CUMULUS_TO_SAGE_VSTM_OUT<4>CUMULUS_TO_SAGE_VSTM_OUT<1>
CUMULUS_TO_SAGE_VSTM_OUT<8>
LCM_TO_AP_HIFA_BSYNC_BUFF
CUMULUS_TO_SAGE_VSTM_OUT<5>
PP5V7_SAGE_AVDDH
SAGE_TO_TOUCH_VSTM_OUT<19>
SAGE_TO_TOUCH_VCPH_REF_CONN SAGE_TO_TOUCH_VCPH_REF
SAGE_TO_TOUCH_VCPL_REF_CONN SAGE_TO_TOUCH_VCPL_REF
TOUCH_TO_SAGE_VCM_IN_CONN TOUCH_TO_SAGE_VCM_IN
PP_SAGE_TO_TOUCH_VCPH_CONN PP_SAGE_TO_TOUCH_VCPH
PP_SAGE_TO_TOUCH_VCPLPP_SAGE_TO_TOUCH_VCPL_CONN
U12_GPIO_3
PP_CUMULUS_VDDANA
PP1V8_GRAPE
CUMULUS_TO_SAGE_VSTM_OUT<0>CUMULUS_TO_SAGE_VSTM_OUT<12>
CUMULUS_TO_SAGE_VSTM_OUT<14>AP_TO_TOUCH_SPI1_CS_L
PP5V1_GRAPE_VDDH
PN5V7_SAGE_AVDDN
PP1V8_GRAPE
LCM_TO_AP_HIFA_BSYNC
SAGE_TO_TOUCH_VSTM_OUT<16>
CUMULUS_TO_SAGE_BOOST_EN
TOUCH_TO_SAGE_VCM_IN
PP5V7_SAGE_AVDDH
TOUCH_TO_SAGE_SENSE_IN<4>
TOUCH_TO_SAGE_SENSE_IN<5>TOUCH_TO_SAGE_SENSE_IN<0>
TOUCH_TO_SAGE_SENSE_IN<7>
CUMULUS_TO_SAGE_GCM_SEL
TOUCH_TO_SAGE_SENSE_IN<2>
CUMULUS_TO_SAGE_VSTM_OUT<13>
PP1V8
PP_SAGE_VCPL_F
PP_SAGE_TO_TOUCH_VCPH
SAGE_TO_CUMULUS_IN<8>
SAGE_TO_CUMULUS_IN<4>
SAGE_TO_CUMULUS_IN<5>
SAGE_TO_CUMULUS_IN<7>SAGE_TO_CUMULUS_IN<10>SAGE_TO_CUMULUS_IN<1>SAGE_TO_CUMULUS_IN<11>SAGE_TO_CUMULUS_IN<2>
SAGE_TO_CUMULUS_IN<14>SAGE_TO_CUMULUS_IN<13>
SAGE_TO_CUMULUS_IN<9>SAGE_TO_CUMULUS_IN<6>
SAGE_TO_TOUCH_VSTM_OUT<6>SAGE_TO_TOUCH_VSTM_OUT<12>
SAGE_TO_TOUCH_VSTM_OUT<7>SAGE_TO_TOUCH_VSTM_OUT<15>SAGE_TO_TOUCH_VSTM_OUT<14>SAGE_TO_TOUCH_VSTM_OUT<18>
SAGE_TO_TOUCH_VSTM_OUT<9>SAGE_TO_TOUCH_VSTM_OUT<5>
SAGE_TO_TOUCH_VSTM_OUT<10>SAGE_TO_TOUCH_VSTM_OUT<4>SAGE_TO_TOUCH_VSTM_OUT<19>SAGE_TO_TOUCH_VSTM_OUT<13>
SAGE_TO_TOUCH_VSTM_OUT<2>SAGE_TO_TOUCH_VSTM_OUT<3>
SAGE_TO_TOUCH_VSTM_OUT<11>SAGE_TO_TOUCH_VSTM_OUT<17>
SAGE_TO_TOUCH_VSTM_OUT<0>
TOUCH_TO_SAGE_SENSE_IN<3>
TOUCH_TO_SAGE_SENSE_IN<11>
TOUCH_TO_SAGE_SENSE_IN<10>
TOUCH_TO_SAGE_SENSE_IN<6>TOUCH_TO_SAGE_SENSE_IN<9>TOUCH_TO_SAGE_SENSE_IN<8>TOUCH_TO_SAGE_SENSE_IN<14>TOUCH_TO_SAGE_SENSE_IN<13>
CUMULUS_TO_SAGE_VSTM_OUT<1>CUMULUS_TO_SAGE_VSTM_OUT<7>
CUMULUS_TO_SAGE_VSTM_OUT<12>CUMULUS_TO_SAGE_VSTM_OUT<6>CUMULUS_TO_SAGE_VSTM_OUT<8>
CUMULUS_TO_SAGE_VSTM_OUT<9>CUMULUS_TO_SAGE_VSTM_OUT<5>CUMULUS_TO_SAGE_VSTM_OUT<18>CUMULUS_TO_SAGE_VSTM_OUT<14>CUMULUS_TO_SAGE_VSTM_OUT<15>
CUMULUS_TO_SAGE_VSTM_OUT<16>CUMULUS_TO_SAGE_VSTM_OUT<3>
CUMULUS_TO_SAGE_VSTM_OUT<19>CUMULUS_TO_SAGE_VSTM_OUT<4>
CUMULUS_TO_SAGE_VSTM_OUT<10>
CUMULUS_TO_SAGE_VSTM_OUT<2>
CUMULUS_TO_SAGE_VSTM_OUT<11>CUMULUS_TO_SAGE_VSTM_OUT<0>
CUMULUS_TO_SAGE_VSTM_OUT<17>
SAGE_VBIAS
PP_SAGE_LYPP_SAGE_LX
SAGE_TO_TOUCH_VCPH_REFSAGE_TO_TOUCH_VCPL_REF
PP_SAGE_VBST_OUTHPP_SAGE_VBST_OUTL
SAGE_TO_CUMULUS_IN<0>SAGE_TO_CUMULUS_IN<12>
SAGE_TO_CUMULUS_IN<3>
PN5V7_SAGE_AVDDN_FILT
SAGE_TO_TOUCH_VSTM_OUT<1>
SAGE_TO_TOUCH_VSTM_OUT<8>
TOUCH_TO_SAGE_SENSE_IN<1>
TOUCH_TO_SAGE_SENSE_IN<12>
PP_SAGE_TO_TOUCH_VCPL
U12
E3D1
C7C9G2
G1D4F2F3
E4F1D3D2E1
B9
A6A3A5A4B2A2
B8A9B7B6A8B5B4A7B3
C4C3E2C6
D9
C2G3
B1
C1
C8
C5F4
A1
E9E5
F9D5F6F5G4E8G8G7G6G5
F7E6E7F8G9D6D7D8
PP111
PP181
C1651
2
C163 1
2
DZ4A
K
C150 1
2
C147 1
2
C137 1
2
R861 2
PP91
R21
2
R361
2
C3711
2
C3701
2
R791
2
C130 1
2
R1361 2
R261 2
PP7 1
PP8 1
U5
16
34
25
C1491
2C156 1
2
PP12 1
C320 1
2
C3061
2
C3721
2
XW361 2
C365 1
2
XW371
2
Q6
3
2
1C791 2
C3811
2
C3311
2
C3241
2
C3151
2
D2 A
K
C349 1
2
C328 1
2
C364 1
2
C346 1
2
C321 1
2
C170 1
2
R1211
2
J4
1
10
11 12
13 14
15 16
17 18
19
2
20
21 22
23 24
25 26
27 28
29
3
30
31 32
33 34
35 36
37 38
39
4
40
41 42
43
44
5 6
7 8
9
C36612
L21
1
2
XW71 2
XW131 2
XW181 2
XW191 2
XW231 2
XW791 2
C3691
2
U15
C2B3F4F8E3L5
D2A3F3F6
H5
B2
K5
G1H1
L3K3J3H3G3L4K4J4H4G4
J1K1L1G2H2J2K2L2
G6H6
L8K8J8H8G8L9K9J9H9G9
J6K6L6G7H7J7K7L7
F9
F7
F5G5
C1D1
E4D4
E8D8C8B8A8
C4B4A4A6B6C6D6E6
E5D5
E9D9C9B9A9
C5B5A5A7B7C7D7E7
D3
B1E1
J5
A1
A2
F1
E2
F2
C3
051-9584
2.0.0
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SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
LCM CONNECTOR516S1066 PLUG
SPECIAL Z = 0.33 MM
LCM B2B
516S1065 RCPT (FLEX)THIS ONE ON MLB --->
REFER TO RADAR 12410499. THIS IS PART OF BUILD MATRIX TO POTENTIALLY IMPLEMENT LCD PANIC FUNCTION
80-OHM-0.2A-0.4-OHM
0201-1
01005NP0-C0G16V5%56PF
MF01005
100K1/32W1%
01005MF
5%
100K
1/32W
5%6.3VNP0-C0G
56PF
01005
NOSTUFF
150OHM-25%-200MA-0.7DCR
01005
120-OHM-210MA
01005
2.2UF
0402X5R-CERM
6.3V20%
X5R-CERM0402
6.3V20%
2.2UF
X5R-CERM0402
6.3V20%
2.2UF20%
6.3VX5R-CERM
0402
2.2UF
NOSTUFF5%
1.00K
1/32WMF
01005
TCM0605-190-OHM-50MA
01005
16V5%56PF
NP0-C0G
AA22LB-PM-ST-SMMF010050%
0.001/32W
NP0-C0G
56PF5%16V
01005
0201-1240-OHM-0.2A-0.8-OHM
240-OHM-0.2A-0.8-OHM0201-1
56PF
01005NP0-C0G6.3V5%
240-OHM-0.2A-0.8-OHM0201-1
01005
56PF16VNP0-C0G
5%5%
NP0-C0G01005
16V
56PF
56PF
NP0-C0G
5%16V
01005
1%
BOMOPTION=NOSTUFF
100K
01005MF1/32W
01005
0.00
NOSTUFF
0%
MF1/32W
1%1/32W
01005
100K
MF
NOSTUFF
X5R6.3V
201
0.1UF10%
TCM0605-190-OHM-50MA
TCM0605-190-OHM-50MA
TCM0605-190-OHM-50MA
90-OHM-50MATCM0605-1
01005
120-OHM-210MA
120-OHM-210MA
01005
5%56PF
NP0-C0G6.3V
01005
01005
120-OHM-210MA
56PF5%6.3V
01005NP0-C0G
5%
01005
6.3VNP0-C0G
56PF
NO_XNET_CONNECTIO=TRUE
80-OHM-0.2A-0.4-OHM
0201-1
SYNC_DATE=N/ASYNC_MASTER=N/A
LCM CONNECTOR
PP1V8
90_LCM_MIPI_DATA1_CONN_N
PP_LCM_BL_CAT1
90_LCM_MIPI_DATA2_CONN_P
LCD_PWR_EN_CONN
90_LCM_MIPI_CLK_CONN_P90_LCM_MIPI_CLK_CONN_N
90_LCM_MIPI_DATA2_CONN_N
90_LCM_MIPI_DATA1_CONN_P
LCD_PWR_EN
PP5V7_LCD_AVDDH_CONNPN5V7_LCM_AVDDN_CONN
PP1V8_LCM_CONN
90_LCM_MIPI_DATA0_CONN_P
LCM_TO_AP_PIFA
90_AP_TO_LCM_MIPI_DATA3_N
90_AP_TO_LCM_MIPI_DATA1_P
PP_SAGE_TO_TOUCH_VCPL
90_AP_TO_LCM_MIPI_DATA0_P
90_AP_TO_LCM_MIPI_DATA2_P
90_AP_TO_LCM_MIPI_DATA1_N
90_AP_TO_LCM_MIPI_DATA2_N
90_AP_TO_LCM_MIPI_DATA0_N
90_AP_TO_LCM_MIPI_CLK_N90_AP_TO_LCM_MIPI_CLK_P
90_AP_TO_LCM_MIPI_DATA3_P
PP_SAGE_TO_TOUCH_VCPL_CONN
90_LCM_MIPI_DATA0_CONN_N
PP1V8
PN5V7_SAGE_AVDDN
PP5V7_TO_LCD_AVDDH
PP_LCM_BL_ANODE
LCD_DESENSE_CONN
LCD_RESET_L_CONN
90_LCM_MIPI_DATA3_CONN_P
PP_LCM_BL_CAT2
PP1V8
LCM_TO_AP_HIFA_BSYNC
RESET_1V8_L
LCD_PANIC_L_CONNLCD_PIFA
AP_TO_LCM_RESET_L
LCD_HIFA_BSYNC_CONN
LCD_BL_CC1_CONN
PMU_AP_TO_LCM_RESET_L
LCD_BL_CA_CONN
90_LCM_MIPI_DATA3_CONN_N
LCD_BL_CC2_CONN
C421
2
C461
2
L21
2 3
4
L91
2 3
4
L81
2 3
4
L101
2 3
4
FL271 2
FL611 2
C401
2
FL341 2
C411
2
C191
2
FL181 2
FL261 2
C301
2
R311
2
R321 2
C241
2
FL371 2
FL2512
C43 1
2
C48 1
2
C49 1
2
C59 1
2
R41 2
L11
2 3
4
C6101
2
J5
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
4
56
78
9
R9321 2
C181
2
FL351 2
FL241 2
FL361 2
C151
2
C101
2
C141
2
R9711
2
R751 2
R621
2
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2.0.0
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14 18
14
14
14
2 3 4 5 6 7 10 11 12 14 18 19 20 21
3 18
2 12 13 14 16 22 23
3
22
13
22
22
DRDY
SCL/SKSDA/SI
VDD
RSV SO
VSS
TST1
TRG
VID
CAD0CAD1
RST*
CSB*
DEN
INT1
GND
CS
SDO/SA0SDA/SDI/SDO
SCL/SPC
VDD_IO
DRDY/
RES2RES1RES0
VDDRES/VDD
CAP
GND
INT2
INT2INT1
RESRES
RES
CS
RESRES
SDO/SA0
SCL/SPCSDA/SDI/SDO
VDD VDD_IO
GND
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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D
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NOTICE OF PROPRIETARY PROPERTY:
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IV ALL RIGHTS RESERVED
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
AP3GDL20H, APN 338S1158
NO CAMERA VSYNC PIN
NEED TO CHECK CONNECTION
ACCELEROMETER
THIS PART OUTSIDE OF SHIELD
SENSORS
ADD ALTERNATE AICHI
11V CHARGE PUMP
NEED TO CHECK CONNECTION
THESE PARTS INSIDE OF SHIELD
COMPASS DEVICE: 338S1014COMPASS
COMPASS INTERPOSER: 998-5120
COMPASS (APN 338S1133)
TO DO:
TO DO: VERIFY CONNECTIONS ON ACCEL (CS, SDO PINS)
GYRO
AP2DHAA, APN 338S1114
0201-1
20%
X5R
1.0UF6.3V4V
X5R01005
0.1UF20%
01005
4VX5R
0.1UF20%
0.01UF
0201
25V10%
X5R-CERM
CSPAK8963C
OMIT_TABLE
120-OHM-210MA
01005
120-OHM-210MA
01005
01005
120-OHM-210MA LGAAP3GDL20HAA18
OMIT_TABLE
LGAAP2DHAA24
20%
X5R4V
01005
0.1UF
150OHM-25%-200MA-0.7DCR
01005
150OHM-25%-200MA-0.7DCR
01005
4V
01005
0.1UF20%
X5R
01005
0.01UF10%
X5R6.3V
0201-1
20%6.3V
1.0UF
X5R
0201-1
6.3V20%
X5R
1.0UF
OSCAR + SENSORSSYNC_DATE=N/ASYNC_MASTER=N/A
PWRTERM2GND
PP1V8PP3V0_IMU
PP1V8
AP_TO_I2C1_SCLAP_BI_I2C1_SDA
PP1V8_COMP
PP1V8PP1V8_COMP
COMP_INT2
GYRO_TO_AP_INT2PP1V8
GYRO_CP
ACCEL_TO_AP_INT1
I2C_SDA_COMP
COMPASS_TO_AP_INT_2
I2C_SCL_COMP
AP_BI_I2C1_SDA
AP_TO_I2C1_SCL
PP3V0_IMU
GYRO_TO_AP_INT1
AP_BI_I2C0_SDAAP_TO_I2C0_SCL
ACCEL_TO_AP_INT2
PP3V0_COMP
PP3V0_IMU
FL3912
FL381 2
C3001
2
C336 1
2
C334 1
2
C298 1
2
C3471
2
C3451
2
C344 1
2
C111
2
U16
D1D2
A2
A1
D4
B3
A3A4
B4
C3
C2B1
C4
C1
FL7511 2
FL7531 2
FL7521 2
U8
14
5
86
13
12
7 91011
15
234
16
1
U18
4
9
6
5
101112
1314
123
8 7
C997 1
2
051-9584
2.0.0
20 OF 23
20 OF 46
2 3 4 5 6 7 10 11 12 14 18 19 20 21
12 20
2 3 4 5 6 7 10 11 12 14 18 19 20 21
3 20
3 20
20
2 3 4 5
6 7
10
11
12
14
18
19
20
21
20
3
2 3 4 5 6 7 10 11 12 14 18 19 20 21
3
3
3 20
3 20
12 20
3
3 13 14 15 16
3 13 14 15 16
3
12 20
VIN
GND
VOUT
VEN
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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D
8 7 6 5 4 3
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A
NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
0.07 OHMS
THIS ONE ON MLB --->
ROUTING CRITICAL, FOLLOW N41
516S0939 RCPT (USED ON FLEX)
CAM0: MAIN CAMERA CONNECTOR
516S0940 PLUG
4-LANE MIPICAM0:
THIS XW LINK AT CONNECTOR PIN
0201-1
1.0UF6.3V20%
X5R NP0-C0G
56PF6.3V5%
01005
0201-1
20%
X5R
1.0UF6.3V
5%6.3V
NP0-C0G
56PF
01005
100K
01005
1/32W5%
MF
56PF
NP0-C0G
5%
01005
6.3V
120-OHM-210MA
01005
56PF5%
01005NP0-C0G6.3V
01005
120-OHM-210MA
120-OHM-210MA
01005
120-OHM-210MA
01005
0201-1
6.3VX5R
20%1.0UF
FERR-22-OHM-1A-0.065-OHM
0201
0201
FERR-22-OHM-1A-0.065-OHM
NO_XNET_CONNECTIO=TRUE
56PF6.3V
5%
NP0-C0G01005
NP0-C0G6.3V
01005
5%56PF
120-OHM-210MA
01005
M-ST-SMBB35-PA
SM
LP5908AP-1.28VUSMD
90-OHM-50MATCM0605-1
TCM0605-190-OHM-50MA
90-OHM-50MATCM0605-1
TCM0605-190-OHM-50MA
TCM0605-190-OHM-50MA
56PF5%
NP0-C0G6.3V
010050201-1
1.0UF20%
X5R6.3V
10-OHM-750MA
01005-1
0201-1
1.0UF20%
X5R6.3V
NP0-C0G
5%
01005
56PF6.3V
FERR-22-OHM-1A-0.065-OHM
0201NO_XNET_CONNECTIO=TRUE
0201-1
1.0UF20%
X5R6.3V
56PF5%6.3VNP0-C0G01005
SYNC_DATE=N/ASYNC_MASTER=N/A
CAM0 CONNECTOR
PP2V8_CAM_AVDD
PP2V8_CAM0_CONN
PP2V5_CAM0_AF_CONN
PP1V8_CAM0_REG
PP1V2_CAM0_CONN
AP_BI_CAM_RF_SDA_CONN
AP_TO_CAM_RF_SHUTDOWN_CONN
90_CAM0_MIPI_DATA0_CONN_N
PP1V8
45_AP_TO_CAM_RF_CLK
CAM0_TO_LEDDRV_STROBE_EN_CONN
PP1V8_CAM0_CONN
PP1V8
AP_BI_CAM_RF_SCL_CONN
45_AP_TO_CAM_RF_CLK_CONN
AP_TO_CAM_RF_SHUTDOWN
PP2V5_CAM0_AF
90_CAM0_MIPI_DATA3_CONN_P
90_CAM0_MIPI_DATA2_CONN_N
90_CAM0_MIPI_CLK_CONN_N
AP_TO_CAM_RF_VDDCORE_EN
PP2V5_CAM0_AF_COMP
90_CAM0_TO_AP_MIPI_DATA3_P90_CAM0_TO_AP_MIPI_DATA3_N
90_CAM0_TO_AP_MIPI_DATA2_P90_CAM0_TO_AP_MIPI_DATA2_N
90_CAM0_TO_AP_MIPI_CLK_P90_CAM0_TO_AP_MIPI_CLK_N
90_CAM0_TO_AP_MIPI_DATA1_P90_CAM0_TO_AP_MIPI_DATA1_N
90_CAM0_TO_AP_MIPI_DATA0_P90_CAM0_TO_AP_MIPI_DATA0_N
90_CAM0_MIPI_DATA0_CONN_P
90_CAM0_MIPI_DATA1_CONN_N90_CAM0_MIPI_DATA1_CONN_P
90_CAM0_MIPI_CLK_CONN_P
90_CAM0_MIPI_DATA2_CONN_P
90_CAM0_MIPI_DATA3_CONN_N
CAM0_TO_LEDDRV_STROBE_EN
AP_TO_CAM_RF_SCL
PGND_CAM0_AF_RET
AP_BI_CAM_RF_SDA
C350 1
2
C3731
2
C357 1
2
C3581
2
C249 1
2
C3761
2
R721
2
C311
2
FL221 2
C841
2
FL311 2
FL301 2
FL281 2
C286 1
2
L271 2
L291 2
C361 1
2
C353 1
2
FL291 2
J3
33 34
35 36
1
1011 1213 1415 1617 1819
2
2021 2223 2425 2627 2829
3
3031 32
45 67 89
XW291 2
U13
B2
B1
A1 A2
L341
2 3
4
L331
2 3
4
L371
2 3
4
L381
2 3
4
L361
2 3
4
C3521
2
C287 1
2
FL431 2
C82 1
2
C3511
2
L281 2
051-9584
2.0.0
21 OF 23
21 OF 46
11 12
2 3 4 5 6 7 10 11 12 14 18 19 20 21
7
2 3 4 5 6 7 10 11 12 14 18 19 20 21
7
12
3
12
7
7
7
7
7
7
7
7
7
7
15
7 15
12
7 15
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A A
A
A
A
A
A
A
A
A
A
A
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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8 7 6 5 4 3
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NOTICE OF PROPRIETARY PROPERTY:
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IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALSTESTPOINTS
E75 - USB/UART/ID/POWER
POWER GROUND
SPKAMP OUTPUT TP
VBUS
POWER GROUND
VBATT
POWER TP
SUPER TP
PCB: PLACE XW12 AT BATT CONN, PIN 7
HEADPHONE MIC
VBATT
VBATT GROUND
806-4228
DFUFORCE DFU
RESETH6P & BB RESET
ANALOG MUX B OUTPUT
(ON NORTH END OF SINGLE_BRD, TO MITIGATE COMPASS RETURN CURRENTS)
BATTERY CONN516S1022 RCPT
860-1511
860-1511
THIS ONE ON MLB --->516S1023 PLUG (USED ON BATTERY PCM)
LCD BACKLIGHT SOURCE
POWER GROUND
LCD BACKLIGHT SINK1
HEADPHONE MIC POS
LCD BACKLIGHT SINK2
MIC3 POSITIVE
MIC2 POSITIVE
MIC1 POSITIVE
DRIVE MIC WRT NEAREST GROUND TEST POINT
FOR DIAGS
LCM BACKLIGHT
MIC AUDIO
HEADPHONE MIC NEG
SHIELDS
POWER GROUND
SCREW HOLES STANDOFFS
ACCESSORY ID AND POWERANALOG MUX A OUTPUT
AC COUPLED SCREW HOLES + STANDOFFS
BATTERY NTC
806-4832
FIDUCIALS
806-4834
806-4230
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
TP-P6
FID0P5SM1P0SQ-NSP
FID0P5SM1P0SQ-NSP
FID0P5SM1P0SQ-NSP
0P5SM1P0SQ-NSPFID
0P5SM1P0SQ-NSPFID
0P5SM1P0SQ-NSPFID
SHORT-10L-0.25MM-SM
NP0-C0G
5%16V
56PF
01005
X7R-CERM10V10%
01005
220PF56PF
01005
5%
NP0-C0G16V
01005NP0-C0G
16V5%
56PF
NP0-C0G16V5%
56PF
01005 01005
56PF5%16VNP0-C0G
120-OHM-210MA
01005F-ST-SM
RCPT-BATT-N41
STDOFF-2.7OD1.4ID-1.04H-SM-1
STDOFF-2.7OD1.4ID-1.04H-SM-1
SM
SHLD-X145-EMI-LOWER-FRONT
01005
27PF5%16VNP0-C0GNP0-C0G
16V5%56PF
0100501005NP0-C0G16V5%100PF
NP0-C0G16V5%27PF
0100501005
56PF5%16VNP0-C0G
100PF5%16VNP0-C0G01005
16V
01005NP0-C0G
5%27PF56PF
01005
5%16VNP0-C0G
16V5%100PF
01005NP0-C0G
TP-P6 TP-P6
TP-P6
TP-P6
TP-P6
TP-P55
TP-P90
TP-P80
SHLD-EMI-UPPER-BACK
SM
SM
SHLD-EMI-UPPER-FRONT
SHLD-X145-EMI-LOWER-BACK
SM
TP-P6
TP-P6
TP-P6
TP-P6
BATT B2B, TPS, PD FEATURESSYNC_DATE=N/ASYNC_MASTER=N/A
SPKAMP_TO_SPEAKER_OUT_CONN_P
SPKAMP_TO_SPEAKER_OUT_CONN_N
90_TRISTAR_BI_E75_PAIR1_P
90_TRISTAR_BI_E75_PAIR1_N
PP_BATT_VCC
PP5V0_USB_CONN
PP_BATT_VCC
PP_BATT_VCC
BATTERY_TO_PMU_NTC
PMU_AMUX_BY
BATTERY_TO_PMU_SENSE
PMU_AMUX_AY
PP_E75_TO_TRISTAR_ACC2_CONN
PP_E75_TO_TRISTAR_ACC1_CONN
90_TRISTAR_BI_E75_PAIR2_N
FORCE_DFU
RESET_1V8_L
CODEC_TO_HPHONE_HS4_REF_CONN
AP_BI_BATTERY_SWI_CONN
PGND_STANDOFF2
PGND_STANDOFF1
AP_BI_BATTERY_SWI
LCD_BL_CA_CONN
LCD_BL_CC1_CONN
MIC3_TO_CODEC_P
MIC2_TO_CODEC_P
MIC1_TO_CODEC_P
E75_TO_PMU_ACC_DETECT_CONN
CODEC_TO_HPHONE_HS3_REF_CONN
LCD_BL_CC2_CONN
PGND_SCREW_HOLE1
AP_BI_BATTERY_SWI_CONN
90_TRISTAR_BI_E75_PAIR2_P
PP_BATT_VCC
TP181
TP191
TP201
TP261
TP271
TP251
TP321
TP101
TP11
TP21
TP151
TP161
TP171
TP281
TP291
TP51
TP61
TP71
TP81
TP91
FD1
1
FD5
1
FD4
1
FD3
1
FD2
1
FD6
1
XW121
2
C279 1
2
C2751
2
C91
2
C25 1
2
C23 1
2
C221
2
FL111 2
J6
1
10
11
12
2
34
56
78
9
BS1
1
BS2
1
SH21
C4381
2
C4361
2
C4341
2
C4371
2
C4351
2
C4331
2
C4321
2
C4301
2
C4271
2
TP111 TP211
TP241
TP231
TP221
TP41
TP341
TP31
SH31
SH11
SH41
TP911
TP921
051-9584
2.0.0
22 OF 23
22 OF 46
15 17
15 17
16 17
16 17
8 12 15 22 23
17
8 12 15 22 23
8 12 15 22 23
12 17
13
12
13
17
17
16 17
3
2 12 13 14 16 19 23
17
22
3 13
19
19
9 11
8 9
9 17
17
17
19
22
16 17
8 12 15 22 23
IN
IN
OUT
IN
OUT
OUT
IN
BI
BI
IN
OUT
OUT
IN
IN
IN
IN
OUT
IN
IN
BI
OUT
IN
IN
OUT
IN
IN
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
BI
BI
BI
BI
BI
IN
BI
OUT
OUT
BI
IN
IN
RESET_PMU_L
BB_SPI_TO_PAC_CS
BB_SPI_TO_PAC_CLK
AP_HSIC3_RDY
BB_SPI_TO_PAC_DATA_MOSI
OSCAR_CONTEXT_A
OSCAR_CONTEXT_B
50_HSIC_BB_DATA
PBL_RUN_BB_HSIC1_RDY
BB_HSIC1_REMOTE_WAKE
AP_WAKE_MODEM
AP_HSIC1_RDY
WLAN_HSIC3_RESUME
WLAN_HSIC3_DEVICE_RDY
CLK32K_AP
BB_RST_L
RF_RESET_L
RESET_DET_L
RADIO_ON_L
PP_LDO14_2V65
TX_GTR_THRESH
BB_UART_RXD
BB_UART_RTS_L
BB_UART_TXD
PP_SYNC
HOST_WAKE_BB
BB_I2S_RXD
BB_I2S_TXD
BB_I2S_WS
BT_REG_ON
BT_UART_TXD
BT_WAKE
50_HSIC_BB_STROBE
BB_I2S_CLK
BT_UART_RTS_L
HOST_WAKE_BT
BB_UART_CTS_L
90_BB_USB_D_N
90_BB_USB_D_P
BB_USB_VBUS
ADC_SMPS1_MSMC_1V05
ADC_LVS1
WLAN_UART_TXD
BT_UART_CTS_L
50_HSIC_WLAN_STROBE
BB_JTAG_TCK
BB_JTAG_TMS
ADC_LDO6_RUIM_1V8
ADC_SMPS3_MSME_1V8
BT_UART_RXD
LAT_SW2_CTL
LAT_SW1_CTL
50_HSIC_WLAN_DATA
BB_JTAG_TDO
BB_JTAG_TRST_L
BB_JTAG_TDI
PP_WL_BT_VDDIO_AP
PP_VCC_MAIN_WLAN
PP_BATT_VCC_CONN
WLAN_REG_ON
WLAN_UART_RXD
HOST_WAKE_WLAN
BT_PCM_SYNC
BT_PCM_OUT
BT_PCM_CLK
BT_PCM_IN
BB_I2S_MCLK
BB_I2S2_CLK
BB_I2S2_WS
BB_I2S2_RXD
BB_IPC_GPIO
PAC_TO_BB_SPI_DATA_MISO
RADIO_MLB
OUT
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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8 7 6 5 4 3
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
RADIO_MLB HIERARCHICAL SYMBOLAP/RADIO INTERFACE
<OUT> BB_TO_LAT_SW3_CTL
10 12 13 14 46
3 25
3 25
13 25
13 25
15 29
13 25
16 25
16 25
3 25
3 25
3 16 25
3 16 25
3 25
3 25
3 25
3 25
3 4 10 12 13 14 16 46
13 25
3 29
13 46
3 25
13 25
13 46
3 46
3 25
3 46
3 25
3 46
3 46
3 46
3 46
2 25
2 25
2 25
2 25
3 25
3 25
3 25
3 46
3 46
13 25 RADIO_TO_PMU_ADC_SMPS1_MSMC_1V05
13 25
13 25
13 25
13 25
3 25
3 29 BB_TO_AP_PP_SYNC
17 26
17 29
2 12 13 14 16 19 22 25
3 25
17 25
3 25
3 25
3 25
3 25
3 25
3 29
3 25
8 29
8 29
3 29
8 12 15 22 25
29
I612RF
8 29
SYNC_MASTER=N/A SYNC_DATE=N/A
RADIO_MLB HIERARCH. SYMBOL
MAKE_BASE=TRUEANTENNA_PAC_TO_BB_SPI_MISO
MAKE_BASE=TRUEBB_TO_AP_IPC_GPIO
AP_TO_BT_I2S3_DOUT MAKE_BASE=TRUE
45_AP_TO_BT_I2S3_BCLK MAKE_BASE=TRUE
BT_TO_AP_I2S3_DIN MAKE_BASE=TRUE
AP_TO_BT_I2S3_LRCLK MAKE_BASE=TRUE
WLAN_TO_PMU_HOST_WAKE MAKE_BASE=TRUE
AP_TO_WLAN_UART4_TXD MAKE_BASE=TRUE
PMU_TO_WLAN_REG_ON MAKE_BASE=TRUE
MAKE_BASE=TRUEPP_BATT_VCCMAKE_BASE=TRUEPP_VCC_MAINMAKE_BASE=TRUEPP1V8_SDRAM
MAKE_BASE=TRUE AP_TO_BB_JTAG_TDI
AP_TO_BB_JTAG_TRST_LMAKE_BASE=TRUE
BB_TO_AP_JTAG_TDOMAKE_BASE=TRUE
50_AP_BI_WLAN_HSIC3_DATA MAKE_BASE=TRUE
MAKE_BASE=TRUEBB_TO_LAT_SW1_CTLMAKE_BASE=TRUEBB_TO_LAT_SW2_CTL
MAKE_BASE=TRUEAP_TO_BT_UART3_TXD
RADIO_TO_PMU_ADC_SMPS3_MSME_1V8 MAKE_BASE=TRUE
RADIO_TO_PMU_ADC_LDO6_RUIM_1V8 MAKE_BASE=TRUE
AP_TO_BB_JTAG_TMSMAKE_BASE=TRUE
MAKE_BASE=TRUE AP_TO_BB_JTAG_TCK
MAKE_BASE=TRUE50_AP_BI_WLAN_HSIC3_STB
MAKE_BASE=TRUEAP_TO_BT_UART3_RTS_L
WLAN_TO_AP_UART4_RXD MAKE_BASE=TRUE
RADIO_TO_PMU_ADC_LVS1 MAKE_BASE=TRUE
MAKE_BASE=TRUE
PMU_TO_BB_VBUS_DET MAKE_BASE=TRUE
90_TRISTAR_BI_BB_USB_P MAKE_BASE=TRUE
90_TRISTAR_BI_BB_USB_N MAKE_BASE=TRUE
AP_TO_BB_UART1_RTS_L MAKE_BASE=TRUE
BT_TO_PMU_HOST_WAKE MAKE_BASE=TRUE
MAKE_BASE=TRUEBT_TO_AP_UART3_CTS_L
45_AP_TO_BB_I2S1_BCLK MAKE_BASE=TRUE
MAKE_BASE=TRUE50_AP_BI_BB_HSIC1_STB
AP_TO_BT_WAKE MAKE_BASE=TRUE
MAKE_BASE=TRUEBT_TO_AP_UART3_RXD
MAKE_BASE=TRUEPMU_TO_BT_REG_ON
AP_TO_BB_I2S1_LRCLK MAKE_BASE=TRUE
BB_TO_AP_I2S1_DIN MAKE_BASE=TRUE
AP_TO_BB_I2S1_DOUT MAKE_BASE=TRUE
BB_TO_PMU_HOST_WAKE MAKE_BASE=TRUE
MAKE_BASE=TRUE
BB_TO_AP_UART1_RXD MAKE_BASE=TRUE
BB_TO_AP_UART1_CTS_L MAKE_BASE=TRUE
AP_TO_BB_UART1_TXD MAKE_BASE=TRUE
BB_TO_LEDDRV_GSM_BLANK MAKE_BASE=TRUE
MAKE_BASE=TRUEPP_LDO14_2P65
AP_TO_RADIO_ON_L MAKE_BASE=TRUE
BB_TO_AP_RESET_DET_L MAKE_BASE=TRUE
RESET_1V8_L MAKE_BASE=TRUE
AP_TO_BB_RST_L MAKE_BASE=TRUE
45_PMU_TO_WLAN_CLK32K MAKE_BASE=TRUE
WLAN_TO_AP_HSIC2_RDY MAKE_BASE=TRUE
MAKE_BASE=TRUEWLAN_TO_AP_HSIC2_REMOTE_WAKE
AP_TO_BB_HSIC1_RDY MAKE_BASE=TRUE
MAKE_BASE=TRUEAP_TO_BB_WAKE_MODEMBB_TO_AP_HSIC1_REMOTE_WAKE MAKE_BASE=TRUE
BB_TO_AP_HSIC1_RDY MAKE_BASE=TRUE
MAKE_BASE=TRUE50_AP_BI_BB_HSIC1_DATA
MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_MOSI
AP_TO_WLAN_HSIC2_RDY MAKE_BASE=TRUE
MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_SCLK
MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_CS_L
PMU_TO_BB_RST_L MAKE_BASE=TRUE
051-9584
2.0.0
23 OF 23
23 OF 46
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_HEAD
TABLE_5_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
PROPRIETARY PROPERTY OF APPLE INC.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
DESCRIPTION OF REVISIONCKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
THE INFORMATION CONTAINED HEREIN IS THE
C
A
D
DATE
R
SHEET
Apple Inc.
THE POSESSOR AGREES TO THE FOLLOWING:
DRAWING TITLE
DSIZE
REVISION
DRAWING NUMBER
BRANCH
REV ECN
7
B
3
II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
IV ALL RIGHTS RESERVEDIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
BOARD :920-2148BOM :939-0308SCH :951-2446
BOARD_ID BOM OPTIONS
X155 RADIO_MLB SUBDESIGN - PROTO110/3/2012
24 OF 46
2012-10-14ENGINEERING RELEASED
1 OF 23
2.0.0
051-9584
2 0001669557
4 CELLULAR PMU: (2 OF 2)
R25_RF Y N48_CFG_A255K 1% 010051118S0659
X155 RADIO_MLB SCHEMATIC
R25_RF1 Y N51_CFG_B470K 5% 01005117S0159
R25_RF1.00M 1% 010051 Y N51_CFG_A118S0621
R26_RF N51_CFG_A1 Y118S0732 50K 1% 01005
R26_RF N48_CFG_B1 Y100K 1% 01005118S0626
R26_RF1 Y N49_CFG_B118S0621 1.00M 1% 01005
CELLULAR FRONT END: TX AND RX MATCHING9
CELLULAR FRONT END: BAND 5/8 PAD14
5 CELLULAR BASEBAND: (1 OF 2)
CELLULAR RF TRANSCEIVER: (2 OF 2)8
CELLULAR FRONT END: BAND 1/4 PAT11
CELLULAR FRONT END: BAND 2/3 PAD12
22 FRONT END LOGIC TABLE (2 OF 2)
FRONT END LOGIC TABLE (1 OF 2)21
20 CELLULAR FRONT END: ANTENNA FEEDS
17 CELLULAR FRONT END: 2G FEM
16 CELLULAR FRONT END: PA DCDC CONVERTER
CELLULAR FRONT END: BAND 13/17 PAD15
1 EEE FOR 939-0308 EEEE_????825-2029 Y NA
951-2446 SCH Y1 X145_RADIO_MLB
CELLULAR FRONT END: GPS LNA19
CELLULAR RF TRANSCEIVER: (1 OF 2)7
R25_RF1 Y N49_CFG_B118S0732 50K 1% 01005
R25_RF N49_CFG_A1 Y100K 1% 01005118S0626
R26_RF N49_CFG_A1 Y118S0650 499K 1% 01005
R25_RF1 Y N48_CFG_B118S0689 147K 1% 01005
3 CELLULAR PMU: (1 OF 2)
R26_RF1 Y N48_CFG_A118S0626 100K 1% 01005
2 AP INTERFACE & DEBUG CONNECTORS
CONTENTSPDF PAGE
R26_RF1 Y118S0623 267K 1% 01005 N53_CFG_B
6 CELLULAR BASEBAND: (2 OF 2)
WIFI/BT: MODULE AND FRONT END23
CELLULAR FRONT END: RX DIVERSITY18
13 CELLULAR FRONT END: BAND 20 PAD
CELLULAR FRONT END: SAW BANKS10
1 Y N53_CFG_B118S0626 R25_RF100K 1% 01005
R26_RF1 Y N53_CFG_A118S0726 162K 1% 01005
R25_RF1 Y N53_CFG_A118S0626 100K 1% 01005
118S0626 R26_RF1 Y N51_CFG_B100K 1% 01005
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
BI
IN
BI
OUT
OUT
IN
IN
IN
IN
IN
OUT
OUT OUT
OUT
OUT
IN
BI
IN
OUT
IN
IN
IN
OUT
OUT
IN
IN
OUT
OUT
OUT
BI
OUT
IN
IN
PP
PP
PP
PP
PP
PP
PP
PP
PP
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
IN
OUT
PP
PP
OUT
PP
PP
PP
PP
PP
PP
IN
IN
IN
OUT
OUT
OUT
PP
PP
PP
GND
PP
PP
PP
PP
CLK
RST
VCC
SWPGND
DETECT
I/O
IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
SIM CARD CONNECTOR
SIM CARD ESD PROTECTION
AP INTERFACE & DEBUG CONNECTORS
IN = FROM APAP CONNECTIONSOUT = TO AP
PROBE POINTS
GPIO51/BOOT_CONFIG_3GPIO53/BOOT_CONFIG_1 GPIO48/BOOT_CONFIG_6
GPIO54/BOOT_CONFIG_0
NC
SW REGISTER
0X00
0X01
0X08
0X03
47
BOOT_CONFIG
ENABLE SAHARA PROTOCOL X
BOOT_NAND_OPTION
BOOT_HSIC_OPTION
BOOT_USB_OPTION
BOOT_DEFAULT_OPTION
BOOT OPTIONS
0X02
VALUE
X
X
X
X
6
GPIO/BOOT_CONFIG CONFIGURATION
48
0
1
1
1
1
0 0 1 0 X X X
0
0
0
0
000
0
0
5
49
0
34
0
50
0
51
1
0
100
1
10
0
0
52
2
53
0
54
0
1 0
X
X
X
X
55
NC
DEBUG CONNECTOR
NC
NC
NOSTUFF
AXE654124M-ST-SM
12V-33PF01005-1
15.00K
MF1/32W1%
01005
SMP4MM
P4MMSM
P4MMSM
P4MMSM
P4MMSM
P4MMSM
P4MMSM
MM4829-2702F-ST-SMNOSTUFF
F-ST-SMMM4829-2702
NOSTUFF
SMP4MM
P4MMSM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
P4MMSM
SMP4MM
P4MMSM
P4MMSM
SMP4MM
P4MMSM
SMP4MM
P4MMSM
P4MM-NSMSM
SMP4MM-NSM
P4MM-NSMSM
SON4TPD4E101DPWR
01005
6.3VCERM
100PF5%
P4MMSM
SMP4MM
P4MMSM
SMP4MM
AP INTERFACE & DEBUG CONNECTORS
BB_I2S_CLK
BB_I2S_TXD
BB_I2S_RXD
BB_I2S_WS
50_HSIC_WLAN_STROBE
50_HSIC_WLAN_DATA
BT_UART_TXD
BT_UART_RXD
50_HSIC_BB_STROBE
WLAN_HSIC3_DEVICE_RDY
SIM_TRAY_DETECT
BB_I2S2_CLKBB_I2S2_WSBB_I2S_MCLK
OSCAR_CONTEXT_A
SIM_TRAY_DETECT
SIMCRD_CLK_CONNSIMCRD_RST_CONN
SIMCRD_IO_CONN
BB_I2S2_RXD
BB_I2S_RXD
BB_I2S_CLK
WLAN_UART_RXD
50_HSIC_WLAN_DATA
BT_UART_TXDBT_UART_RXDBT_UART_RTS_LBT_UART_CTS_L
BB_SPI_TO_PAC_CS
BB_SPI_TO_PAC_CLK
BB_JTAG_TMSBB_JTAG_TRST_L
ADC_SMPS1_MSMC_1V05
BB_JTAG_TCK
BT_PCM_IN
BB_UART_TXD
AP_WAKE_MODEM
HOST_WAKE_BB
50_HSIC_WLAN_STROBEHOST_WAKE_BT
AP_HSIC3_RDY
CLK32K_AP
PP_LDO6_RUIM_1V8
PP_BATT_VCC_CONN
LTE_COEX_TXD
WTR_RF_ON
WTR_RX_ON
AP_HSIC3_RDY
RESET_PMU_L
RESET_DET_LBB_RST_L
WLAN_HSIC3_RESUMEPBL_RUN_BB_HSIC1_RDYRF_RESET_L
ADC_LVS1BB_IPC_GPIO
ADC_LDO6_RUIM_1V8ADC_SMPS3_MSME_1V8
BB_JTAG_TDO
PAC_TO_BB_SPI_DATA_MISO
BB_SPI_TO_PAC_DATA_MOSI
BT_PCM_OUTBT_PCM_SYNC
BT_REG_ONBT_PCM_CLK
BT_WAKE
WLAN_HSIC3_DEVICE_RDYHOST_WAKE_WLAN
WLAN_REG_ON
PP_WL_BT_VDDIO_APPP_SYNC
90_BB_USB_D_N90_BB_USB_D_PBB_USB_VBUSBB_UART_CTS_LBB_UART_RTS_LBB_UART_RXD
BB_HSIC1_REMOTE_WAKE50_HSIC_BB_STROBE
AP_HSIC1_RDY
RADIO_ON_L
TX_GTR_THRESH
WLAN_HSIC3_RESUME
PP_SMPS3_MSME_1V8
SIM_TRAY_DETECT
BB_JTAG_TRST_LBB_JTAG_RTCLK
AP_HSIC1_RDY
PMIC_RESOUT_L
BB_JTAG_TMS
GPIO_51GPIO_DEBUG_LEDBB_UART_CTS_L
BB_UART_TXDPS_HOLD_PMIC
BB_UART_RXD
LAT_SW1_CTL2G_FEM_S1
2G_FEM_S4
PBL_RUN_BB_HSIC1_RDY
BB_JTAG_TDI
BB_UART_RTS_L
SIMCRD_IO_CONN
RF_RESET_LBB_JTAG_TCK
RESET_PMU_L
RESET_DET_LSIMCRD_CLK_CONN
BB_RST_LSIMCRD_RST_CONN
90_BB_USB_D_P
BT_WAKE
WLAN_REG_ON
PP_LDO6_RUIM_1V8
90_BB_USB_D_N
BT_REG_ON
PP_LDO6_RUIM_1V8
50_HSIC_BB_STROBE
50_HSIC_BB_DATA
ADC_SMPS1_MSMC_1V05PP_SMPS1_MSMC_1V05
ADC_SMPS3_MSME_1V8PP_SMPS3_MSME_1V8
ADC_LDO6_RUIM_1V8PP_LDO6_RUIM_1V8
ADC_LVS1PP_LVS1
SIMCRD_IO_CONN
BB_JTAG_TDO
BB_USB_VBUS
RADIO_ON_L
DEBUG_RST_L
BB_ERROR_FLAG
HOST_WAKE_BB
50_HSIC_BB_DATA
50_HSIC_BB_DATA
WLAN_UART_TXD
PP_BATT_VCC_CONN
BB_JTAG_TDI
OSCAR_CONTEXT_B
PP_LDO14_2V65
LAT_SW1_CTLLAT_SW2_CTL
PMIC_SSBI
SLEEP_CLK_32K
19P2M_MDM
CLK32K_AP
WTR_SSBI_TX_GPS
WTR_SSBI_PRX_DRX
BB_I2S_TXDBB_I2S_WS
PP_VCC_MAIN_WLAN
WLAN_COEX_TXD
F-ST-SM
SIMCRD_CLK_CONN
SIMCRD_RST_CONN SIM-CARD-N48
051-9584
2.0.0
2 OF 23
25 OF 46
28
27 23 25
28 23 25
28 23 25
28 23 25
28 23 25
28 23 25
28 23 25
28 23 25
29
28 23 25
28
27
29 23 25
46 23 25
29 23 25
29 23 25
29 23 25
29
29 40 41 29 23 25
25 23
27 23 25
50
42444648
3234363840
26
2224
2830
161412
1820
2
10864
4947454341
33312927252321
353739
7531
191715
91113
5254
5153
55
58 57
56
J1_RF
27 28
25 29
25 29
25 29
25 26 28 29 31
25 26 28
25 29
29 40
1
2
C1_RF
27 23 25
1
2
R3_RF
29 23 25
29 23 25
29 23 25
29 23 25
46 23 25
25 29
25 29
25 29
25 29
1
PP3_RF
1
PP2_RF
1
PP1_RF
1
PP18_RF
1
PP15_RF
1
PP14_RF
1
PP11_RF
42 3
1
J3_RF
42 3
1
J2_RF
1
PP21_RF
1
PP22_RF
46 23 25
21
XW12_RF
21
XW13_RF
21
XW14_RF
21
XW15_RF
1
PP40_RF
1
PP41_RF
1
PP42_RF
1
PP43_RF
1
PP44_RF
1
PP45_RF
1
PP46_RF
1
PP47_RF
1
PP10_RF
1
PP19_RF
1
PP20_RF
3
41
2
5
U5_RF
2
1 C177_RF
1
PP4_RF
1
PP5_RF
1
PP6_RF
1
PP7_RF
3
2
1
6
8 910
11
13 5
12
7
J11_RF
40 23 25 26 34 35 36 37 38 39
2 6
2 6
2 6
2 6
2 23
2 23
2 23
2 23
2 5
2 23
6
6
6
6 23
2 6
2 6 2 6
2 6
6
2 6
2 6
23
2 23
2 23
2 23
23
23
6 20
6 20
2 5
2 5
2
2 5
23
2 6
6
2 6
23
2 23
23
2 23
2 23
2 3 5
6 23
23
6 7
6 7
2 23
2 4
2 6
2 4
2 23
2 6
2
2
6
2
2
2 5
6 20
6 20
23
23
2 23
23
2 23
2 23
23
2 23
23
6
2 5
2 5
2 5
2 6
2 6
2 6
6
2 5
2 6
2 4
6
2 23
2 3 5
2 5
2 5
2 3 5
2 2 3 5 6 8
2 2 3 5
2 3 5
6
2 5
2 5
23
2 3 11 12 13 14 15 16 17
2 5
6 23
3 10 17 18 20
2 6
6
4 5
4 5
4 5
2 23
6 7
6 7
2 6
2 6
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
IN
VDD_S4
VSW_S5
VSW_S3
VSW_S2
VREG_XO
VREG_S5
VREG_S4
VREG_RFCLK
VREG_L9VREG_L8VREG_L7
VREG_L6VREG_L5VREG_L4VREG_L3VREG_L2
VREG_L14VREG_L13
VREG_L12VREG_L11VREG_L10
VOUT_LVS1
VDD_XO
VDD_S5
VDD_S2
VDD_S1
VDD_L9VDD_L8VDD_L7
VDD_L5_L6_L13_L14
VDD_L4
VDD_L2_L3
VDD_L12
VDD_L10_L11
REF_GNDREF_BYP
VSW_S5_2VREG_S3
VSW_S4
VDD_S3
VSW_S1
VREG_S1
VREG_S2
VREG(SYM 5 OF 5)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
INTERNAL USE ONLY
INTERNAL USE ONLY
PMU (1 OF 2)
20%
X5R01005
0.1UF4V
20%6.3VX5R-CERM0603-3
22UF
20%6.3V
0603-3X5R-CERM
22UF
20%6.3VX5R-CERM-1
22UF
603
20%6.3V
22UF
X5R-CERM-1603
0201-1
20%6.3VX5R
1.0UF
0201-1
20%6.3V
1.0UF
X5R0201-1
20%6.3V
1.0UF
X5R
0201-1
20%6.3V
1.0UF
X5R
0201-1
20%6.3V
1.0UF
X5R
0201-1
20%6.3V
1.0UF
X5R
0402
20%10UF6.3VCERM
0402
20%10UF6.3VCERM
0402
20%10UF6.3VCERM
0402
20%10UF6.3VCERM
0402
20%10UF6.3VCERM
0201-1
1.0UF20%6.3VX5R
2.2UH-20%-1.2A-0.15OHM
0806
2.2UH-20%-1.2A-0.15OHM
0806
2.2UH-20%-1.2A-0.15OHM
0806
0806
2.2UH-20%-1.2A-0.15OHM
20%6.3V
22UF
X5R-CERM-1603
0201-1
20%6.3V
1.0UF
X5R
20%4.7UF
X5R-CERM10V
0402
20%4.7UF10V
0402X5R-CERM
20%
X5R-CERM0402
10V
4.7UF20%
0402
10V
4.7UF
X5R-CERM
20%4.7UF10VX5R-CERM0402
20%0.1UF
NOSTUFF01005X5R4V
20%10UF6.3V
0402CERM
20%10UF6.3V
0402CERM
16VNP0-C0G
56PF5%
01005
20%10UF6.3V
0402CERM
0201-1
20%6.3V
1.0UF
X5R0201-1
20%6.3VX5R
1.0UF
SHORT-10L-0.1MM-SM
NOSTUFF
PM8018-0BGA
TFA252010-SM
2.2UH-20%-2.3A-0.115OHM
CELLULAR PMU: (1 OF 2)
PP_VSW_S4 PP_SMPS5_DSP_1V05
PP_VSW_S5
PP_SMPS3_MSME_1V8
PP_SMPS4_RF2_2V05
PP_VSW_S1PP_BATT_VCC_CONN
PP_SMPS4_RF2_2V05
PP_SMPS5_DSP_1V05
PP_VSW_S3
PP_VSW_S2
PP_LDO9_PLL_1V05PP_LDO8_VDDPX_1V2
PP_LDO11_MDSP_FW_1V05PP_LDO10_ADSP_1V05
PP_SMPS3_MSME_1V8
REF_GND
REF_BYP
S4_GND
S1_GND
S2_GND
S2_GND
S5_GND
S1_GND S4_GNDS3_GND S5_GND
PP_LVS1
PP_SMPS1_MSMC_1V05
S3_GND
PP_SMPS2_RF1_1V3
PP_LDO4_VDDA_3V3
PP_LDO2_XO_HS_1V8
PP_LDO6_RUIM_1V8
PP_LDO14_2V65PP_LDO7_DAC_1V8
PP_VREG
PP_LDO1
PP_LDO3_AMUX_1V8
PP_LDO5_GPS_LNA_2V5
PP_LDO12_MDSP_SW_1V05
PP_LDO13_VDDPX_2V95
051-9584
2.0.0
3 OF 23
26 OF 46
28 31
25 26 28 29 31
26 31
26
26 31
25 26 28 29 31
2
1 C50_RF
2
1 C57_RF
2
1 C58_RF
2
1 C56_RF
2
1 C55_RF
28
28
43 23 25 33 40 41
28
25 28
42
27 28
28
28
28
28
28
28
26
2
1 C3_RF
2
1 C2_RF
2
1 C4_RF
2
1 C5_RF
2
1C6_RF
2
1 C7_RF
2
1 C8_RF
2
1 C9_RF
2
1 C10_RF
2
1 C11_RF
2
1 C13_RF
25 28
25 28
2
1 C12_RF
21
L1_RF
21
L4_RF
21
L2_RF
21
L3_RF
2
1 C59_RF
2
1 C52_RF
2
1 C46_RF
2
1 C47_RF
2
1 C48_RF
2
1 C49_RF
2
1 C51_RF
2
1 C60_RF
2
1 C44_RF
2
1 C42_RF
40 23 25 34 35 36 37 38 39
2
1 C45_RF
2
1 C43_RF
2
1 C53_RF
2
1 C54_RF
21
XW17_RF
98
24
8882
87
4842
90
20
76
105
13
775463
1711843231
2923
435565
53
8
10189
95
104
705875
5
78
44
64
59
3428
1001281
186
929779
83102
U2_RF
21
L5_RF 3 4
3 4
3 4
3 4
3 4
3 4 3 4 3 4 3 4
3 4
OUT
IN
IN
IN
OUT
OUT
INOUT
OPT_1
PM_RESIN_NKPD_PWR*
BAT_ID
LED_DRV_N
OPT_2PM_MDM_INT_NPM_USR_INT_N
PON_RESET*
PON_TRIGSSBI
PS_HOLD
(SYM 1 OF 5)CONTROL
GND0
XTAL_32K_OUTXTAL_32K_IN
XTAL_19M_OUTXTAL_19M_IN
XOADC_GNDXO_THERM
XO_OUT_D0_EN
XO_OUT_D0
XO_OUT_A1
XO_OUT_A0
SLEEP_CLK
RSVD
GND1
(SYM 2 OF 5)CLOCKS
GND_S3
GND_S2
GND_S1
GND_S4
GND_S5
GND
VCOIN
(SYM 3 OF 5)INPUT PWR
MPP_06MPP_05MPP_04MPP_03MPP_02MPP_01
GPIO_06GPIO_05GPIO_04GPIO_03GPIO_02GPIO_01
(SYM 4 OF 5)MPP MISC
OUT
IN
IN
BI
IN OUT
OUT
IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
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D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
REVISIONBOARD_ID0.7V
NCNC
GND NEEDS TO BE CLEARED UNDER THIS CRYSTALTO MINIMIZE THERMAL DRIFT
NCNC
PA_ID < 1.00V FOR MAV8 PA_ID > 1.00V FOR MAV7
NC
NEEDS ITS OWN THERMISTOR PLACED NEAR THE PA’S.PA THERMISTOR REMOVED TO MATCH N41, AP SECTION
EVT2EVT1
DVTPVT1.7V
1.5V1.3V
PROTO20.9VPROTO1
NC
NCNCNC
NCNCNC
PMU (2 OF 2)
NC
NC
1.1V
X5R-CERM01005
10%6.3V
1000PF
NOSTUFF
15.8K
MF1/32W1%
01005
NOSTUFF
102K
01005
1/32W1%
MF
20.0K
5%
01005MF
1/32W
MF01005
5%
1.00K
1/32W
SHORT-10L-0.1MM-SM
100K
MF1/32W1%
01005SHORT-10L-0.25MM-SM
NOSTUFF
NOSTUFF
SHORT-10L-0.25MM-SM
SHORT-10L-0.25MM-SM
NOSTUFF
NOSTUFF
SHORT-10L-0.25MM-SM
SHORT-10L-0.25MM-SM
NOSTUFF
PM8018-0BGA
BGAPM8018-0
BGAPM8018-0
BGAPM8018-0
19.200MHZ2.0X1.6-SM
100K
01005
1%1/32WMF
01005
61.9K1%1/32WMF
CELLULAR PMU: (2 OF 2)
BOARD_ID
VREF_DAC_BIAS
VDDPX_BIAS
PA_ID
S3_GNDS2_GND
S1_GND
S4_GND
S5_GND
19P2M_CLK_EN
19P2M_WTR
SLEEP_CLK_32K
RESET_PMU_LRADIO_ON_L
PM_USR_IRQ_L
PMIC_RESOUT_L
PMIC_SSBI
PS_HOLD_PMIC
PP_LDO3_AMUX_1V8
BB_RST_L
PS_HOLD
19P2M_MDM
PM_MDM_IRQ_L
19P2M_XTAL_IN
XO_GND
XO_THERM_Y1
19P2M_XTAL_OUT
PP_LDO3_AMUX_1V8
051-9584
2.0.0
4 OF 23
27 OF 46
2
1 C127_RF
29
29
1
2
R26_RF
1
2
R25_RF
1 2
R20_RF
29
25 23
28
30
1 2
R21_RF
2
1
XW10_RF
1
2
R22_RF
26 27 28
21
XW2_RF
21
XW3_RF
21
XW1_RF
25 28
21
XW4_RF
21
XW16_RF
62
1669
35
86
741421
4
4168
47
U2_RF
27
153
21
2210
9
25
37
19
26
7
45
U2_RF
56
309610391
36939994
395161
465240
57
U2_RF
807372666785
497160503833
U2_RF
3
24
1
Y1_RF
1
2
R23_RF
1
2
R24_RF
25 28
28
26 27 28
25 28
25 23 25 28
29
25 23
3
3
3
3
3
2
IN
IN IN IN
ININ
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
IN
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
BI
BI
IN
BI
IN
IN
IN
IN
IN
IN
IN
IN
VDD_MDSP_SW
GND
VDD_A1VDD_A1
GNDGND
VDD_A2VDD_A2
VDD_ADSP
VDD_CORE
VDD_DDR
VDD_MDSP_FW
VDD_MEM
VDD_P1
VDD_P3
VDD_PLL1
VDD_P7
VDD_P4VDD_P5VDD_P6
VDD_QFUSE_PRG
VDD_USB_3P3VDD_USB_1P8
VDD_HVPAD_BIAS
VDD_P2
VDD_PLL2
PWR(5 OF 6)
GND
GND
GND_ANA
GND(6 OF 6)
EBI2_AD_0EBI2_AD_1
EBI2_AD_6EBI2_AD_5
EBI2_AD_7
EBI1_CAL
EBI2_CLE*EBI2_ALE*
EBI2_AD_2EBI2_AD_3EBI2_AD_4
EBI2_NAND_CS*
EBI2_BUSY*
EBI2_OE*EBI2_WE*
(2 OF 6)EBI1_EBI2
TCKRTCK
MODE_1MODE_0
CXOCXO_EN
SDC1_DATA3SDC1_DATA2
SDC1_CLK
SDC1_DATA1SDC1_DATA0
SDC1_CMD
USB_HS_DM
USB_HS_ID
USB_HS_VBUSUSB_HS_SYSCLK
TDI
HSIC_CAL
USB_HS_REXT
DNC
TMS
USB_HS_DPDNC
TDO
RESIN*
TRST*
RESOUT*
HSIC_DATAHSIC_STB
SRST*SLEEP_CLK
SSBI_PMIC
DIGITAL(1 OF 6)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
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D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
NC
NCNC
NCNCNCNCNCNCNC
NCNC
NC
NC
NC
NC
NCNCNCNC
NC
NCNC
NC
NCNC
NC
NC
ID IS NC
NCNC
NC
BASEBAND (1 OF 2)20%1.0UF
X5R6.3V
0201-1
6.3VX5R
1.0UF20%
0201-1
20%6.3VX5R
1.0UF
0201-1X5R
20%6.3V
1.0UF
0201-1
20%
X5R6.3V
1.0UF
0201-1
6.3V20%1.0UF
X5R0201-1
6.3VX5R
20%1.0UF
0201-1X5R
20%6.3V
1.0UF
0201-1
20%
X5R6.3V
1.0UF
0201-1
1.0UF6.3VX5R
20%
0201-1
X5R6.3V
1.0UF20%
0201-1 X5R
1.0UF6.3V20%
0201-1
1.0UF
X5R
20%6.3V
0201-1
X5R
20%6.3V
1.0UF
0201-1X5R6.3V
1.0UF20%
0201-1
20%
X5R6.3V
1.0UF
0201-1
6.3VX5R
20%1.0UF
0201-1
6.3V20%
X5R
1.0UF
0201-1
1.0UF20%6.3VX5R0201-1
20%1.0UF
X5R6.3V
0201-1
1.0UF20%
X5R6.3V
0201-1
1.0UF20%6.3VX5R0201-1
1.0UF
X5R
20%6.3V
0201-1
20%6.3VX5R
1.0UF
0201-1
20%6.3VX5R
1.0UF
0201-1
0.1UF
01005NOSTUFF
X5R4V20%
MF1/32W1%
240
01005
240
1%
01005
1/32WMF
6.3V
1.0UF20%
X5R0201-1
470K5%1/32WMF01005
2001%1/32WMF01005
MDM9615MBGA
MDM9615MBGA
BGAMDM9615M
MDM9615MBGA
CELLULAR BASEBAND: (1 OF 2)
BB_JTAG_TCKBB_JTAG_RTCLK
19P2M_MDM
90_BB_USB_D_N
BB_USB_VBUS
BB_JTAG_TDI
50_HSIC_CAL
RREFEXT
90_BB_USB_D_P
BB_JTAG_TDO
PMIC_RESOUT_L
BB_JTAG_TRST_L50_HSIC_BB_DATA50_HSIC_BB_STROBE
DEBUG_RST_LSLEEP_CLK_32K
PMIC_SSBI
EBI1_CAL
PP_LDO11_MDSP_FW_1V05
PP_LDO3_AMUX_1V8
PP_LDO13_VDDPX_2V95
VDDPX_BIAS
PP_LDO4_VDDA_3V3
PP_LVS1
PP_LDO8_VDDPX_1V2PP_SMPS3_MSME_1V8PP_LDO6_RUIM_1V8
PP_SMPS3_MSME_1V8
PP_LDO9_PLL_1V05
PP_SMPS3_MSME_1V8
PP_LDO9_PLL_1V05
PP_LDO12_MDSP_SW_1V05
PP_SMPS3_MSME_1V8PP_SMPS1_MSMC_1V05
PP_LDO10_ADSP_1V05
PP_LDO7_DAC_1V8
19P2M_CLK_EN
BB_JTAG_TMS
PP_LDO2_XO_HS_1V8
PP_SMPS1_MSMC_1V05
PP_LDO10_ADSP_1V05
PP_SMPS3_MSME_1V8 PP_SMPS3_MSME_1V8
PP_SMPS1_MSMC_1V05
PP_SMPS3_MSME_1V8
PP_SMPS2_RF1_1V3
PP_LDO12_MDSP_SW_1V05
PP_LDO11_MDSP_FW_1V05PP_LDO9_PLL_1V05
051-9584
2.0.0
5 OF 23
28 OF 46
26 28
25 26 28 29 31 25 26 28 29 31 26 28
26 28 26 28
25 26 28 29 31
26 28
25 26 28 25 26 28 29 31
26 28
26 28
26
27
25 27
25 23
25 23
25 23
25 23
25 27
25
25 23
25 23
25 23
27
25
25 23
26 28
26 27
26 28
26
25 26
26
25 26 28 29 31
25 23
25 23
25 27
25 27
2
1 C15_RF
2
1 C18_RF
2
1 C20_RF
2
1 C23_RF
2
1 C26_RF
2
1 C16_RF
2
1 C24_RF
2
1 C19_RF
2
1 C21_RF
2
1 C27_RF
2
1 C30_RF
2
1 C34_RF
2
1 C35_RF
2
1 C14_RF
2
1 C17_RF
2
1 C22_RF
2
1 C25_RF
2
1 C28_RF
2
1 C29_RF
2
1 C68_RF
2
1 C70_RF
2
1 C69_RF
25 26 28
26
2
1 C33_RF
2
1 C32_RF
2
1 C36_RF
25 26
26
25 26 28 29 31
26 31
2
1 C31_RF
1 2
R9_RF
1 2
R10_RF
25 26 28 29 31
25 26 28
2
1 C71_RF
1
2
R6_RF
1
2
R7_RF
F20
N17N16N15
T19
F13
J8
AA15AA7W9
AA11AA18
U6U7
C5C6E6E7F5
F12
F14
F8F9
G12G9
H12H9
J12J13
J9
K12K13
K8K9
L12L13
L8L9
M12M13
M8M9
N12N13
N8N9
P12P9
R12R9
T8T9
AA20B19
M20
T15T16T17U14U15U16U17U19
N19P15P16P17P19
C17C18E17F17
G13G14
G7G8
H13H14
H7H8
P13P14
P7P8
R13R14
R7R8
A14A19F21M1M21
A15G1G21L1U1W19
K17L17
A11
A2A3A7
B13
E10E12
E16
K21
W12
U1_RF
T11T7
L16K16
U2V19
A21AA1
L15
M15M16
R16R15
N14P6
P11
F7F6
U13
AA21
B11B14B15
B2B7
C19
F10F15F16F19
G10G11G15G16G17
G2
G20
G6
H10H11H15H16
H6
J10J11J14J15
J6J7
K10K11K14K15K20
K6K7
L10L11L14
L2L6L7
M10M11
M14
M17M19
M6M7
N10N11
N6N7
P10
R10R11
R17R19
R6
T10T12T13T14
F11J16
T6
U12U9
W14W7
Y11Y15Y18
Y7
W13
U1_RF
J20J19
H21H19
E21
C21
C20E20
G19H20J21
D21
D19
E19D20
U1_RF
Y3Y2
Y19W20
V20U21
N21N20
L21
L20L19
K19
E11
C12
C10B12
AA2
A8
A12
E9C9
B9
B10A10
E8C8
W4
C11
A9
AA3
Y20
AA4
U20
C7B8
Y4AA19
Y21
U1_RF
IN
IN
OUT
IN
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
OUT
BI
IN
BI
OUT
OUT
BI
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
OUT
ALIAS
ALIAS
IN
IN
OUT
OUT
GND
VCC
SI/SIO0
WP*/SIO2
SCLK
CS*
NC/SIO3NC
SO/SIO1
IN
OUT
BI
IN
OUT
OUT
OUT
IN
IN
BBRX_QP_CH1
BBRX_QP_CH0
TX_DAC0_QP
BBRX_IP_CH1
BBRX_IM_CH0
TX_DAC0_IREF
DAC0_VREF
GNSS_BB_QP
GNSS_BB_IP
BBRX_IP_CH0
GNSS_BB_QM
GNSS_BB_IM
BBRX_QM_CH1
BBRX_QM_CH0
TX_DAC0_IMBBRX_IM_CH1
TX_DAC1_IPTX_DAC1_IM
DNC
BBRX_QP_CH2BBRX_QM_CH2
BBRX_IM_CH2
TX_DAC0_QM
TX_DAC0_IP
TX_DAC1_QMTX_DAC1_QP
BBRX_IP_CH2
ANALOG(4 OF 6)
(3 OF 6)GPIO
GPIO_9GPIO_8
GPIO_20
GPIO_15
GPIO_23
GPIO_7
GPIO_2GPIO_1
GPIO_85
GPIO_17
GPIO_24
GPIO_18
GPIO_22GPIO_21
GPIO_5GPIO_6
GPIO_3
GPIO_0
GPIO_84
GPIO_13GPIO_12
GPIO_16
GPIO_19
GPIO_86GPIO_87
GPIO_4
GPIO_80
GPIO_82GPIO_83
GPIO_81
GPIO_11GPIO_10
GPIO_14
GPIO_78GPIO_79
GPIO_70
GPIO_77
GPIO_69
GPIO_71
GPIO_66GPIO_67GPIO_68
GPIO_64GPIO_65
GPIO_62
GPIO_60
GPIO_63
GPIO_61
GPIO_56
GPIO_59GPIO_58GPIO_57
GPIO_53
GPIO_55
GPIO_49
GPIO_52
GPIO_54
GPIO_50GPIO_51
GPIO_47GPIO_46
GPIO_43
GPIO_48
GPIO_27
GPIO_25
GPIO_44
GPIO_42
GPIO_45
GPIO_41
GPIO_28
GPIO_26
GPIO_39GPIO_38
GPIO_36
GPIO_40
GPIO_29GPIO_30
GPIO_35
GPIO_37
GPIO_34
GPIO_31
GPIO_33GPIO_32
GPIO_72
GPIO_75GPIO_74GPIO_73
GPIO_76
IN
IN
IN
IN
IN
IN
IN
OUT
IN
OUT
OUT
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
OUT
OUT
OUT
OUT
OUT
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
BASEBAND (2 OF 2)
GSM_PA_HB_EN
NC
NC
GRFC_27,SW
GRFC_1,PA_ONGRFC_0,PA_ON
NC, WTR_GP_DATA2
NC
LAT_SW3_CTLNC, SECOND TRANSCEIVER RF_ON CONTROL
GRFC_24,SW
NC
BOOT_CONFIG_0
NC
GRFC_33
NC
BOOT_CONFIG_2BOOT_CONFIG_3
GRFC_25,SW BOOT_CONFIG_1
GRFC_14
NC
NC
NCNC
NC
NC
NCNC
NC
NCNCNCNC
NCNC
NC
NC
GRFC_21
GRFC_10
NC
NC
GRFC_13
GRFC_26,SW
GRFC_7,PA_ON
GRFC_9,SW
GRFC_4,PA_ON
NC
GRFC_39GRFC_38GRFC_37GRFC_36
GRFC_35,SW
BOOT_CONFIG_6
GRFC_28,SWGRFC_29,SWGRFC_30,SW
GRFC_31
GRFC_3,PA_ON
GRFC_15
GRFC_11
GRFC_8,PA_ON
PA_R0
GRFC_5,PA_ONGRFC_6,PA_ON
GRFC_2,PA_ON
NC
GRFC_22GRFC_23
GRFC_34
GRFC_32
NC
BOOT_CONFIG_4BOOT_CONFIG_5
NC, ELNA CONTROL
NC, APT_BYPASS
GRFC_18,SWGRFC_19,SW
GRFC_20
GSM_PA_LB_EN
NC
I2C_SDAI2C_SCL
0.1UF4VX5R
20%
01005
X5R
20%0.1UF4V
01005
SERIAL-SPI-2MX8-1.8VWLCSP
MX25U1635EBAI-10G
70-OHM-300MA
01005-1
MDM9615MBGA
MDM9615MBGA01005
100K1%1/32WMF
CELLULAR BASEBAND: (2 OF 2)
OSCAR_CONTEXT_AAP_WAKE_MODEM
PP_SMPS3_MSME_1V8
SIM_TRAY_DETECT
PRX_BB_I_P
PRX_BB_Q_PPRX_BB_Q_N
PRX_BB_I_N
WTR_GP_DATA0 GPHGPHWTR_GP_DATA1
PA_ON_B2_B3PA_ON_B1_B4
WTR_RX_ON
SPI_CS_LSPI_CLK
BB_I2S_CLK
BB_UART_TXD
BB_I2S_TXD
BB_SPI_TO_PAC_DATA_MOSI
SIMCRD_CLK_CONNSIMCRD_RST_CONN
PP_SYNC
BB_I2S_MCLK
BB_I2S_RXDBB_I2S_WS
BB_SPI_TO_PAC_CSPAC_TO_BB_SPI_DATA_MISO
SIMCRD_IO_CONN
BB_UART_CTS_LBB_UART_RTS_L
GPIO_DEBUG_LED
HOST_WAKE_BBPM_USR_IRQ_L
BB_SPI_TO_PAC_CLK
AP_HSIC1_RDY
RESET_DET_LPS_HOLD
PM_MDM_IRQ_L
SPI_DATA_MOSISPI_DATA_MISO
BB_UART_RXD
OSCAR_CONTEXT_B
PBL_RUN_BB_HSIC1_RDY
WTR_SSBI_PRX_DRX
WLAN_TX_BLANK
BB_IPC_GPIO
WTR_SSBI_TX_GPS
LTE_COEX_TXDLTE_ACTIVEBB_HSIC1_REMOTE_WAKE
BB_PDMLTE_COEX_RXD
DCDC_ENDCDC_MODE
LAT_SW2_CTL2G_FEM_S32G_FEM_S2
2G_FEM_S4
2G_FEM_S0
TX_GTR_THRESH
2G_FEM_S5
2G_FEM_S1
GPIO_51
2G_FEM_S6LAT_SW1_CTL
BB_I2S2_RXD
BB_I2S2_CLK
PA_R1
WTR_RF_ON
BB_I2S2_WS
PA_BSPA_ON_B13_B17
PA_ON_B5_B8PA_ON_B20
BB_ERROR_FLAG
WTR_BB_TX_DAC_IREF
VREF_DAC_BIAS
PP_SPI_NOR_1V8PP_SMPS3_MSME_1V8
SPI_CLK
SPI_CS_L
SPI_DATA_MISO LTE_COEX_RXDLTE_COEX_TXDLTE_FRAME_SYNC
LTE_WLAN_PRIORITYSPI_DATA_MOSI
DRX_BB_I_PDRX_BB_I_NDRX_BB_Q_P
TX_BB_I_PTX_BB_I_NTX_BB_Q_PTX_BB_Q_NDRX_BB_Q_N
GPS_BB_I_PGPS_BB_I_NGPS_BB_Q_PGPS_BB_Q_N
051-9584
2.0.0
6 OF 23
29 OF 46
29
2
1 C61_RF25 23
25 23
25 23
25 23
25 23
29
25 23
39
29
2
1 C62_RF
25
25 30
27
27
39
25 23
34 35 36 37 38
25 23
25 23
25 23
25 23
29
25 30
25 23
25 23
25 30
43 23 25
43 23 25
43 23 25
27
30
25 23
25
25 23
46
30
29 46
25 29 46
46
39
30
25 23
33 40 41
33 40 41
40
38
34
30
25 30
36
34 35 37 38
37
35
30
25 23
25 23
25
29 46
30
25 29 46
25
E3
B2
E2
D3
D2A4
B3
C2F1F4
C3
U6_RF
25 26 28 29 31
43 23 25
25 23
25 46
25
25
25
30
25
21
FL4_RF
Y9
Y8
Y5
Y10
W8
W6
W5
W11
W10
U8
U11
U10
AA9
AA8
AA6AA10
Y14AA14
Y17
V21
H17
AA17AA16AA12
W15W16
W18
AA5
Y6
AA13Y13
W21Y12Y16
J17
W17
U1_RF
A13A16
A17
A18
A20
A4
A5A6
B1
B16
B17
B18
B20B21
B3B4
B5
B6
C1
C13C14
C15
C16
C2C3
C4
D1
D2D3
E1
E13E14
E15
E2E3
F1
F2
F3
G3
G5H1H2
H3H5
J1
J2
J3
J5
K1
K2K3K5
L3
L5
M2
M3
M5
N1N2
N3N5
P1
P2
P20
P21
P3
P5
R1
R2
R20
R21
R3R5
T1
T2
T20T21
T3
T5
U3
U5
V1V2
V3
W1W2W3
Y1
U1_RF1
2
R4_RF
25 46
30
30
30
30
30
30
29
29
29
29
25
25
25
30
30
30
30
30
30
25 40
25 40 41
40 41
27
33 40
2 3 5 6 8
IN
IN
IN
IN
PRX_LB1_INPPRX_LB1_INM
PRX_LB2_INM
PRX_LB3_INPPRX_LB3_INM
PRX_MB1_INP
PRX_BB_IP
PRX_BB_QP
PRX_BB_IM
DNC
PRX_BB_QM
PRX_HB_INM
PRX_MB3_INM
PRX_HB_INP
PRX_MB3_INP
PRX_MB2_INMPRX_MB2_INP
PRX_MB1_INM
PRX_LB2_INP
SYM 3 OF 5PRX
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
GNDGNDGND
GND
GND
GNDGNDGND
GND
GNDGND
GND
GNDGND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GNDGND
GNDGND
GNDGNDGNDGND
GND
GND
GNDGNDGNDGND
GNDGNDGNDGND
GND
GND
GND
GNDGND
SYM 5 OF 5GND
IN
BI
BI
IN
GP_DATA0GP_DATA1GP_DATA2DNCDNC
XO_IN
SSBI_TX_GNSSSSBI_PRX_DRX
RF_ONRX_ON
RBIAS
VTUNE_PRX
PDET_IN
DNC
TX_HB
TX_MB4TX_MB3TX_MB2TX_MB1
TX_BB_IMTX_BB_IP
TX_LB4
TX_LB2TX_LB3
TX_LB1
GND
DNC
DAC_REF
TX_BB_QMTX_BB_QP
SYM 2 OF 5TX
OUT
OUT
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
DRX_LB1_INMDRX_LB1_INP
GNSS_INMGNSS_INP
DRX_HB_INMDRX_HB_INP
DRX_MB_INMDRX_MB_INP
DRX_LB2_INMDRX_LB2_INP
DRX_BB_IMDRX_BB_IP
DRX_BB_QMDRX_BB_QP
GNSS_BB_QP
GND
GNSS_BB_QM
GNSS_BB_IPGNSS_BB_IM
DRX_GPSSYM 1 OF 5
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
7 DB ATTENUATOR
FOR SELF CAL
TRANSCEIVER PHASE CONTROL, TX RF & IQ PORTS
NC
TRANSCEIVER GROUND CONNECTIONS
NC
NC
NC
WTR_VTUNE
PRX TRANSCEIVER RF AND IQ PORTS
RF TRANSCEIVER (1 OF 4)
DC-BLOCK NEEDED
NC
DRX TRANSCEIVER RF AND IQ PORTS
NC
WTR_GP_DATA2, NC
01005NP0-C0G
5%16V
100PF
5%16VCERM
NOSTUFF
10PF
01005
1/32WMF01005
1301%
5%
NP0-C0G16V
56PF
01005
SMWTR1605
SMWTR1605
SMWTR1605
WTR1605SM
1/32WMF
1%
4.75K
01005
MF1/32W
01005
1301%
MF1/32W
01005
47
5%
CELLULAR RF TRANSCEIVER: (1 OF 2)
50_XCVR_B1_TX
100_XCVR_B3_PRX_N
50_XCVR_B5_B18_TX
PRX_BB_I_N100_XCVR_B13_B17_B20_PRX_N
DRX_BB_I_P
DRX_BB_Q_N
PRX_BB_I_P
DRX_BB_I_N
DRX_BB_Q_P
100_XCVR_B8_B20_DRX_P
GPS_BB_Q_NGPS_BB_Q_P
GPS_BB_I_NGPS_BB_I_P
PRX_BB_Q_P
100_XCVR_B8_B20_DRX_N
19P2M_WTR_IN19P2M_WTR
50_PDET_PAD_OUT 50_PDET_PAD_IN
100_XCVR_B2_B25_B3_DRX_P
100_XCVR_GPS_RX_P
100_XCVR_B1_B4_DRX_N100_XCVR_B1_B4_DRX_P
100_XCVR_B2_B25_B3_DRX_N
100_XCVR_B5_B18_B13_B17_DRX_N100_XCVR_B5_B18_B13_B17_DRX_P
100_XCVR_GPS_RX_N
100_XCVR_B8_PRX_N100_XCVR_B8_PRX_P
WTR_RF_ONWTR_SSBI_TX_GPSWTR_SSBI_PRX_DRX
WTR_RBIAS
100_XCVR_B1_B4_PRX_P
100_XCVR_B2_B25_PRX_P100_XCVR_B2_B25_PRX_N
100_XCVR_B3_PRX_P
100_XCVR_DCS_PCS_PRX_N100_XCVR_DCS_PCS_PRX_P
100_XCVR_B5_B18_PRX_P 50_XCVR_2G_HB_TX50_XCVR_B2_B25_TX
50_XCVR_B13_B17_B20_TX
50_XCVR_B8_TX50_XCVR_2G_LB_TX
WTR_RX_ON
50_XCVR_B3_B4_TX
50_PDET_IN
100_XCVR_B13_B17_B20_PRX_P
100_XCVR_B5_B18_PRX_N
100_XCVR_B1_B4_PRX_N
PRX_BB_Q_N
WTR_BB_TX_DAC_IREF
TX_BB_I_N
TX_BB_Q_PTX_BB_Q_N
TX_BB_I_P
GPHWTR_GP_DATA1GPHWTR_GP_DATA0
051-9584
2.0.0
7 OF 23
30 OF 46
41
33
33
27 1 2
C128_RF
2
1 C182_RF
1
2
R30_RF
1 2
C248_RF
7869
54
4843
36
84
91
92
86
82
15
16
7
8
1723
30
61
U3_RF
32
32
32
41
32
32
32
32
32
29
29
29
29
41
29
29
29
29
212033
75
9
493219
113
128104
107
135106
137122
94115
102
12999
110123
125124
5239
68477746
142
35
81643473
59745841
38
6
27
2922
U3_RF
41
25 29
25 29
25 29
1051218811496
120
8980
10045
60
79
101
93
103
95112119126
138130
133
132141
140
134
90
109
139131
U3_RF
29
29
41
29
29
25 29
29
41
29
29
29
29
29
29
145
1810
112
123
134
7263
5750
70
1
71
5662
U3_RF
32
32
40
32
33
40
33
33
33
33
1 2
R27_RF
1
2
R28_RF
1 2
R29_RF
40
41
41
41
41
32
32
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
VDD_RF1_P_FELOVDD_RF1_P_FELOVDD_RF1_D_LBLOVDD_RF1_D_FE
VDD_RF2_P_BB
VDD_DIO
VDD_RF1_T_SYN
VDD_RF2_T_VCOVDD_RF2_XO
VDD_RF1_T_LOVDD_RF2_T_BB
VDD_RF1_T_DAVDD_RF1_T_UPC
VDD_RF2_T_DA
VDD_RF2_D_BB
VDD_RF1_S_PLLVDD_RF1_S_VCO
VDD_RF1_P_VCOVDD_RF1_P_PLLVDD_RF2_S_VCO
VDD_RF2_P_VCO
VDD_RF1_G_BBVDD_RF1_G_PLLVDD_RF1_G_VCOVDD_RF1_G_LNA
VDD_RF2_T_PLL
VDD_RF1_D_MBLOVDD_RF1_JDET
SRM 4 OF 5PWR
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY ITCONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
PLACE NEAR U3.65
RF2_2V05STAR ROUTING
PLACE NEAR U3.76
PLACE NEAR U3.66
RF1_1V8
STAR ROUTING
PLACE NEAR U3.87
STAR ROUTING
PLACE NEAR U3.37 AND U3.55
PLACE NEAR U3.25 AND U3.28
STAR ROUTING
PLACE NEAR U3.53 AND U3.26
PLACE NEAR U3.42
STAR ROUTING
PLACE NEAR U3.98
PLACE NEAR U3.118
TRANSCEIVER POWER CONNECTIONS
PLACE NEAR U3.111
PLACE NEAR U3.67
PLACE NEAR U3.51
STAR ROUTING
STAR ROUTING
PLACE NEAR U3.127
PLACE NEAR U3.136
STAR ROUTING
STAR ROUTING
STAR ROUTINGSTAR ROUTING
RF1_1V3
STAR ROUTING
PLACE NEAR U3.117
PLACE NEAR U3.116
RF TRANSCEIVER (2 OF 2)
PLACE NEAR U3.40
PLACE NEAR U3.24 AND U3.31
RF1_1V3
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM
NOSTUFF
01005
0.1UF
20%6.3VX5R-CERM01005
0.1UF
20%6.3VX5R-CERM
0.1UF
01005
16V5%
01005NP0-C0G
100PF
20%6.3VX5R-CERM01005
0.1UF
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM01005
0.1UF
20%6.3VX5R-CERM01005
0.1UF
20%6.3VX5R-CERM01005
0.1UF
20%10UF6.3V
0402CERM
20%1.0UF
0201-1
6.3VX5R
20%10UF6.3V
0402CERM
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM
0.1UF
01005
20%6.3VX5R-CERM01005
0.1UF
20%6.3VX5R-CERM
0.1UF
01005
100PF16V5%
01005NP0-C0G
MF1/20W
201
5%
0
5%
0
201
1/20WMF
SMWTR1605
CELLULAR RF TRANSCEIVER: (2 OF 2)
PP_RF1_1V8_DIGPP_SMPS3_MSME_1V8
PP_SMPS4_RF2_2V05PP_SMPS2_RF1_1V3
PP_RF2_2V05_TX_PLL
PP_RF1_1V3_GPS_LNAPP_RF1_1V3_GPS_VCO
PP_RF1_1V3_GPS_PLLPP_RF1_1V3_GPS_DIG
PP_RF2_2V05_PRX_VCO
PP_RF2_2V05_SHDR_VCO
PP_RF1_1V3_PRX_PLL
PP_RF1_1V3_PRX_VCO
PP_RF1_1V3_SHDR_VCOPP_RF1_1V3_SHDR_PLL
PP_RF2_2V05_DRX_BB
PP_RF2_2V05_TX_DA
PP_RF1_1V3_TX_UPCONVERTER
PP_RF1_1V3_TX_DA
PP_RF2_2V05_TX_BBPP_RF1_1V3_TX_LO
PP_RF2_2V05_XO_FILTPP_RF2_2V05_TX_VCO
PP_RF1_1V3_TX_SYNTH
PP_RF1_1V8_DIG
PP_RF1_1V3_PRX_FELO1PP_RF1_1V3_PRX_FELO2
PP_RF1_1V3_DRX_FE
PP_RF1_1V3_JAM_DET
PP_RF2_2V05_PRX_BB
PP_RF1_1V3_DRX_LBLO
PP_RF1_1V3_DRX_MBLO
PP_RF2_2V05_XO_FILT
PP_RF2_2V05_TX_PLL
PP_RF2_2V05_TX_VCO
PP_RF2_2V05_SHDR_VCO
PP_RF2_2V05_PRX_VCO
PP_RF2_2V05_TX_BB
PP_RF2_2V05_PRX_BB
PP_RF2_2V05_TX_DA
PP_RF2_2V05_DRX_BBPP_SMPS4_RF2_2V05_FILTPP_RF1_1V3_GPS_LNA
PP_RF1_1V3_GPS_DIG
PP_RF1_1V3_GPS_PLL
PP_SMPS2_RF1_1V3_FILTPP_RF1_1V3_PRX_PLL
PP_RF1_1V3_SHDR_PLL
PP_RF1_1V3_PRX_VCO
PP_RF1_1V3_SHDR_VCO
PP_RF1_1V3_TX_DA
PP_RF1_1V3_TX_LO
PP_RF1_1V3_TX_UPCONVERTER
PP_RF1_1V3_PRX_FELO1
PP_RF1_1V3_DRX_FE
PP_RF1_1V3_PRX_FELO2
PP_RF1_1V3_DRX_LBLO
PP_RF1_1V3_DRX_MBLO
PP_RF1_1V3_JAM_DET
PP_SMPS2_RF1_1V3_FILT
PP_RF1_1V3_TX_SYNTH
PP_RF1_1V3_GPS_VCO
051-9584
2.0.0
8 OF 23
31 OF 46
2
1 C73_RF
2
1 C74_RF
2
1 C75_RF
2
1 C76_RF
2
1 C77_RF
2
1 C78_RF
2
1 C79_RF
2
1 C80_RF
2
1 C81_RF
2
1 C82_RF
2
1 C83_RF
2
1 C85_RF
2
1 C86_RF
2
1 C88_RF
2
1 C87_RF
2
1 C72_RF
2
1 C89_RF
2
1 C90_RF
2
1 C91_RF
2
1 C92_RF
2
1 C244_RF
1 2
R53_RF1 2
R19_RF
53422826
83
87
98
136127
116108
118117
111
44
6540
766651
67
31553724
97
2585
U3_RF
8 2 3 5 6
3 3 5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8 8
8
8
8 8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUTIN
OUTIN
OUTIN
OUT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
RX MATCHING NETWORKS
TRANSCEIVER TX AND RX MATCHINGTX MATCHING NETWORKS
8.2NH-5%-0.34A-0.27OHM0201DS
01005
5%16V
NP0-C0G
27PF
0201DS6.7NH-5%-0.46A-0.15OHM
0.6PF
01005NP0-C0G
+/-0.1PF16V
1.2PF
NP0-C0G16V+/-0.1PF
01005
01005
27PF
5%16V
NP0-C0G 020118NH+/-3%-0.2A-0.8OHM
020122NH-150MA
10NH-3%-250MA
0201
0201
10NH-3%-250MA
02013.1NH+/-0.1NH-0.45A-025OHM
0.6NH+/-0.1NH-0.85A
0201
0.7PF
NP0-C0G16V
01005
+/-0.1PF
0.00
01005
0%
MF1/32W
0.00
0%1/32WMF
01005
MF1/32W0%
0.00
01005
0.6NH+/-0.1NH-0.85A
0201
0201
10NH-3%-250MA
0201
10NH-3%-250MA
02015.1NH-3%-0.35A
1.1PF+/-0.1PF
01005NP0-C0G16V
5.1NH-3%-0.35A0201
CELLULAR FRONT END: TX AND RX MATCHING
50_B2_RX_BALUN
50_B2_DUPLX_RX
100_XCVR_B2_B25_PRX_P
100_B8_DUPLX_RX_N 100_XCVR_B8_PRX_N
100_B8_DUPLX_RX_P 100_XCVR_B8_PRX_P
100_B5_B18_DUPLX_RX_P 100_XCVR_B5_B18_PRX_P
100_XCVR_B5_B18_PRX_N
100_XCVR_B1_B4_PRX_P
100_XCVR_B1_B4_PRX_N
50_B1_TX_SAW_IN
50_B2_B25_TX_SAW_IN
50_B3_B4_TX_SAW_IN50_XCVR_B3_B4_TX
50_XCVR_B1_TX
50_XCVR_B2_B25_TX
100_XCVR_B2_B25_PRX_N
50_B3_RX_BALUN
50_B3_DUPLX_RX 100_XCVR_B3_PRX_N
100_XCVR_B3_PRX_P
100_B1_B4_DUPLX_RX_P
100_B1_B4_DUPLX_RX_N
100_B5_B18_DUPLX_RX_N
051-9584
2.0.0
9 OF 23
32 OF 46
1
2
L36_RF
1 2
C186_RF
1
2
L38_RF
1 2
C185_RF
2
1 C184_RF
1 2
C188_RF
30
30
30
37
1
2
L46_RF
35
37
37
37
34
34
1
2
L45_RF
L51_RF
35
L49_RF
1
2
L44_RF
L47_RF
30
30
30
30
30
30
1 2
C187_RF
33 1 2
R46_RF30
33 1 2
R47_RF30
33 1 2
R48_RF30
30
21
L48_RF
21
L50_RF
21
L52_RF
2
1
L37_RF
2
1 C183_RF
2
1
L39_RF
IN
IN
INB13_17_20_RXOUT1
B13_17_20_RXOUT0
B17_RXIN
V1
BAND4TXOUT
B3TXOUT
B25TXOUT
BAND1TXOUT
V3
THRM
B1TXIN
B3/4_TXIN
B13_RXINB13_RXIN
B20_RXINB20_RXIN
B17_RXIN
GND
VDD V2
B25_TXIN
PAD
IN
IN
IN
B13/17/20_TX_IN
GND
B13_TX_OUT
B5/18/BC10_TX_OUT
B8_TX_IN
B20_TX_OUT
B17_TX_OUT
B8_TX_OUT
B5/18/BC10_TX_IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
UNBAL_PORT_1960MHZ
UNBAL_PORT_1842.5MHZ
BAL_PORT_1842.5MHZ/1960MHZ
BAL_PORT_1842.5MHZ/1960MHZ
GND
IN
OUT
OUT
IN
IN
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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8 7 6 5 4 3
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B
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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IV ALL RIGHTS RESERVED
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
B13/B17/B20 DP6T SWITCH AND MATCHING
BAND S6 S3 S2
B17 RX X HIGH LOW
B3 TX HIGH X XB4 TX LOW X X
HB TX SAW BANK +
B13 RX X HIGH HIGH
SAW BANKS
B20 RX X LOW HIGH
LB TX SAW BANK
DCS/PCS 2-IN-1 RX FILTER
HFQSMXXFALGA
2.5NH+/-0.1NH-500MA
0201
1.3PF
C0G-CERM25V+/-0.05PF
0201
2.5NH+/-0.1NH-500MA
0201
1.4PF
0201
+/-0.05PF25VC0G-CERM
LMTPFJGA-E50LGA
4.3NH-3%-0.35A0201
1.1NH+/-0.1NH
0201
1.1NH+/-0.1NH
0201
FILTERSAWFD1G84BU0F57
LGA-1
CELLULAR FRONT END: SAW BANKS
100_XCVR_DCS_PCS_PRX_P
50_PCS_RX
50_DCS_RX_MATCH
100_B17_DUPLX_RX_P
2G_FEM_S2
2G_FEM_S6
50_B1_TX_SAW_IN
50_B3_B4_TX_SAW_IN
100_B13_DUPLX_RX_N100_B13_DUPLX_RX_P
100_B20_DUPLX_RX_N100_B20_DUPLX_RX_P
100_B17_DUPLX_RX_N
PP_LDO14_2V65
2G_FEM_S3
50_B2_B25_TX_SAW_IN
50_B4_TX_SAW_OUT
50_B1_TX_SAW_OUT
100_XCVR_B13_B17_B20_PRX_P100_XCVR_B13_B17_B20_PRX_N
50_B3_TX_SAW_OUT
50_B2_TX_SAW_OUT
50_XCVR_B5_B18_TX
50_B8_TX_SAW_OUT
50_B17_TX_SAW_OUT
50_B20_TX_SAW_OUT
50_XCVR_B8_TX
50_B5_TX_SAW_OUT
50_B13_TX_SAW_OUT50_XCVR_B13_B17_B20_TX
50_DCS_RX
100_DCS_PCS_RX_FILTER_N
100_XCVR_DCS_PCS_PRX_N
100_DCS_PCS_RX_FILTER_P
50_PCS_RX_MATCH
051-9584
2.0.0
10 OF 23
33 OF 46
38
38
38
2
1
17
7
13
12
11
14
9
2221
3
4
1516
2019
18
10
6 8
23
5
U9_RF
40
40
38
21
L64_RF
2
1 C245_RF
21
L65_RF
2
1 C246_RF
3
131264 5
9
11
2
7
8
10
1
FL2_RF
1
2
L53_RF
21
L54_RF
21
L55_RF
36
36
34
35
35
34
30
30
43 23 25 26 40 41
29 40
29 40 41
30
30
30
37
37
38
38
36
29 40 41
1
4
6
9
1087532
FL6_RF
32
30
30
32
32
IN
OUT
OUT
IN
IN
IN
IN
BI
IN
IN
ANT_B1_B4
CPL_OUT
THRM_PADGND
RX_N_B1_B4RX_P_B1_B4
RFIN_B4RFIN_B1
VBATT
VCC
VEN_B1_B4
CPL_IN
BS
VMODE
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
BAND 1/4 PAT
STANDBY X X 0 X
B1 LPM 1 1 1B1 HPM 1 1 0 B4 LPM 0 1 1 B4 HPM 0 1 0
POWER DOWN X 0 0 0 ============================================================BAND PA POWER MODE PA_BS PA_ON_B1_B4 PA_R1
NOSTUFF01005
1.2PF+/-0.1PF16VNP0-C0G
NP0-C0G25V5%27PF
201NOSTUFF
16V5%
56PF
01005NP0-C0G
01005
5%16V
NP0-C0G
56PF
01005
20%0.1UF6.3VX5R-CERM
01005
10%
X5R-CERM6.3V
1000PF20%6.3V
1.0UF
X5R0201-1
5%25V
201NP0-C0G
27PF
NOSTUFF
LGATRIPLEXER-BAND1-4
5%
01005
16VNP0-C0G
56PF
01005
56PF5%16VNP0-C0G
56PF5%16V
01005NP0-C0G
25V+/-0.05PF
0201COG-CERM
0.5PF
0201
1.2NH+/-0.1NH-0.75A
NOSTUFF01005
1.2PF16VNP0-C0G
+/-0.1PF
NOSTUFF01005
16VNP0-C0G
+/-0.1PF1.2PF
CELLULAR FRONT END: BAND 1/4 PAT
50_B1_B4_DPLX_ANT
50_B1_TX_SAW_OUT
50_B1_TX_PAD_IN50_B1_B4_ANT
100_B1_B4_DUPLX_RX_N
50_B4_TX_SAW_OUT
50_B4_TX_PAD_IN
PA_BS
PP_BATT_VCC_CONN
PA_R1
100_B1_B4_DUPLX_RX_P
PA_ON_B1_B4
PP_PA
051-9584
2.0.0
11 OF 23
34 OF 46
33
32
32
33
29 35 36 37 38
29
29 35 37 38
2
1 C163_RF
40
2
1 C167_RF1 2
C192_RF
1 2
C191_RF
40 23 25 26 35 36 37 38 39
35 36 37 38 39 40
2
1 C164_RF
2
1 C208_RF
2
1 C165_RF
2
1 C209_RF
16
20
333231
3534
36
3837
41
3940
42
19181 2 653
107
111213141517
23
8
21
9
2628
29
22
24
27
4
25
30
U14_RF
2
1 C236_RF
2
1 C237_RF
2
1 C238_RF
2
1 C249_RF
21
L70_RF2
1 C258_RF
2
1 C162_RF
BI
BI
IN
IN
ININ
IN
IN
IN
OUT
OUT
VEN_B2_B3
CPL_OUT
THRM_PADGNDGNDRX_B2
GNDRX_B3
RFIN_B2RFIN_B3
VBATT
VCC
CPL_IN
BS
ANT_B2ANT_B3
VMODE
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
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B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
BAND 2/3 PAD
STANDBY X X 0 XPOWER DOWN X 0 0 0 ============================================================
B3 HPM 0 1 0 B3 LPM 0 1 1 B2 HPM 1 1 0 B2 LPM 1 1 1
BAND PA POWER MODE PA_BS PA_ON_B2_B3 PA_R1
NCNC
X5R6.3V
1.0UF20%
0201-1
6.3V
0.1UF
X5R-CERM
20%
01005
1.2PF
01005NOSTUFF
NP0-C0G16V+/-0.1PF
NOSTUFF01005
1.2PF+/-0.1PF16VNP0-C0G
NP0-C0G25V5%27PF
0201NOSTUFF
NOSTUFF
27PF5%25VNP0-C0G201
NP0-C0G16V5%
01005
56PF
01005
5%16V
NP0-C0G
56PF
201NP0-C0G25V5%27PF
NOSTUFF01005
10%1000PF
X5R-CERM6.3V
DUPLEXER-BAND2-3LGA
0201
1.1PF+/-0.1PF25VCERM
C0G-CERM
+/-0.05PF0.9PF
0201
25V
1.3NH+/-0.1NH-600MA
0201
NOSTUFF01005
+/-0.1PF16VNP0-C0G
1.2PF
2.4NH+/-0.1NH-0.50A
0201
CELLULAR FRONT END: BAND 2/3 PAD
PA_ON_B2_B3
50_B2_DUPLX_RX50_B3_DUPLX_RX
PA_BS
PA_R1
50_B2_ANT
50_B2_TX_SAW_OUT
50_B2_TX_PAD_IN50_B3_TX_PAD_IN
50_B3_TX_SAW_OUT
PP_BATT_VCC_CONN
50_B3_DPLX_ANT 50_B3_ANT
50_B2_DPLX_ANT
PP_PA
051-9584
2.0.0
12 OF 23
35 OF 46
40
40
29 34 36 37 38
29 34 37 38
29
2
1 C149_RF
34 36 37 38 39 40
2
1 C148_RF
40 23 25 26 34 36 37 38 39
2
1 C146_RF
2
1 C147_RF
33
33
32
32
2
1 C152_RF
2
1 C153_RF
1 2
C194_RF
1 2
C193_RF
2
1 C211_RF
2
1 C210_RF
30
20
333231
3534
36
3837
41
3940
42
27231 3 765
129
151718192122
1011
1413
2826
25
2
4
29
816
24
U23_RF
2
1 C250_RF
2
1 C251_RF
21
L72_RF
2
1 C259_RF
21
L71_RF
IN
IN
OUT
IN
IN
IN
BI
OUT
CPL_OUTCPL_IN
THRM_PADGND
VBATT
VCC
VMODE
GND
RFIN_B20RFIN_B7
RX_P_B20RX_N_B20
RX_B7
BS
ANT_B7
VEN_B20_B7
ANT_B20
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
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IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
BAND 20 PAD
STANDBY X 0 X
BAND PA POWER MODE PA_ON_B20 PA_R1
PP_PA BULK BYPASSING SHARED WITH B1/4 PAT
NCNC
POWER DOWN LPM 0 0
B20 HPM 1 0 B20 LPM 1 1
=====================================================
20%6.3V
01005X5R-CERM
0.1UF
NOSTUFF
C0G-CERM0201
+/-0.05PF3.6PF25V
5%
01005NP0-C0G
56PF
16V
LGADUPLEXER-BAND7-20
5%27PF
201
25VNP0-C0G
NOSTUFF
16V+/-0.1PF1.2PF
01005NOSTUFF
NP0-C0G
01005
6.3VX5R-CERM
1000PF10%
01005
56PF
NP0-C0G16V5%
01005
56PF5%
NP0-C0G16V
6.2NH-0.30A
0201
NP0-C0G25V
201
+/-0.1PF2.4PF
01005NOSTUFF
NP0-C0G16V+/-0.1PF1.2PF
CELLULAR FRONT END: BAND 20 PAD
50_B20_DPLX_ANT 50_B20_ANT
PA_ON_B20PP_BATT_VCC_CONNPP_PA
100_B20_DUPLX_RX_P
100_B20_DUPLX_RX_N
PA_R1
50_B20_TX_SAW_OUT
50_B20_TX_PAD_IN
051-9584
2.0.0
13 OF 23
36 OF 46
40 23 25 26 34 35 37 38 39
34 35 37 38 39 40
2
1 C156_RF
33
33
29 34 35 37 38
29
40
33
2
1 C160_RF
1 2
C195_RF
204
333231
3534
36
3837
41
3940
42
27
231 3 765
149
151718192122
25
2 24
10
2628
1213
11
29
8
30
16
U207_RF
2
1 C234_RF
2
1 C154_RF
2
1 C233_RF
2
1 C239_RF
2
1 C240_RF
21
L73_RF
2
1 C39_RF
2
1 C84_RF
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
BI
BI
IN
IN
ANT_B5
RFIN_B8
BS
VEN_B5_B8
CPL_OUTCPL_IN
THRM_PADGND
VBATT
VCC
VMODE
ANT_B8
RX_P_B5RX_N_B5
RX_P_B8RX_N_B8
RFIN_B5
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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8 7 6 5 4 3
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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IV ALL RIGHTS RESERVED
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
NCNC
STANDBY X X 0 XPOWER DOWN X 0 0 0 ============================================================
B5 HPM 0 1 0 B5 LPM 0 1 1 B8 HPM 1 1 0 B8 LPM 1 1 1
BAND PA POWER MODE PA_BS PA_ON_B5_B8 PA_R1
BAND 5/8 PAD
NOSTUFF01005
1.2PF+/-0.1PF16VNP0-C0G
NOSTUFF0201
27PF5%25VNP0-C0G
201
27PF5%25V
NOSTUFF
NP0-C0G
6.3V
0.1UF
X5R-CERM
20%
01005
1.2PF
NOSTUFF01005
+/-0.1PF16VNP0-C0G
01005
10%1000PF
X5R-CERM6.3V
1.0UF20%6.3VX5R0201-1 201
NP0-C0G25V5%27PF
NOSTUFFNP0-C0G16V5%
01005
56PF
01005
5%16VNP0-C0G
56PF 56PF
01005
5%16VNP0-C0G
DUPLEXER-BAND5-8LGA
25V
0201C0G-CERM
4.8PF+/-0.05PF
6.2NH-0.30A
0201
0201
25VC0G-CERM
1.9PF+/-0.05PF
01005
+/-0.1PF16VNP0-C0G
0.7PF
01005
+/-0.1PF
NP0-C0G16V
0.7PF
01005
2.7NH+/-0.1NH-200MA
2.2NH+/-0.1NH-200MA
01005
4.3NH-3%-0.35A
0201
CELLULAR FRONT END: BAND 5/8 PAD
100_B5_B18_DUPLX_RX_P
PP_BATT_VCC_CONN
50_B5_TX_PAD_IN
50_B8_TX_SAW_OUT
50_B8_TX_PAD_IN
50_B5_TX_SAW_OUT
50_B5_DPLX_ANT
PA_ON_B5_B8
PA_R1
100_B5_B18_DUPLX_RX_N
100_B8_DUPLX_RX_P
100_B8_DUPLX_RX_N
50_B5_ANT
PA_BS
50_B8_DPLX_ANT 50_B8_ANT
PP_PA
051-9584
2.0.0
14 OF 23
37 OF 46
33
32
32
32
32
33
29 34 35 36 38
29 34 35 38
29
40
40
2
1 C117_RF
2
1 C123_RF
2
1 C122_RF
40 23 25 26 34 35 36 38 39
34 35 36 38 39 40
2
1 C118_RF
2
1 C116_RF
2
1 C212_RF
2
1 C119_RF
2
1 C213_RF
2
1 C214_RF
2
1 C215_RF
2
1 C216_RF
16
28
2524
204
333231
3534
36
3837
41
3940
42
27
231 3 765
129
151718192122
29
2 30
8
1314
1110
26U58_RF
2
1 C252_RF
21
L74_RF
2
1 C253_RF
2
1 C256_RF
2
1 C257_RF
21
L7_RF
21
L10_RF
21
L75_RF
IN
IN
IN
OUT
OUT
OUT
IN
IN
IN
BI
BI
OUT
VEN_B13_B17BS
RX_P_B17
RX_P_B13
RX_N_B17
RX_N_B13
VMODE
VCC
VBATT
RFIN_B13RFIN_B17
GND THRM_PAD
CPL_INCPL_OUT
ANT_B17ANT_B13
IN
INPUT OUTPUT
GND
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
BAND 13/17 PAD
============================================================POWER DOWN X 0 0 0 STANDBY X X 0 XB17 HPM 0 1 0 B17 LPM 0 1 1 B13 HPM 1 1 0 B13 LPM 1 1 1
BAND PA POWER MODE PA_BS PA_ON_B13_B17 PA_R1
01005
6.3V20%
X5R-CERM
0.1UF20%1.0UF
X5R6.3V
0201-1
NOSTUFF
NP0-C0G25V5%27PF
0201
NP0-C0G16V5%
56PF
01005
01005
56PF
5%16V
NP0-C0G
6.3VX5R-CERM
1000PF10%
01005
LGADUPLEXER-BAND13-17
NOSTUFF201
27PF5%25VNP0-C0G
NP0-C0G16V5%56PF
01005NOSTUFF
NOSTUFF0201C0G-CERM25V+/-0.05PF2.2PF
2.2PF
01005-1NP0-C0G16V+/-0.1PF
6.8NH-3%-140MA
01005
NOSTUFF01005
1.2PF+/-0.1PF16VNP0-C0G
NOSTUFF01005
1.2PF+/-0.1PF16VNP0-C0G
BAND13-50OHMLFL0Q766MTM1D497
0201
18PF
C0H-CERM25V2%
CELLULAR FRONT END: BAND 13/17 PAD
50_B13_LPF_IN50_B13_DPLX_ANT 50_B13_ANT
50_B17_TX_SAW_OUT
50_B17_TX_PAD_IN
50_B13_TX_SAW_OUT
50_B13_TX_PAD_IN
100_B17_DUPLX_RX_P
100_B13_DUPLX_RX_P
100_B17_DUPLX_RX_N
100_B13_DUPLX_RX_N
PP_BATT_VCC_CONNPA_ON_B13_B17
PA_BS
PA_R1
50_B17_DPLX_ANT 50_B17_ANT
PP_PA
051-9584
2.0.0
15 OF 23
38 OF 46
33
40 23 25 26 34 35 36 37 39
34 35 36 37 39 40
2
1 C110_RF
33
33
33
2
1 C111_RF29 34 35 36 37
29 34 35 37
29
40
40
33
2
1 C114_RF
1 2
C198_RF
1 2
C199_RF
2
1 C217_RF
3029
11
13
10
14
2422
25
2628
21
19181715127 93 5 621
23
27
42
4039
41
3738
36
3435
313233
420
816
U1317_RF
2
1 C235_RF
2
1 C115_RF
2
1 C113_RF
2
1 C254_RF
21
L77_RF
2
1 C108_RF
2
1 C109_RF
33
2 1
3 4
FL3_RF
1 2
L76_RF
IN
PGND
AGND
EN
IN2
IN1
OUT
LX
REFIN
MODE
IN
IN
OUT
IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
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PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
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DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
PLACE C41 CLOSE TO L21
PA DC/DC CONVERTER
PLACE NEAR U11.A2PLACE NEAR U1.H3
MAX77100WLP
SHORT-10L-0.25MM-SM
NOSTUFF
0.01UF
X5R
10%
01005
6.3VCERM0402
6.3V
10UF20% 1.0UF
X5R6.3V20%
0201-1
402X5R
4.7UF6.3V20%
10%4700PF
01005X5R6.3V
1.00K
01005MF
1/32W1%
1.00K
01005MF
1/32W1%
01005
6800PF10%
X5R6.3V
1000PF
01005
10%
X5R-CERM6.3V
X5R01005
0.01UF10%6.3V16V
56PF
NP0-C0G
5%
01005
NOSTUFF
SHORT-10L-0.25MM-SM
SHORT-10L-0.25MM-SM
2.2UH-20%-1.5A-0.160OHM
MAKK2016-SM
CELLULAR FRONT END: PA DCDC CONVERTER
DCDC_PGND
PP_PADCDC_OUT
PP_BATT_VCC_CONN
DCDC_EN
DCDC_PGND
DCDC_ADJ
DCDC_PGND
DCDC_MODE
BB_PDM BB_PDM_FILT
PP_BATT_VCC_PA_DCDC
DCDC_PGND
051-9584
2.0.0
16 OF 23
39 OF 46
29
A3
A1
B1
C2
B2
C3
B3
A2
C1
U11_RF
21
XW6_RF
29
40 23 25 26 34 35 36 37 38
2
1 C1214_RF
2
1 C1201_RF
2
1 C1215_RF
2
1 C41_RF
34 35 36 37 38 40
2
1 C145_RF
1 2
R34_RF1 2
R33_RF
2
1 C144_RF
29
2
1 C168_RF
2
1 C169_RF
2
1 C189_RF
21
XW8_RF
21
XW47_RF
21
L21_RF
16
16
16
16
IN MAIN OUT
TERMINATECOUPLE OUT
GND
OUT
IN MAIN OUT
TERMINATECOUPLE OUT
GND
INOUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
OUT
BI
BI
BI
BI
IN
IN
HBRF_IN
LBRF_IN
ANT2
ANT1
T2
T1
THRM_PADGND
TRX10
TRX9
TRX8TRX7
TRX6
TRX5TRX4
TRX3
TRX2TRX1
VDD_SWITCH
VCC
VBATT
S0S1
S2
S4S3
S6S5
IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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D
8 7 6 5 4 3
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B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
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D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
SEE PGS. 21-22 FOR 2G FEM LOGIC TABLE
2G FEM
.
6.3VX5R
10%0.01UF
01005
20%6.3VX5R-CERM
0.1UF
01005
20%10UF6.3V
0402CERM
6.3V
01005
0.01UF10%
X5R
MF1/32W0%
01005
0.00
01005
0.00
0%1/32WMF
020115NH-250MANOSTUFF
020115NH-250MANOSTUFF
01005MF1/32W1%49.9
0805-6SM
FIL-COUPLER+LPF-BROADBANDLDJ21832M22HB042
LDJ21832M22HC0330805-6SM
FIL-COUPLER+LPF-BROADBAND
0201
2.4NH+/-0.1NH-0.50A
20%6.3VX5R-CERM01005
0.1UF
NP0-C0G16V
01005
5%56PF
01005-1
70-OHM-300MA
+/-0.1PF1.5PF16VNP0-C0G01005NOSTUFF
NOSTUFF
NP0-C0G16V+/-0.1PF1.5PF
01005
20%6.3VX5R-CERM01005
0.1UF 56PF
NP0-C0G01005
5%16V
01005
56PF
16V5%
NP0-C0G
5%16V
NP0-C0G01005
56PF
0.4PF
C0G
+/-0.05PF25V
201
FEM-2G-TXLGA
16V5%
01005NP0-C0G
56PF 56PF
NP0-C0G01005
5%16V
56PF
NP0-C0G01005
5%16V
01005
5%56PF
NP0-C0G16V
NP0-C0G
5%16V
56PF
01005NP0-C0G01005
5%16V
56PF 56PF5%
01005
16VNP0-C0G
CELLULAR FRONT END: 2G FEM
PP_LDO14_2V65
PP_PA
PP_BATT_VCC_2G_FEM
50_2G_HB_PA_IN
50_B2_ANT50_DCS_RX50_PCS_RX
50_2G_LB_PA_IN
50_XCVR_2G_LB_TX_MATCH
PP_BATT_VCC_CONN
2G_FEM_S12G_FEM_S0
50_LAT_TEST
50_UAT_TEST
50_UAT_ASM50_LAT_ASM
50_PDET_PAD_IN
50_B3_ANT
50_LAT_COUPLER_IN
2G_FEM_S6
2G_FEM_S42G_FEM_S32G_FEM_S2
2G_FEM_S5
50_B20_ANT50_B17_ANT
50_DRX_ANT
50_B13_ANT
50_XCVR_2G_HB_TX_MATCH50_XCVR_2G_HB_TX
50_XCVR_2G_LB_TX
50_B1_B4_ANT50_B8_ANT
50_COUPLER_TERM
50_LAT_COUPLER_IN
50_UAT_LPF
50_B5_ANT
051-9584
2.0.0
17 OF 23
40 OF 46
2
1 C243_RF
2
1 C190_RF
2
1 C66_RF
2
1 C242_RF
1 2
R55_RF
1 2
R54_RF
1
2
L56_RF
1
2
L57_RF
1
2
R35_RF
1 3
46
52
FL9_RF
40
3 6
14
52
FL10_RF
40 30
21
L78_RF
29 41
2
1 C65_RF
2
1 C202_RF
21
FL1_RF
25 29 41
29 33 41
29 33
25 29
29
29 33 41
2
1 C63_RF
2
1 C64_RF
30
30
34
37
37
35
33
38
38
35
41
36
43
2
1 C67_RF
43
33
39
23 25 26 34 35
36 37
38
2
1 C203_RF
1 2
C200_RF
1 2
C201_RF
34 35 36 37
38 39
2
1 C207_RF
36
32
17
15
19
13
5049
48
4746
4544
43
4241
40
39
3735
3331
30
2826
20
1816
14
12
78
9
1011
2122
23
2425
27
34
29
38
124 36 5
U2000_RF
2
1 C226_RF
2
1 C227_RF
43 23 25 26
33 41
2
1 C228_RF
2
1 C229_RF
2
1 C230_RF
2
1 C231_RF
2
1 C232_RF
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
GPS/GNSS_OUT_P
GPS/GNSSIN
GND THRM
GPS/GNSS_OUT_N
BAND1/4_OUT_P
B25/3_OUT_NB25/3_OUT_P
B8/20_OUT_NB8/20_OUT_P
B5/18/13/17_OUT_N
ANT
V1
VDD
V2V3V4
BAND1/4_OUT_N
B5/18/13/17_OUT_P
PAD
IN
IN
IN
IN
IN
IN
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
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D
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PAGE TITLE
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IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
B1/B4 LOW LOW LOW LOW BAND S6 S5 S4 S3
100PF BYPASS INCLUDED IN MODULE
RX DIVERSITY
SWITCH IS TERMINATED IN ALL OTHER POSSIBLE STATES
B5/6/18 LOW LOW HIGH LOW B3 HIGH LOW LOW LOW B2/25 LOW HIGH LOW LOW
B20 LOW HIGH HIGH LOW B13/17 LOW HIGH HIGH HIGH B8 LOW LOW LOW HIGH
OFF LOW LOW HIGH HIGH
LGAHFQSWXXUA
3.3NH+/-0.2NH-0.45A
0201
C0G25V
201
+/-0.1PF1.0PF
CELLULAR FRONT END: RX DIVERSITY
2G_FEM_S3
50_GPS_LNA_OUT
PP_LDO14_2V652G_FEM_S42G_FEM_S52G_FEM_S6
100_XCVR_GPS_RX_P
100_XCVR_B1_B4_DRX_P100_XCVR_B1_B4_DRX_N
100_XCVR_B5_B18_B13_B17_DRX_P100_XCVR_B5_B18_B13_B17_DRX_N
100_XCVR_B8_B20_DRX_P100_XCVR_B8_B20_DRX_N
100_XCVR_B2_B25_B3_DRX_P100_XCVR_B2_B25_B3_DRX_N
100_XCVR_GPS_RX_N50_DRX_ANT 50_DIVERSITY_SWITCH_MATCH
051-9584
2.0.0
18 OF 23
41 OF 46
42
30
30
30
30
30
30
30
30
30
30
12
10
2 3 9111423242526
27
13
15
1817
2221
20
1
54 6 7 8
16
19
28
U16_RF
21
L79_RF
2
1 C255_RF
43 23 25 26 33 40
40
25 29 40
29 40
29 33 40
29 33 40
OUT
GND
R CRFIN
GND THRM_PAD
RFOUT
VDD
IN
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
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D
A
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PAGE TITLE
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IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
BYPASSING INCLUDED IN MODULE
GPS
NOTE: ADD SP2 BACK FOR EVT
GPS FEED
0201
+/-0.05PF25V
C0G-CERM
3.9PF
F-RT-SMMM8830-2600B
SKY65716-11LGA
0201
9.1NH-5%-250MA
NOSTUFF
10NH-3%-250MA0201
CELLULAR FRONT END: GPS LNA
50_GPS_ANT_CONN 50_GPS_ANT_FEED
PP_LDO5_GPS_LNA_2V5
50_GPS_LNA_OUT50_UPPER_ANT_FEED
051-9584
2.0.0
19 OF 23
42 OF 46
41
1 2
C221_RF
3
2 1
J12_RF
5
21 643
108
1112
13
9
7
U20_RF
26
21
L62_RF
1
2
L11_RF
20
NC
IN OUT
CR
GND
BI
BI
A
IN
IN
IN
IN
IN
GND
MISO
RF2RF1
MOSI
SCLK
VDD
NC
CS
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
8 7 6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
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D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
UAT1 FEED
NC
NC
LAT
UAT1 COAX
NC
NC
NC
ANTENNA FEEDS
50_UPPER_ANT_FEED
BB_SPI_TO_PAC_CS
PAC_TO_BB_SPI_DATA_MISO
PP_LDO14_PAC_2V65
50_UAT_COAX_DOWN
PAC_TO_BB_SPI_DATA_MISO_FILT
BB_SPI_TO_PAC_DATA_MOSI_FILT
BB_SPI_TO_PAC_CLK_FILT
BB_SPI_TO_PAC_CS_FILT
50_LAT_COAX 50_LAT_MATCH 50_LAT_TEST
PP_LDO14_2V65
50_UAT_TEST
BB_SPI_TO_PAC_CLK
BB_SPI_TO_PAC_DATA_MOSI
50_NTCH_FILT_OUT50_UPPER_MCH_150_UPPER_MCH_2
CELLULAR FRONT END: ANTENNA FEEDS
NOSTUFF
1.0PF
NP0-C0G
+/-0.1PF25V
201
0.8PF+/-0.1PF
201-HF
25VNP0-C0G
1%
MF1/20W
0201
0.00
RF1112WLCSP01005
5.6NH-3%-140MA
NP0-C0G
56PF5%16V
01005
56PF16V5%
NP0-C0G01005
56PF
NP0-C0G01005
5%16V
5.6NH-3%-140MA
01005
5.6NH-3%-140MA
01005
5.6NH-3%-140MA
01005
NP0-C0G
56PF5%16V
01005
01005
5.6NH-3%-140MA
56PF5%16V
01005NP0-C0G
01005
10%
X5R6.3V
0.01UF
030156.8NH-+/-0.2NH-440MA
TP-P6F-ST-SM
MM5829-2700 MM5829-2700F-ST-SM
SM-NSP1.6X1.21MM
MM8930-2600BF-RT-SM
MM5829-2700F-ST-SM
03015
4.7NH+/-0.2NH-0.44AFLTR-GPS-0603LFE18832MHC1D449
MF
5%
0
201
1/20W
1.0PF+/-0.1PF
NP0-C0G25V
201NOSTUFF
051-9584
2.0.0
20 OF 23
43 OF 46
2
1 C94_RF
1 2
R11_RF
2
1 3
FL1701_RF
21
L1732_RF
42 3
1
J4_RF
1
56
2
34
J9_RF
40
1
SP1_RF
40
42 3
1
J5_RF
4 23
1
J6_RF1TP1_RF
1
2
L8_RF
2
1 C99_RF
2
1 C247_RF
41 23 25 26 33 40 21
L69_RF
2
1 C98_RF
21
L66_RF
21
L67_RF
21
L68_RF
2
1 C97_RF
2
1 C96_RF
29 23 25
29 23 25
29 23 25
2
1 C38_RF
21
L6_RF
29 23 25
8
103
42
11
5
6
9
112
1413
7
U7_RF
1 2
R1_RF
2
1 C1726_RF
2
1 C95_RF
19
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
124578
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D
8 7 6 5 4 3
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NOTICE OF PROPRIETARY PROPERTY:
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IV ALL RIGHTS RESERVED
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DSIZEDRAWING NUMBER
REVISION
BRANCH
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THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
GSM1900 RX, UAT LOW HIGH LOW HIGH HIGH LOW HIGH UAT LAT
GSM1800 RX, UAT HIGH LOW LOW HIGH HIGH LOW HIGH UAT LATTERMINATED, UAT HIGH LOW HIGH LOW HIGH HIGH HIGH UAT LAT
UAT = UPPER ANTENNALAT = LOWER ANTENNA
GSM900 RX, LAT HIGH LOW HIGH HIGH HIGH HIGH HIGH LAT UATGSM850 RX, UAT HIGH LOW HIGH HIGH LOW LOW HIGH UAT LATGSM850 RX, LAT HIGH LOW HIGH HIGH LOW HIGH HIGH LAT UATHB TX, HIGH Z, UAT, LPM HIGH HIGH LOW HIGH HIGH LOW LOW UAT LATHB TX, HIGH Z, LAT, LPM HIGH HIGH LOW HIGH HIGH HIGH LOW LAT UAT
GSM1900 RX, LAT LOW HIGH LOW HIGH HIGH HIGH HIGH LAT UAT
TERMINATED, LAT HIGH LOW HIGH LOW HIGH LOW HIGH LAT UAT
FRONT END LOGIC TABLE (1 OF 2)
HB TX, UAT, LPM HIGH HIGH HIGH HIGH HIGH LOW LOW UAT LAT
BAND S6 S5 S4 S3 S2 S1 S0 TX/PRX PATH DRX PATH
GSM900 RX, UAT HIGH LOW HIGH HIGH HIGH LOW HIGH UAT LAT
HB TX, IDLE, LAT HIGH HIGH HIGH HIGH LOW HIGH HIGH LAT UAT
HB TX, HIGH Z, LAT, HPM HIGH HIGH LOW HIGH HIGH HIGH HIGH LAT UAT
HB TX, LAT, LPM HIGH HIGH HIGH HIGH HIGH HIGH LOW LAT UATHB TX, UAT, HPM HIGH HIGH HIGH HIGH HIGH LOW HIGH UAT LATHB TX, LAT, HPM HIGH HIGH HIGH HIGH HIGH HIGH HIGH LAT UATHB TX, IDLE, UAT HIGH HIGH HIGH HIGH LOW LOW HIGH UAT LAT
LB TX, HIGH Z, UAT, LPM HIGH HIGH LOW LOW HIGH LOW LOW UAT LATLB TX, HIGH Z, LAT, LPM HIGH HIGH LOW LOW HIGH HIGH LOW LAT UATLB TX, HIGH Z, UAT, HPM HIGH HIGH LOW LOW HIGH LOW HIGH UAT LATLB TX, HIGH Z, LAT, HPM HIGH HIGH LOW LOW HIGH HIGH HIGH LAT UATLB TX, UAT, LPM HIGH HIGH HIGH LOW HIGH LOW LOW UAT LATLB TX, LAT, LPM HIGH HIGH HIGH LOW HIGH HIGH LOW LAT UAT
LB TX, LAT, HPM HIGH HIGH HIGH LOW HIGH HIGH HIGH LAT UATLB TX, IDLE, UAT HIGH HIGH HIGH LOW LOW LOW HIGH UAT LATLB TX, IDLE, LAT HIGH HIGH HIGH LOW LOW HIGH HIGH LAT UAT
HB TX, HIGH Z, UAT, HPM HIGH HIGH LOW HIGH HIGH LOW HIGH UAT LAT
GSM1800 RX, LAT HIGH LOW LOW HIGH HIGH HIGH HIGH LAT UAT
LB TX, UAT, HPM HIGH HIGH HIGH LOW HIGH LOW HIGH UAT LAT
FRONT END LOGIC TABLE (1 OF 2)051-9584
2.0.0
21 OF 23
44 OF 46
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
FRONT END LOGIC TABLE - DEV2 (2 OF 2)BAND S6 S5 S4 S3 S2 S1 S0 TX/PRX PATH DRX PATH
LAT = LOWER ANTENNAUAT = UPPER ANTENNA
STANDBY = ADDED TO SUPPORT EXISTING SW ARCHITECTURE. NOT TO BE USED AS A LOW POWER STATE.OFF = LOWEST POWER STATE WITHOUT REMOVING LDO14_2V65 POWER
OFF LOW LOW HIGH HIGH X X X X XSTANDBY LOW LOW LOW LOW LOW LOW LOW X X
B1/BC6, LAT LOW LOW LOW LOW HIGH HIGH HIGH LAT UATB1/BC6, UAT LOW LOW LOW LOW HIGH LOW HIGH UAT LATB2/B25/BC1, LAT LOW HIGH LOW LOW HIGH HIGH HIGH LAT UATB2/B25/BC1, UAT LOW HIGH LOW LOW HIGH LOW HIGH UAT LAT
B20, UAT LOW HIGH HIGH LOW HIGH LOW HIGH UAT LAT
B17, LAT LOW HIGH HIGH HIGH LOW HIGH HIGH LAT UATB13, UAT LOW HIGH HIGH HIGH HIGH LOW HIGH UAT LATB13, LAT LOW HIGH HIGH HIGH HIGH HIGH HIGH LAT UATB8, UAT LOW LOW LOW HIGH HIGH LOW HIGH UAT LATB8, LAT LOW LOW LOW HIGH HIGH HIGH HIGH LAT UAT
B5/B6/B18/BC0/BC10, LAT LOW LOW HIGH LOW HIGH HIGH HIGH LAT UAT
B3, LAT HIGH LOW LOW LOW HIGH HIGH HIGH LAT UAT
B5/B6/B18/BC0/BC10, UAT LOW LOW HIGH LOW HIGH LOW HIGH UAT LAT
B17, UAT LOW HIGH HIGH HIGH LOW LOW HIGH UAT LAT
B4/BC15, LAT LOW LOW LOW LOW HIGH HIGH HIGH LAT UATB4/BC15, UAT LOW LOW LOW LOW HIGH LOW HIGH UAT LAT
B3, UAT HIGH LOW LOW LOW HIGH LOW HIGH UAT LAT
B20, LAT LOW HIGH HIGH LOW HIGH HIGH HIGH LAT UAT
FRONT END LOGIC TABLE (2 OF 2)051-9584
2.0.0
22 OF 23
45 OF 46
IN
IN
IN
OUT
IN
BI
BI
OUT
IN
OUT
IN
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
IN
BI
BI
BI
BI
IN
SDIO_DATA3SDIO_DATA2
RF_SW_CTRL_3RF_SW_CTRL_7RF_SW_CTRL_8RF_SW_CTRL_9
SDIO_DATA1
WLAN_HSIC_STROBE
JTAG_SEL
SDIO_CMDSDIO_DATA0
BT_REG_ON
VIN_1P2LDO
CLK32K_AP
WL_REG_ON
GPIO_6
VOUT_3P3
GPIO_9GPIO_10GPIO_11GPIO_15
GPIO_2GPIO_3GPIO_4GPIO_5
GPIO_12
GPIO_1GPIO_0
BT_UART_RTS*BT_UART_TXD
BT_UART_CTS*
BT_PCM_CLKBT_PCM_SYNCBT_PCM_OUTBT_PCM_IN
BT_WAKE
2G_ANT5G_ANT
HOST_WAKE_BT
BT_UART_RXD
VDDIO_1P8V
VBATT_RF_VCC
VBATT_RF_VCC
BATT_VCC
BATT_VCC
SDIO_CLK
WLAN_HSIC_DATA
SR_VLX
THRML_PADGND
OUT
IN
IN
IN
BI
BI HI
LO
COM
GND
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THEPROPRIETARY PROPERTY OF APPLE INC.
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NOTICE OF PROPRIETARY PROPERTY:
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PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
DSIZEDRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT
WLAN/BT
32K INTERFACE TO AP
NC
NCNC
PULL-UP ON GPIO6, SDIO_DATA_2 & PULL-DOWN ON SDIO_DATA_1 REQUIRED FOR HSIC BOOTSTRAPPING
NC
WIFI_SW_CTRL
NC
NC
UAT2
50_WLAN_G
50_WLAN_A
SMDPX205850DT-9038A1SJ
8.2PF50_WLAN_ANT_MATCH_T
PP_VCC_MAIN_WLAN
WLAN_BUCK_OUT
CLK32K_AP
BT_UART_RTS_LBT_UART_CTS_L
BT_PCM_CLKBT_PCM_SYNCBT_PCM_OUT
BT_WAKE
BT_UART_TXDBT_UART_RXD
WLAN_UART_RXD
WLAN_HSIC3_DEVICE_RDY
GPIO_6
LTE_AGG_PA_ON
SDIO_DATA_2
SDIO_DATA_1JTAG_SEL
PP_WLAN_VDDIO_1V8
WLAN_COEX_RXD
WLAN_COEX_TXD
WLAN_COEX_TXD
LTE_COEX_TXD
LTE_COEX_RXD
PP_WL_BT_VDDIO_AP
50_WLAN_ANT_MATCH
50_HSIC_WLAN_DATA
WLAN_SR_VLX1
JTAG_SEL
BT_REG_ON
WLAN_CLK32K
WLAN_REG_ON
HOST_WAKE_WLANAP_HSIC3_RDY
WLAN_UART_TXD
HOST_WAKE_BT
BT_PCM_IN
WLAN_HSIC3_RESUME
WLAN_TX_BLANK
OSCAR_CONTEXT_A
SDIO_DATA_2SDIO_DATA_1
50_HSIC_WLAN_STROBE
WLAN_COEX_RXD
LTE_ACTIVEOSCAR_CONTEXT_B
50_WLAN_G
50_WLAN_G_ANT
50_WLAN_A
50_WLAN_A_ANT
PP_BATT_VCC_WLAN
PP_WLAN_VDDIO_1V8
50_WLAN_ANT_FD
WIFI/BT: MODULE AND FRONT END
+/-0.1PF25VCER0201
+/-0.05PF25V
C0G-CERM
4.7PF
0201
18PF
C0H-CERM25V2%
0201
SHORT-L9-SM
SHORT-L9-SM
NOSTUFF0201
0.2PF+/-0.05PF25VCOG-CERM
COG-CERM25V+/-0.05PF0.2PF
0201NOSTUFF
5%
201MF
1/20W
0
NOSTUFF201COG-CERM25V+/-0.1PF0.2PF
MM5829-2700F-ST-SM
MF1/32W0%
0.00
01005
MF
0.00
0%1/32W
01005
MF1/32W5%10K
01005
NOSTUFF
10K1/32WMF
5%
01005
5%
MF1/32W
10K
01005
5%10K1/32WMF01005
100K5%1/32WMF01005
LGAMOD-WIFI-BT-IMPERIAL
0201
0.2PF+/-0.05PF25VCOG-CERM
NOSTUFF
2.5UH-30%-0.7A-0.24OHM
0603
1/32W
0.00
MF
0%
01005
NP0-C0G16V5%27PF
01005
0.01UF10%
X5R6.3V
01005
MF1/32W5%100K
01005
NP0-C0G
27PF16V5%
01005
10UF
CERM-X5R6.3V20%
0402-1
MF1/32W
10K5%
01005
4.7UF
402
20%6.3VX5R-CERM1
SHORT-01005
051-9584
2.0.0
23 OF 23
46 OF 46
1 2
XW11_RF
2
1 C102_RF
25 23
25 23
1
2
R16_RF
25 23
2
1 C103_RF
2
1 C104_RF
1
2
R18_RF
25 23
25 23
25 23
25 23
25 23
25 23
25 23
25 23
25 23
25 23
25 23
25 23
2
1 C105_RF
2
1 C37_RF
1 2
R17_RF
25 23
25 23
25 23
25 23
25 23
21
L9_RF
25 23
25 23
46
46
2
1 C170_RF
25 23
2221
45141548
19
25
52
1820
50
31
36
51
3
29
8679
11241213
510
3740
38
32353334
49
4354
41
39
16
4746
2728
12326424453
60
5859
575655
17
24
30
U8_RF
29
25 29
29
25 29
1
2
R45_RF
1
2
R43_RF
1
2
R44_RF
1
2
R14_RF
1
2
R15_RF
1 2
R51_RF
1 2
R52_RF
42 3
1
J10_RF
46
46
2
1 C101_RF
1 2
R13_RF
2
1 C281_RF
2
1 C280_RF
1 2
XW9_RF
1 2
XW20_RF
1 2
C106_RF
1 2
C107_RF
1 2
L33_RF
1
3
5
2 4 6
U12_RF
23
23
23
23
23
23 2
23 2
6 2
6
23
23
23
23
23
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