Interfacing ‘C542 DSP to Analog Interface Circuit

EE113L

Week 3

Rick Huang

Week 3 EE113D EE Dept UCLA (c) RL 2

Administrative Stuff

Assignments Due today

• Homework 2 Due next week

• Homework 3

• Floppy Disk Graded

• Homework 1

• Solutions posted on class website

Agenda Reader pg45-70,79-84 Analog Interface Circuit

• Anti-aliasing filter cutoff

• Sampling rate Programming

• Interrupts

• Circular addressing Demo

• Instruments

• Experiment B

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As a DSP Programmer

Satisfy sampling theorem• Program the analog chip

For each incoming sample,1. Read into DSP,

2. Process it,

3. Generate an outgoing sample.

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AIC Functional Block Diagram(TLC320AC01C Data Manual)

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Analog Interface Circuit (AIC/AC01)Programming FS and FLP

We choose variables A and B.

FS = 10MHz / ( 2 A B )

FLP = 10MHz / ( 80 A )

Equations• A

• B

AIC registers• Register 1 or A

• Register 2 or B

Code• REG1

• REG2

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Zeroing out last 2 LSBs

A = #0FFFCh & A• Any value “and” with “1” is the value itself.

• Any value “and” with “0” is “0”.

The last 2 LSBs are control bits for the AIC.

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AICInitializations

; part of DLY_AC01.ASM…REGISTER .set 0bh ; on/off bitsREG1 .set 124hREG2 .set 218hREG3 .set 300hREG4 .set 405h…AC01INIT:

….eval REGISTER & 1h, SELECT

.if SELECT = 1ha = #REG1call REQ2.endif…

AC01INIT.ASM• Loads REG1 to

Register 1• Loads REG2 to

Register 2 • Loads REG4 to

Register 4 DLY_AC01.ASM

• Uses REGISTER as a bit-mask to selectively load values into AIC registers

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AICSetting FS and FLP

AC01INIT.ASM: Value format given in pg79+ in Reader or pg2-20+ in AIC manual

Reader/manual states• 8 LSBs of Register 1 is

programmable.

For exampleA = 12h = 18

B = 12h = 18

FS ? FLP ? You do.

...REG1 .set 112hREG2 .set 212hREG3 .set 300hREG4 .set 405hREG5 .set 501hREG6 .set 600hREG7 .set 700hREG8 .set 801h…

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AICSetting Input & Output Gain AC01INIT.ASM: Value format given in

pg79+ in Reader or pg2-20+ in AIC manual

Reader/manual states• Last 2 LSBs controls output gain

(dB)• Next 2 LSBs controls input gain

(dB) For example

• Gain bits = 5h = 0101b “01” input gain 0dB “01” output gain 0dB

Overall gain? You do.

...REG1 .set 112hREG2 .set 212hREG3 .set 300hREG4 .set 405hREG5 .set 501hREG6 .set 600hREG7 .set 700hREG8 .set 801h…

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Communications betweenDSP and AIC

XINT: A = trcv ; receive sample

A = A << 1 ; processing

A = #0FFFCh & A ; masking tdxr = A ; transmit sample return_enable ; end ISR

AIC

DSP

16

16

tdxr=A

A=trcv

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Interrupt Vector Table(vectors.asm) ...bxint return_enable ;54; BSP transmit interrupt nop nop noptrint return_enable ;58; TDM receive interrupt nop nop noptxint goto XINT ;5C; TDM transmit interrupt nop nopint3 return_enable ;60; external interrupt int3 nop nop nop ...

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Experiment B: Part 1 A/D – D/A loopSource Code

Main program (sample.asm)

.sect "vectors"

.copy "vectors.asm"

.textstart:

...wait nop

goto wait

...

.copy "ac01init.asm“

.end

Interrupt Vector Table (vectors.asm)

• A jump table to interrupt service routine• txint interrupt is enabled

AC01INIT Routine (ac01init.asm)

• Loads REG1 and REG2 to Register 1 and 2, respectively

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Experiment B: Part 1 A/D – D/A loopSource Code

; part of SAMPLE.ASM.text

start: intm = 1call AC01INITpmst = #01a0hsp = #0ffaha = #0imr = #280hintm = 0

wait nopgoto wait

XINT: …return_enable

Calls a routine, AC01INIT

Other initializations

But when an interrupt comes (1) executes an interrupt service routine and (2) go back to where it left off

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Experiment B: Part 2Allowing aliasing

Aliasing can happen if 2 FLP > FS

FS = 10MHz / ( 2 A B )

FLP = 10MHz / ( 80 A )

2 / 80 > 1 / (2B)

B > 20

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Experiment B: Part 3 Signal DelayHow to Delay a Signal

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Experiment B: Part 3 Signal DelayDelay using Circular Buffer

n=0 n=1 n=2 n=3 n=4 n=5

x(n) 1 2 3 4 5 6y(n)

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Experiment B: Part 3 Signal DelayMore addressing mode & instruction

Circular addressing• Pg 5-15 CPU & Periph

• “%” modifier

• BK register, BK=#5; part of delay.asmstart: …

AR1 = #bufferBK = #lengthA = #0 repeat(#length-1)*AR1+% = A…

repeat(#9)• Pg 2-14 Algebraic

• Repeats the next instruction 9 times

; part of delay.asm…receive A = trcv

*AR1+% = A A = *AR1 tdxr = A return_enable

…