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Transcript of Intelbras i30 - Compal La-3961p - Rev 0.3 - Www.commandodigital.com.Br
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.2
Cover PageB
1 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Intel Merom Processor with SiSM672MX + DDRII + SiS968 + SiS307LV
JFWXX Schematics Document
REV: 0.3
Compal Confidential
2007-09-06
PJP1
14W_DCIN14W_45@
PJP1
15W_DCIN15W_45@
ZZZ1
PCB<BOM Structure>
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Block DiagramsB
2 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
page 37 page 33 page 37
CHARGER
page 34
I/O Conn.FRONT LCD /B.LID SW
Fan Controlpage 4
Compal Confidential
IDE
Model Name : JFWXX
USB
S-ATA
Power On/Off CKT.
File Name : LA-3961P
Touch Pad
page 37
CRT & TV-out
LPC BUS
page 35
TEBGA-847
3.3V 24.576MHz/48Mhz
H_A#(3..35)
Card Reader
IDSEL:AD22(PIRQG#,PIRQH#,GNT#0, REQ#0)
H_D#(0..63)
R5C833
page 17
MDC 1.5Conn
page 36
Int.KBD
page 33
PCI-Express BANK 0, 1, 2, 3
USB conn x2TO I/O/B
667/800MHz
ALC268
1GB/s MuTIOL IO Link
page 26
DC/DC Interface CKT.
Intel Merom Processor
3.3V 48MHz
FSB
CDROM Conn.
Clock GeneratorICS9LPRS600C+ICS9P935
page 31
Power Circuit DC/DC
PCI BUS
page 17
uPGA-478 Package
3.3V 33 MHz
page 34
200pin DDRII-SO-DIMM X2
page 40
SiS M672MX
3.3V ATA-100
Single Channel
page 26
BIOS
page 4
1.8V DDRII 533/667
page 4,5,6
page 32
HDA Codec
page 14,15
Memory BUS(DDRII)
TEBGA-570HD Audio
page 24
page 7,8,9,10,11
SiS968
Thermal Sensor
page 12,13
page 19,20,21,22,23
page 33
ENE KB926
port 0
Audio AMP
1394Conn.
3 in 1socket
New CardSocket
MINI Card x1
Web Camera
WLAN
PCI-Express
ADM1032
RTC CKT.page 20
LCD Conn.
page 32
Switch/B Conn.
page 24
S-ATA HDDConn.
BluetoothConn
page 30
page 29
page 27
page 41,42,44,458 46,47,48
page 33
USB conn x2TO M/B
page 43
SiS 307LVpage 18
page 28
RJ45
page 28
LAN
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Notes ListB
3 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
ON
SLP_S3#SLP_S1#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGHHIGH
LOW
LOW
LOW
LOW LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE
OFFOFF
OFF
OFFON
ON
ON
OFF
OFF
OFFOFFON
ON*ON
ON
+CPU_CORE
1.5V switched power railOFF
OFF
ON
Voltage Rails
+5VS
+2.5VS1.8V switched power rail+1.8VS
+1.5VS
RTC power+RTCVCC
0.9V switched power rail for DDR terminator+0.9VS ( Actual +0.9V )
OFFOFFON
3.3V switched power rail5V always on power rail
3.3V always on power rail
Adapter power supply (19V)
+1.05VS
1.8V power rail for DDR
+3VALW
B+VIN
S5
2.5V switched power rail
+1.8V
+5VALW
S3S1
+3VS
ONON*ONVSB always on power rail+VSB
5V switched power rail
1.05V switched power rail
Core voltage for CPUAC or battery power rail for power circuit.
ONOFFON
ONON
ON
DescriptionPower Plane
N/A N/A N/AN/AN/AN/A
ON OFF
ON1.25V switched power rail+1.25VS
ONON
ON
OFFOFF
OFFON*
OFF
SIGNAL
Address1001 100X b0001 011X b
EEPROM(24C16/02)
1010 010XbDDR DIMM1
1010 000XbDDR DIMM0
C,DCARD BUS CB1410
IDSEL #
20
1101 001Xb
ICH8M SM Bus address
AD22
DEVICE
AD20
REQ/GNT #
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Address
Address
Clock Generator(ICS9LPRS325AKLFT_MLF72)
Device
1394+Cardreader G,H
PIRQ
ADI ADM1032
1010 000X b
External PCI Devices
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
NVIDIA NB8X
PROJECT_ID
PROJECT ID Table
ON
Vcc 3.3V +/- 5%100K +/- 5%Ra
Board ID V min
8.2K +/- 5%0 V
0.217 V 0.250 V 0.288 V0.439 V0.721 V
0.503 V0.819 V
0.575 V0.926 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%
3.465 V
0 V 0 V
1.054 V1.489 V 1.650 V 1.819 V2.019 V3.135V
2.200 V3.300 V
2.386 V
1.185 V 1.325 V
SKU ID Table
1
32
654
7
Rb0
NC
14_B@14_C@14_MP@
15_B@15_C@15_MP@
14_A@
15_A@
Rb BOM Structure
Ra~ R312Rb~ R311
0
14W15W
R424 (Pull low)NA (Internal Pull High)
R311
200K_0402_5%15_C@
R311
8.2K_0402_5%14_B@
R311
18K_0402_5%14_C@
R311
33K_0402_5%14_MP@
R311
56K_0402_5%15_A@
R311
100K_0402_5%15_B@
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5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#[3..35]
H_REQ#[0..4]
H_RS#[0..2]H_A#4H_A#3
H_A#6H_A#5
H_A#8H_A#7
H_A#9H_A#10
H_A#12H_A#11
H_A#15H_A#14H_A#13
H_A#17
H_A#16
H_A#18H_A#19H_A#20
H_A#22H_A#21
H_A#23H_A#24
H_A#26H_A#25
H_A#27H_A#28H_A#29H_A#30H_A#31
H_REQ#0H_REQ#1H_REQ#2
H_REQ#4H_REQ#3
H_RESET#
H_IERR#
H_A20M#H_FERR#
H_INIT#
H_INTRH_NMI
H_IGNNE#
H_STPCLK#
H_SMI#
THERMDATHERMDC
H_THERMTRIP#
H_RS#0
H_RS#2H_RS#1
THERMDA
THERMDC
ITP_TCK
ITP_TRST#
ITP_TDI
ITP_TMS
H_IERR#
H_PROCHOT#
ITP_TRST#
ITP_TCK
ITP_DBRESET#
ITP_TMS
ITP_TDI
H_PREQ#
H_PREQ#
+VCC_FAN1EN_FAN1
+VCC_FAN1
H_PROCHOT#
H_A20M#
H_SMI#
H_IGNNE#
H_STPCLK#
H_INIT#
H_NMI
H_INTR
H_RESET#
H_BR0#
H_THERMTRIP#
ITP_DBRESET#
H_THERMTRIP#
H_FERR#
H_A#32H_A#33H_A#34H_A#35
H_A#[3..35]<7>
H_REQ#[0..4]<7>
H_RS#[0..2]<7>
H_ADSTB#0<7>
H_ADSTB#1<7>
H_RESET# <7>
H_ADS# <7>H_BNR# <7>H_BPRI# <7>
H_DEFER# <7>H_DRDY# <7>
H_HIT# <7>H_HITM# <7>
H_LOCK# <7>
H_CLK_DN0 <14>H_CLK_DP0 <14>
H_A20M#<20>
H_INIT# <20>
H_IGNNE#<20>
H_NMI<20>H_INTR<20>
H_FERR#<20>
H_STPCLK#<20>
H_SMI#<20>
H_DBSY# <7>
H_THERMTRIP# <20>
H_TRDY# <7>
EC_SMB_CK2 <31>
EC_SMB_DA2 <31>ITP_DBRESET#
H_PROCHOT# <20>
FAN_SPEED1<31>
EN_FAN1<31>
H_BR0# <7>
+3VS
+1.05VS
+5VS
+3VS
+5VS
+1.05VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Merom (1/3)B
4 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
F75383M_MSOP8
Place close to CPU within 500mil
CRB pull 75 Ohm
Connect SB SYS_RESET# or just left NC
40mil
FAN1 Conn
ADM1032
H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil
Checklist recommend 39 Ohm
CPU to SB interface
Trace length must short
Intel :Pull-up 56ohm (Un-Mount) SiS : Pull-up 56ohm (Mount)
Intel :Pull-up 56ohm (Mount) SiS : Pull-up 54.9ohm (Mount)
Intel :Pull-up 56ohm (Mount) SiS : Pull-up 75ohm (Mount)
Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)
Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)Intel :Don't Pull-up SiS : Pull-up 150ohm (Mount)
Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)
R137 56_0402_5% 1 2
R144 56_0402_5% 1 2
U7
ADM1032ARMZ_MSOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
D12
1SS355_SOD323
12
C54
1000P_0402_50V7K
1
2
D11
BAS16_SOT23-3
1 2
R113 56_0402_5% 1 2
R69 27.4_0402_1% 1 2
R214 56_0402_5% 1 2
R140 56_0402_5% 1 2
C111
2200P_0402_50V7K
1
2
R128 56_0402_5% 1 2
R61 680_0402_5% 1 2
R136 56_0402_5%@1 2
JP6
ACES_85205-03001ME@
112233
GND4GND5
C551000P_0402_50V7K
1 2
ADDR GRO
UP 0ADDR G
ROUP 1
CONT
ROL
XDP/
ITP
SIG
NA
LS
H CLK
THERMALRE
SERV
ED
ICH
JP36A
Merom Ball-out Rev 1aconn@
A[10]#N3A[11]#P5A[12]#P2A[13]#L2A[14]#P4A[15]#P1A[16]#R1
A[17]#Y2A[18]#U5A[19]#R3A[20]#W6A[21]#U4A[22]#Y5A[23]#U1A[24]#R4A[25]#T5A[26]#T3A[27]#W2A[28]#W5A[29]#Y4
A[3]#J4
A[30]#U2A[31]#V4
RSVD[01]M4RSVD[02]N5RSVD[03]T2RSVD[04]V3RSVD[05]B2RSVD[06]C3RSVD[07]D2RSVD[08]D22
A[4]#L5A[5]#L4A[6]#K5A[7]#M3A[8]#N2A[9]#J1
A20M#A6
ADS# H1
ADSTB[0]#M1
ADSTB[1]#V1
RSVD[09]D3
BCLK[0] A22BCLK[1] A21
BNR# E2
BPM[0]# AD4BPM[1]# AD3BPM[2]# AD1BPM[3]# AC4
BPRI# G5
BR0# F1
DBR# C20
DBSY# E1
DEFER# H5DRDY# F21
FERR#A5
HIT# G6HITM# E4
IERR# D20
IGNNE#C4
INIT# B3
LINT0C6LINT1B4
LOCK# H4
PRDY# AC2PREQ# AC1
PROCHOT# D21
REQ[0]#K3REQ[1]#H2REQ[2]#K2REQ[3]#J3REQ[4]#L1
RESET# C1RS[0]# F3RS[1]# F4RS[2]# G3
SMI#A3
STPCLK#D5
TCK AC5TDI AA6
TDO AB3
THERMTRIP# C7
THERMDA A24THERMDC B25
TMS AB5
TRDY# G2
TRST# AB6
A[32]#W3A[33]#AA4A[34]#AB2A[35]#AA3
RSVD[10]F6
R115 56_0402_5% 1 2
C58 10U_0805_10V4Z
1 2
R112 150_0402_1%
1 2
R148 56_0402_5% 1 2
R83 150_0402_1% 1 2
C112 0.1U_0402_16V4Z
1 2
C114 0.1U_0402_16V4Z
1 2
R127 56_0402_5% 1 2
R114 51_0402_1% 1 2
R84 56_0402_5% 1 2
R141 56_0402_5% 1 2R31
10K_0402_5%
12
R85 56_0402_5%@1 2
R120 56_0402_5% 1 2
C52 10U_0805_10V4Z
1 2
U3
G993P1UF_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
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5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[0..63]
H_DPSLP#H_DPWR#_RH_PWRGOODH_CPUSLP#
H_D#56H_D#57
H_D#59H_D#58
H_D#60
H_D#62H_D#61
H_D#63
H_D#49H_D#50
H_D#48
H_D#51H_D#52H_D#53H_D#54H_D#55
H_D#40
H_D#43
H_D#41
H_D#44
H_D#42
H_D#45H_D#46H_D#47
H_D#36
H_D#33H_D#32
H_D#34H_D#35
H_D#37
H_D#39H_D#38
H_D#8
H_D#10H_D#11
H_D#9
H_D#15
H_D#12
H_D#14H_D#13
H_D#2H_D#1
H_D#3
H_D#0
H_D#4
H_D#7
H_D#5H_D#6
H_D#24H_D#25
H_D#29
H_D#26
H_D#28H_D#27
H_D#30H_D#31
H_D#16H_D#17
H_D#19H_D#18
H_D#21H_D#20
H_D#23H_D#22
COMP1COMP0
COMP3COMP2
GTL_REFTEST1TEST2
TEST4TEST3
TEST5TEST6
VSSSENSE
VCCSENSE
H_PWRGOOD
H_DPSLP#
H_PWRGOOD
H_CPUSLP#
H_DPWR#
GTL_REF
H_DPWR#_R H_DPWR#
H_D#[0..63] <7>
H_DINV#3 <7>
H_DSTBN#1<7> H_DSTBN#3 <7>H_DSTBP#1<7> H_DSTBP#3 <7>
H_DINV#2 <7>H_DSTBP#0<7> H_DSTBP#2 <7>H_DSTBN#0<7> H_DSTBN#2 <7>
H_DINV#1<7>
H_DINV#0<7>
H_PSI# <48>
H_BSEL0<14>H_BSEL1<14>H_BSEL2<14>
H_DPRSTP# <25,48>H_DPSLP# <25>
H_PWRGOOD <7>H_CPUSLP# <20>
CPU_VID0 <48>CPU_VID1 <48>CPU_VID2 <48>CPU_VID3 <48>CPU_VID4 <48>CPU_VID5 <48>CPU_VID6 <48>
VCCSENSE <48>
VSSSENSE <48>
H_DPWR# <7>
+1.05VS
+CPU_CORE
+1.05VS
+CPU_CORE
+1.5VS
+CPU_CORE
+1.05VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Merom (2/3)B
5 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Width=20 mil
20mils
Place this cap more close toB26/C26 rather than 10UF
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
0 1
0 1
CPU_BSEL0
1
0
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from any othertoggling signal.COMP[0,2] trace width is18 mils. COMP[1,3] tracewidth is 4 mils.
Close to CPU pin AD26within 500mils.
Length match within 25 mils.The trace width/space/other is20/7/25.
Close to CPU pinwithin 500mils.
Intel :Pull-up 56ohm (Un-Mount) SiS : Pull-up 56ohm (Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)
Intel :Don't Pull-up (Connecte to ICH) SiS : Pull-up 56ohm (Un-Mount)Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)
Intel :Don't Pull-down SiS :Pull-down Cap (Un-Mount)
SiS Recommend
SiS Recommend
0 0 1133
C438
0.01U_0402_16V7K
1
2
R44 54.9_0402_1% 1 2
C650 0.1U_0402_16V4Z@1 2
R121 56_0402_5% 1 2
R111 1K_0402_5%@12
R24 100_0402_1% 1 2
DATA
GR
P 0DA
TA G
RP 1
DATA
GR
P 2
DATA
GR
P 3
MISC
JP36B
Merom Ball-out Rev 1aconn@
COMP[0] R26COMP[1] U26COMP[2] AA1COMP[3] Y1
D[0]#E22D[1]#F24
D[10]#J24D[11]#J23D[12]#H22D[13]#F26D[14]#K22D[15]#H23
D[16]#N22D[17]#K25D[18]#P26D[19]#R23
D[2]#E26
D[20]#L23D[21]#M24D[22]#L22D[23]#M23D[24]#P25D[25]#P23D[26]#P22D[27]#T24D[28]#R24D[29]#L25
D[3]#G22
D[30]#T25D[31]#N25
D[32]# Y22D[33]# AB24D[34]# V24D[35]# V26D[36]# V23D[37]# T22D[38]# U25D[39]# U23
D[4]#F23
D[40]# Y25D[41]# W22D[42]# Y23D[43]# W24D[44]# W25D[45]# AA23D[46]# AA24D[47]# AB25
D[48]# AE24D[49]# AD24
D[5]#G25
D[50]# AA21D[51]# AB22D[52]# AB21D[53]# AC26D[54]# AD20D[55]# AE22D[56]# AF23D[57]# AC25D[58]# AE21D[59]# AD21
D[6]#E25
D[60]# AC22D[61]# AD23D[62]# AF22D[63]# AC23
D[7]#E23D[8]#K24D[9]#G24
TEST5AF1
DINV[0]#H25
DINV[1]#N24
DINV[2]# U22
DINV[3]# AC20
DPRSTP# E5DPSLP# B5DPWR# D24
DSTBN[0]#J26
DSTBN[1]#L26
DSTBN[2]# Y26
DSTBN[3]# AE25
DSTBP[0]#H26
DSTBP[1]#M26
DSTBP[2]# AA26
DSTBP[3]# AF24
GTLREFAD26
PSI# AE6
PWRGOOD D6SLP# D7
TEST3C24
BSEL[0]B22BSEL[1]B23BSEL[2]C21
TEST2D25
TEST4AF26
TEST6A26
TEST1C23
R119 56_0402_5%@1 2
R133 56_0402_5%@1 2
C364 0.1U_0402_16V4Z@1 2
R42 27.4_0402_1% 1 2
R126 0_0402_5%@1 2
R98 1K_0402_5%@12
R143 56_0402_5% 1 2
R319
2K_0402_1%
12
T3 PAD
C369
220P_0402_50V7K
1
2
R321
1K_0402_1%
12
JP36C
Merom Ball-out Rev 1a.conn@
VCC[001]A7VCC[002]A9VCC[003]A10VCC[004]A12VCC[005]A13VCC[006]A15VCC[007]A17VCC[008]A18VCC[009]A20VCC[010]B7VCC[011]B9VCC[012]B10VCC[013]B12VCC[014]B14VCC[015]B15VCC[016]B17VCC[017]B18VCC[018]B20VCC[019]C9VCC[020]C10VCC[021]C12VCC[022]C13VCC[023]C15VCC[024]C17VCC[025]C18VCC[026]D9VCC[027]D10VCC[028]D12VCC[029]D14VCC[030]D15VCC[031]D17VCC[032]D18VCC[033]E7VCC[034]E9VCC[035]E10VCC[036]E12VCC[037]E13VCC[038]E15VCC[039]E17VCC[040]E18VCC[041]E20VCC[042]F7VCC[043]F9VCC[044]F10VCC[045]F12VCC[046]F14VCC[047]F15VCC[048]F17VCC[049]F18VCC[050]F20VCC[051]AA7VCC[052]AA9VCC[053]AA10VCC[054]AA12VCC[055]AA13VCC[056]AA15VCC[057]AA17VCC[058]AA18VCC[059]AA20VCC[060]AB9VCC[061]AC10VCC[062]AB10VCC[063]AB12VCC[064]AB14VCC[065]AB15VCC[066]AB17VCC[067]AB18
VCC[068] AB20VCC[069] AB7VCC[070] AC7VCC[071] AC9VCC[072] AC12VCC[073] AC13VCC[074] AC15VCC[075] AC17VCC[076] AC18VCC[077] AD7VCC[078] AD9VCC[079] AD10VCC[080] AD12VCC[081] AD14VCC[082] AD15VCC[083] AD17VCC[084] AD18VCC[085] AE9VCC[086] AE10VCC[087] AE12VCC[088] AE13VCC[089] AE15VCC[090] AE17VCC[091] AE18VCC[092] AE20VCC[093] AF9VCC[094] AF10VCC[095] AF12VCC[096] AF14VCC[097] AF15VCC[098] AF17VCC[099] AF18VCC[100] AF20
VCCA[01] B26
VCCP[03] J6VCCP[04] K6VCCP[05] M6VCCP[06] J21VCCP[07] K21VCCP[08] M21VCCP[09] N21VCCP[10] N6VCCP[11] R21VCCP[12] R6VCCP[13] T21VCCP[14] T6VCCP[15] V21VCCP[16] W21
VCCSENSE AF7
VID[0] AD6VID[1] AF5VID[2] AE5VID[3] AF4VID[4] AE3VID[5] AF3VID[6] AE2
VSSSENSE AE7
VCCA[02] C26
VCCP[01] G21VCCP[02] V6
C432
10U_0805_10V4Z
1
2
R131
10_0402_5%
R27100_0402_1% 1 2
T23 PAD
C368
1U_0603_10V4Z
1
2
R324 27.4_0402_1% 1 2
T2 PAD
+ C80
330U_D2E_2.5VM_R9
1
2
R323 54.9_0402_1% 1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Merom (3/3)B
6 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
6X330uF 9m ohm/6 1.8nH/6
+CPU-COREDecoupling
32X22uF 3m ohm/32 0.6nH/32
C,uF ESR, mohm ESL,nH
SPCAP,Polymer
MLCC 0805 X5R
3 x 330uF(9mOhm/3) 3 x 330uF(9mOhm/3)
South Side Secondary North Side Secondary
(Place these capacitors on South side,Secondary Layer)
(Place these capacitors on South side,Primary Layer)
(Place these capacitors on North side,Primary Layer)
(Place these capacitors on North side,Secondary Layer)
32X10uF 3m ohm/32 0.6nH/32
CRB no stuff. Reserved!
C392
10U_0805_6.3V6M
1
2
C46
10U_0805_6.3V6M
1
2
C84
10U_0805_6.3V6M
1
2
C97
0.1U_0402_16V4Z
1
2
C85
10U_0805_6.3V6M
1
2
C77
10U_0805_6.3V6M
1
2
C90
10U_0805_6.3V6M
1
2
C104
10U_0805_6.3V6M
1
2
C378
10U_0805_6.3V6M
1
2
C87
0.1U_0402_16V4Z
1
2
C409
10U_0805_6.3V6M
1
2
C83
0.1U_0402_16V4Z
1
2
C103
10U_0805_6.3V6M
1
2
C88
10U_0805_6.3V6M
1
2
C89
10U_0805_6.3V6M
1
2
C383
10U_0805_6.3V6M
1
2
JP36D
Merom Ball-out Rev 1a .conn@
VSS[082] P6
VSS[148] AE11
VSS[002]A8VSS[003]A11VSS[004]A14VSS[005]A16VSS[006]A19VSS[007]A23VSS[008]AF2VSS[009]B6VSS[010]B8VSS[011]B11VSS[012]B13VSS[013]B16VSS[014]B19VSS[015]B21VSS[016]B24VSS[017]C5VSS[018]C8VSS[019]C11VSS[020]C14VSS[021]C16VSS[022]C19VSS[023]C2VSS[024]C22VSS[025]C25VSS[026]D1VSS[027]D4VSS[028]D8VSS[029]D11VSS[030]D13VSS[031]D16VSS[032]D19VSS[033]D23VSS[034]D26VSS[035]E3VSS[036]E6VSS[037]E8VSS[038]E11VSS[039]E14VSS[040]E16VSS[041]E19VSS[042]E21VSS[043]E24VSS[044]F5VSS[045]F8VSS[046]F11VSS[047]F13VSS[048]F16VSS[049]F19VSS[050]F2VSS[051]F22VSS[052]F25VSS[053]G4VSS[054]G1VSS[055]G23VSS[056]G26VSS[057]H3VSS[058]H6VSS[059]H21VSS[060]H24VSS[061]J2VSS[062]J5VSS[063]J22VSS[064]J25VSS[065]K1VSS[066]K4VSS[067]K23VSS[068]K26VSS[069]L3VSS[070]L6VSS[071]L21VSS[072]L24VSS[073]M2VSS[074]M5VSS[075]M22VSS[076]M25VSS[077]N1VSS[078]N4VSS[079]N23VSS[080]N26VSS[081]P3 VSS[162] A25VSS[161] AF21VSS[160] AF19VSS[159] AF16VSS[158] AF13VSS[157] AF11VSS[156] AF8VSS[155] AF6VSS[154] A2VSS[153] AE26VSS[152] AE23VSS[151] AE19
VSS[083] P21VSS[084] P24VSS[085] R2VSS[086] R5VSS[087] R22VSS[088] R25VSS[089] T1VSS[090] T4VSS[091] T23VSS[092] T26VSS[093] U3VSS[094] U6VSS[095] U21VSS[096] U24VSS[097] V2VSS[098] V5VSS[099] V22VSS[100] V25VSS[101] W1VSS[102] W4VSS[103] W23VSS[104] W26VSS[105] Y3
VSS[107] Y21VSS[108] Y24VSS[109] AA2VSS[110] AA5VSS[111] AA8VSS[112] AA11VSS[113] AA14VSS[114] AA16VSS[115] AA19VSS[116] AA22VSS[117] AA25VSS[118] AB1VSS[119] AB4VSS[120] AB8VSS[121] AB11VSS[122] AB13VSS[123] AB16VSS[124] AB19VSS[125] AB23VSS[126] AB26VSS[127] AC3VSS[128] AC6VSS[129] AC8VSS[130] AC11VSS[131] AC14VSS[132] AC16VSS[133] AC19VSS[134] AC21VSS[135] AC24VSS[136] AD2VSS[137] AD5VSS[138] AD8VSS[139] AD11VSS[140] AD13VSS[141] AD16VSS[142] AD19VSS[143] AD22VSS[144] AD25VSS[145] AE1VSS[146] AE4
VSS[106] Y6
VSS[001]A4
VSS[149] AE14VSS[150] AE16
VSS[147] AE8
VSS[163] AF25
+C347
330U_D2E_2.5VM_R9
1
2
C394
10U_0805_6.3V6M
1
2
C73
0.1U_0402_16V4Z
1
2
C78
10U_0805_6.3V6M
1
2
+C169
330U_D2E_2.5VM_R9@
1
2
+C390
330U_D2E_2.5VM_R9@
1
2
+C155
330U_D2E_2.5VM_R9
1
2
C393
10U_0805_6.3V6M
1
2
C105
10U_0805_6.3V6M
1
2
C411
10U_0805_6.3V6M
1
2
C412
10U_0805_6.3V6M
1
2
C379
10U_0805_6.3V6M
1
2
C81
0.1U_0402_16V4Z
1
2
+C47
330U_D2E_2.5VM_R9
1
2
C410
10U_0805_6.3V6M
1
2
C106
10U_0805_6.3V6M
1
2
C74
10U_0805_6.3V6M
1
2
C377
10U_0805_6.3V6M
1
2
C76
10U_0805_6.3V6M
1
2
C107
10U_0805_6.3V6M
1
2
C408
10U_0805_6.3V6M
1
2
C75
10U_0805_6.3V6M
1
2
C384
10U_0805_6.3V6M
1
2
C96
0.1U_0402_16V4Z
1
2
+C350
330U_D2E_2.5VM_R9
1
2
C385
10U_0805_6.3V6M
1
2
C376
10U_0805_6.3V6M
1
2
C375
10U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C1XAVDDC1XAVSS
C4XAVDDC4XAVSS
PCREQ#EDRDY#
H_CLK_DP1H_CLK_DN1
H_DPWR#
H_RS#0
H_REQ#0
H_DSTBP#0
H_REQ#4
H_REQ#2
H_DSTBP#2
H_REQ#3
H_DINV#2
H_REQ#1
H_DINV#0
H_DSTBP#3
H_DSTBN#3
H_DSTBP#1
H_DINV#3
H_RS#2
H_DSTBN#1H_DSTBN#0
H_DSTBN#2
H_RS#1
H_DINV#1
H_ADSTB#1
H_HIT#
H_BNR#
H_BPRI#
H_ADS#
H_ADSTB#0
H_LOCK#
H_DBSY#
H_BR0#
H_HITM#
H_DEFER#H_TRDY#H_RESET#
H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7
H_D#11
H_D#13
H_D#9
H_D#14
H_D#8
H_D#15
H_D#12
H_D#10
H_D#19
H_D#21
H_D#17
H_D#22
H_D#16
H_D#23
H_D#20
H_D#18
H_D#27
H_D#29
H_D#25
H_D#30
H_D#24
H_D#31
H_D#28
H_D#26
H_D#35
H_D#37
H_D#33
H_D#38
H_D#32
H_D#39
H_D#36
H_D#34
H_D#43
H_D#45
H_D#41
H_D#46
H_D#40
H_D#47
H_D#44
H_D#42
H_D#51
H_D#53
H_D#49
H_D#54
H_D#48
H_D#52
H_D#50
H_D#55
H_D#59
H_D#61
H_D#57
H_D#62
H_D#56
H_D#63
H_D#60
H_D#58
H_A#33H_A#34
H_A#32
H_A#35
H_A#3H_A#4H_A#5H_A#6H_A#7
H_A#11
H_A#8
H_A#10
H_A#12
H_A#9
H_A#13
H_A#15
H_A#17
H_A#14
H_A#21
H_A#18
H_A#20
H_A#22
H_A#19
H_A#26
H_A#23
H_A#25
H_A#27
H_A#24
H_A#31
H_A#28
H_A#30H_A#29
H_A#16
H_PCOMPH_NCOMP
C1XAVDD
C1XAVSS
C4XAVDD
C4XAVSS
NB_GTLREF
PCIE_CLK_NBPCIE_CLK_NB#
SB_PCIE_WAKE#INT_N_A
HDVBP1
HDVBP2
HDVBN1HDVBP0HDVBN0
HDVBN2
HDVAP1HDVAN2HDVAP2
HDVAN1HDVAP0HDVAN0
H_DRDY#
H_PWRGOOD
HDVBP1_C
HDVBP2_C
HDVBN1_CHDVBP0_CHDVBN0_C
HDVBN2_C
HDVAP1_CHDVAN2_CHDVAP2_C
HDVAN1_CHDVAP0_CHDVAN0_C
HDVBP1
HDVBP2
HDVBN1HDVBP0HDVBN0
HDVBN2
HDVAP1HDVAN2HDVAP2
HDVAN1HDVAP0HDVAN0
H_HITM#<4>H_HIT#<4>
H_LOCK#<4>
H_DSTBP#0 <5>
H_DSTBN#0 <5>
H_DSTBP#1 <5>
H_DSTBN#1 <5>
H_DSTBP#2 <5>
H_DSTBN#2 <5>
H_DSTBP#3 <5>
H_DSTBN#3 <5>
H_DINV#0 <5>H_DINV#1 <5>H_DINV#2 <5>H_DINV#3 <5>
H_RS#[0..2]<4>
H_REQ#[0..4]<4>
H_CLK_DN1<14>H_CLK_DP1<14>
H_D#[0..63] <5>
H_A#[3..35]<4>
SB_PCIE_WAKE#<21,29,30>INT_N_A<9,19>
PCIE_CLK_NB <14>PCIE_CLK_NB# <14>
H_DEFER#<4>H_TRDY#<4>
H_BR0#<4>
H_ADS#<4>
H_DBSY#<4>H_DRDY#<4>
H_BNR#<4>
H_ADSTB#0<4>H_ADSTB#1<4>
H_BPRI#<4>
H_DPWR#<5>
H_RESET#<4>H_PWRGOOD<5>
HDVBN2_C <18>HDVBP2_C <18>
HDVBN1_C <18>HDVBP1_C <18>
HDVBN0_C <18>HDVBP0_C <18>
HDVAN1_C <18>HDVAP1_C <18>
HDVAN0_C <18>HDVAP0_C <18>
HDVAN2_C <18>HDVAP2_C <18>
+1.8VS +1.8VS
+1.05VS
V_AVDD_PCIE_1.2V
+1.2VS V_AVDD_PCIE_1.2V
+1.05VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
M672MX (1/5)-HOST/PCIECustom
7 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
C1XAVDD:10mA C4XAVDD:12mA
PCIEAVDD:77mA
C218
0.01U_0402_16V7K
1
2
C658 0.1U_0402_10V7K12
C470
0.1U_0402_16V4Z
1
2
C472
0.1U_0402_16V4Z
1
2
T5 PAD
C659 0.1U_0402_10V7K12
C455
10U_0805_10V4Z
1
2
R175 10_0402_5%
C660 0.1U_0402_10V7K12
C479
0.01U_0402_16V7K
1
2
C191
0.01U_0402_16V7K
1
2
C661 0.1U_0402_10V7K12
L22
MBK1608121YZF_06031 2
C662 0.1U_0402_10V7K12
C651 0.1U_0402_10V7K12
T30 PAD
R399 0_0402_5%1 2
C652 0.1U_0402_10V7K12
PCIE
U30D
SISM672MX-A1_TEBGA_847P
PERP0E4PERN0E5PERP1F1PERN1G1PERP2H3PERN2H2PERP3H1PERN3J1
PERN9V1
PETP8 V6
PETP9(HDVBP2) W4
PERP10W1PERN10W2PERP11Y1
PETP10(HDVBP1) Y6
PETP11(HDVBP0) AA4PERN11AA1PERP12AB1 PETP12 AB6
PETP13(HDVAP2) AC4PERN12AB2PERP13AC1PERN13AD1
PETP14(HDVAP1) AD6
PETP15(HDVAP0) AE4
PERP14AE1PERN14AE2PERP15AF1PERN15AG1
PERN8T2PERP9U1
PERP4K1PERN4K2PERP5L1PERN5M1PERP6N1PERN6N2PERP7P1PERN7R1PERP8T1
PETP2 J6
PETP0 G6
PETP1 G4
PETP3 J4
PETP4 L6
PETP5 M4
PETP6 P6
PETP7 P4
PETN0 H6
PETN1 G5
PETN2 K6
PETN3 J5
PETN4 M6
PETN5 M5
PETN6 R6
PETN7 P5
PETN8 W6
PETN9(HDVBN2) W5
PETN10(HDVBN1) AA6
PETN11(HDVBN0) AA5
PETN12 AC6
PETN13(HDVAN2) AC5
PETN14(HDVAN1) AE6
PETN15(HDVAN0) AE5
PCIEAVDDP7PCIEAVDDR7PCIEAVDDT7PCIEAVDDU7PCIEAVDDV7
PME#D7INTX#G16
REFCLK+ T5REFCLK- T4
C653 0.1U_0402_10V7K12
L39
MBK1608121YZF_06031 2
R210
75_0402_1%
12
R400 0_0402_5%1 2
C654 0.1U_0402_10V7K12
C200
0.1U_0402_16V4Z
1
2
C655 0.1U_0402_10V7K12
C481
0.01U_0402_16V7K
1
2
R202
150_0402_1%
12
Host
U30C
SISM672MX-A1_TEBGA_847P
PCREQ#R34
DPWR#E21
EDRDY#P32
C1XAVDDB16C1XAVSSC17
C4XAVDDA17C4XAVSSB18
CPUCLKF18CPUCLK#G18
HTRDY#P31
BPRI#N30BREQ0#P33
HLOCK#L32DEFER#P30
CPUPWRGDP28 CPURST#F21
RS0#K34RS1#M31RS2#K33
DRDY#M33
BNR#M32 DBSY#L34
HIT#N32 HITM#N34 ADS#M34
HREQ0#T34HREQ1#R30HREQ2#R29HREQ3#R32HREQ4#P34
HASTB0#U34HASTB1#AA34
HD0# N29HD1# M30HD2# M28HD3# L30HD4# L29HD5# K28HD6# K31HD7# K30HD8# H31HD9# G34
HD10# H32HD11# G32HD12# K32HD13# F34HD14# F33HD15# F32HD16# H28HD17# J30HD18# H30HD19# G29HD20# J29HD21# G30HD22# F30HD23# D33HD24# D34HD25# B32HD26# B33HD27# C34HD28# D31HD29# A32HD30# A31HD31# C31HD32# B30HD33# C30HD34# A30HD35# D28HD36# G28HD37# C29HD38# C28HD39# E28HD40# E27HD41# C27HD42# G26HD43# E26HD44# D26HD45# B26HD46# A26HD47# C26HD48# G22HD49# C24HD50# A25HD51# B24HD52# C25HD53# A24HD54# E23HD55# E25HD56# G24HD57# D22HD58# C22HD59# E22HD60# C23HD61# A23HD62# A22HD63# B22
HA3#T32HA4#T28HA5#T31HA6#T33HA7#T30HA8#U32HA9#U30HA10#V34HA11#U29HA12#V33HA13#V32HA14#V28HA15#V31HA16#W34HA17#Y33HA18#W32HA19#V30HA20#W30HA21#Y34HA22#Y28HA23#W29HA24#Y32HA25#Y30HA26#Y31HA27#AA32HA28#AA30HA29#AA29HA30#AB33HA31#AB34HA32#AB32HA33#AC34HA34#AB30HA35#AB31
DBI0# J32DBI1# E32DBI2# F27DBI3# F23
HDSTBN0# H33HDSTBN1# E31HDSTBN2# B28HDSTBN3# D24
HDSTBP0# H34HDSTBP1# D32HDSTBP2# A28HDSTBP3# E24
HPCOMP A21HNCOMP C21
HVREFW24HVREFU24HVREFR24HVREFN24HVREFL21
C656 0.1U_0402_10V7K12
L40
MBK1608121YZF_06031 2
C201
0.1U_0402_16V4Z
1
2
C657 0.1U_0402_10V7K12R188 110_0402_1%
C454
10U_0805_10V4Z
1
2
C212
0.01U_0402_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDRA_SDQ2DDRA_SDQ3
DDRA_SDQ0DDRA_SDQ1
DDRA_SDQ7DDRA_SDQ6DDRA_SDQ5DDRA_SDQ4
DDRA_SDQ40DDRA_SDQ41DDRA_SDQ42DDRA_SDQ43DDRA_SDQ44DDRA_SDQ45DDRA_SDQ46DDRA_SDQ47
DDRA_SDQ12
DDRA_SDQ14DDRA_SDQ15
DDRA_SDQ13
DDRA_SDQ8DDRA_SDQ9DDRA_SDQ10DDRA_SDQ11
DDRA_SDQ48DDRA_SDQ49DDRA_SDQ50DDRA_SDQ51DDRA_SDQ52DDRA_SDQ53DDRA_SDQ54DDRA_SDQ55
DDRA_SDQ22DDRA_SDQ21
DDRA_SDQ17DDRA_SDQ18
DDRA_SDQ23
DDRA_SDQ16
DDRA_SDQ19DDRA_SDQ20
DDRA_SDQ56DDRA_SDQ57DDRA_SDQ58DDRA_SDQ59DDRA_SDQ60DDRA_SDQ61DDRA_SDQ62DDRA_SDQ63
DDRA_SDQ27DDRA_SDQ26
DDRA_SDQ29
DDRA_SDQ31DDRA_SDQ30
DDRA_SDQ24DDRA_SDQ25
DDRA_SDQ28
DDRA_SDQ32DDRA_SDQ33DDRA_SDQ34DDRA_SDQ35DDRA_SDQ36DDRA_SDQ37DDRA_SDQ38DDRA_SDQ39
DDRA_SMA12DDRA_SMA11
DDRA_SMA13
DDRA_SBS2
DDRA_SBS0DDRA_SBS1
DDRA_SMA3
DDRA_SMA7
DDRA_SMA0
DDRA_SMA2
DDRA_SMA10
DDRA_SMA1
DDRA_SMA6DDRA_SMA5DDRA_SMA4
DDRA_SMA8DDRA_SMA9
DDRA_SCAS#DDRA_SRAS#
DDRA_SWE#
DDRA_SDQS5
DDRA_SDQS0
DDRA_SDQS4
DDRA_SDQS3
DDRA_SDQS7
DDRA_SDQS2
DDRA_SDQS6
DDRA_SDQS1
DDRA_SDQS5#
DDRA_SDQS0#
DDRA_SDQS4#
DDRA_SDQS3#
DDRA_SDQS7#
DDRA_SDQS2#
DDRA_SDQS6#
DDRA_SDQS1#
DDRA_SDM6
DDRA_SDM5
DDRA_SDM0
DDRA_SDM4
DDRA_SDM1
DDRA_SDM7
DDRA_SDM2
DDRA_SDM3
DDRA_SDM[0..7]
DDRA_SMA[0..14]
DDRA_SDQ[0..63]
D4XAVSS
D1XAVDD
D4XAVDD
D1XAVSS
CLK_INCCLK_INT
DDRA_SCS0#
DDRA_SCS2#DDRA_SCS3#
DDRA_CKE0DDRA_CKE1
DDRA_CKE3DDRA_CKE2
DDRA_ODT1DDRA_ODT0
DDRA_ODT2DDRA_ODT3
DDRA_SCS1#
DDRVREF
DDRCOMPDDRCOMN
OCDVREFPOCDVREFN
DDRVREF
OCDVREFP OCDVREFN
D1XAVDD
D1XAVSS
D4XAVDD
D4XAVSSDDRA_SMA14
S3AUXSW#
DDRA_SBS2 <12,13>
DDRA_SBS0 <12,13>DDRA_SBS1 <12,13>
DDRA_SCAS# <12,13>DDRA_SRAS# <12,13>
DDRA_SWE# <12,13>
DDRA_SDQ[0..63] <12,13>
DDRA_SDM[0..7] <12,13>
CLK_INC <15>CLK_INT <15>
DDRA_CKE0 <12>DDRA_CKE1 <12>DDRA_CKE2 <13>DDRA_CKE3 <13>
DDRA_SCS0# <12>DDRA_SCS1# <12>DDRA_SCS2# <13>DDRA_SCS3# <13>
DDRA_ODT0 <12>DDRA_ODT1 <12>DDRA_ODT2 <13>DDRA_ODT3 <13>
DDRA_SDQS2<12,13>
DDRA_SDQS4<12,13>
DDRA_SDQS3<12,13>
DDRA_SDQS6<12,13>
DDRA_SDQS5#<12,13>
DDRA_SDQS2#<12,13>
DDRA_SDQS4#<12,13>
DDRA_SDQS6#<12,13>
DDRA_SDQS7<12,13>DDRA_SDQS7#<12,13>
DDRA_SDQS5<12,13>
DDRA_SDQS3#<12,13>
DDRA_SDQS1<12,13>DDRA_SDQS1#<12,13>
DDRA_SDQS0<12,13>DDRA_SDQS0#<12,13>
DDRA_SMA[0..14] <12,13>
S3AUXSW# <31>
+1.8V
+1.8V +1.8V
+1.8VS
+1.8VS
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
M672MX (2/5)-DDRCustom
8 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Place C233 under M672MXsolder side.
D1XAVDD:7mA
D4XAVDD:10mA
R276
1K_0402_1%
12
DRAM
U30B
SISM672MX-A1_TEBGA_847P
DQS6A#AM15
DQS5A#AM17
DQM5AAM18
DQM0AAD28
MD1AAD30 MD0AAD31
MD3AAE29
MD7AAE30
MD4AAE32
MD6AAF31
DQS0AAF32DQS0A#AF33
MD5AAF34
MD2AAG34
MA0A AH24
DQS1AAH32DQS1A#AH33
DQM1AAH34
DDRCOMP AJ25
DQM4AAK21
MA7A AK25
DDRCOMN AK26
DQS2AAK33
MA3A AL25
DQS2A#AL34
MA2A AM25
MA5A AM26
DQS3AAM30DQS3A#AM31
MA11A AN24
MA6A AN26
MA15A AN28
DQM3AAN32
MA16A AP21
MA1A AP25
MA4A AP26
MA17A AP29
DQM2AAJ30
DQM6AAH16
DQS4A#AL19
MA12A AP24MA13A AM28MA14A AM27
MA8A AP27MA9A AP28
MA10A AK24
DQS4AAK19
DQS5AAL17
DQS6AAL15
OCDVREFN AJ29OCDVREFP AH28
MD8AAF28MD9AAJ34MD10AAH31MD11AAG30MD12AAF30MD13AAG32MD14AAJ32MD15AAJ31
MD16AAK34MD17AAH30MD18AAL32MD19AAM33MD20AAK32MD21AAG29MD22AAM34MD23AAL31
MD24AAM32MD25AAP32MD26AAP31MD27AAM29MD28AAK30MD29AAK29MD30AAJ27MD31AAK28
MD32AAK20MD33AAM20MD34AAM19MD35AAJ19MD36AAN20MD37AAJ21MD38AAP19MD39AAH20
MD40AAK18MD41AAJ17MD42AAK17MD43AAP16MD44AAH18MD45AAP18MD46AAN18MD47AAP17
MD48AAN16MD49AAK16MD50AAN14MD51AAJ15MD52AAP15MD53AAM16MD54AAK15MD55AAP14
MD56AAL13MD57AAM13MD58AAM12MD59AAJ13MD60AAM14MD61AAK14MD62AAN12MD63AAH14DQM7AAK13DQS7AAP12DQS7A#AP13
D1XAVSS B15D1XAVDD A15
D4XAVSS AP10D4XAVDD AP11
RASA# AM23CASA# AP22WEA# AJ23
FWDSDCLKOA AK12FWDSDCLKOA# AH12
CS0A# AP23CS1A# AH22CS2A# AM22CS3A# AM21
ODT0A AK22ODT1A AP20ODT2A AN22ODT3A AL21
CKEA0 AN30CKEA1 AP30CKEA2 AH26CKEA3 AK27
S3AUXSW# B6
DDRVREF0 AD18DDRVREF1 AD23
R224
36_0402_1%
12
R227 36_0402_1%
C582
0.1U_0402_16V4Z
1
2
C238
0.1U_0402_16V4Z
1
2
R409 0_0402_5%1 2
L41
MBK1608121YZF_06031 2
C583
10U_0805_10V4Z
1
2
C251
0.1U_0402_16V4Z
1
2
C581
0.01U_0402_16V7K
1
2
R511
36_0402_1%
12
C480
0.1U_0402_16V4Z
1
2
R225 36_0402_1%
C471
0.01U_0402_16V7K
1
2
R501
1K_0402_1%
12
R277
40.2_0402_1%
12
C456
10U_0805_10V4Z
1
2
C233
1U_0603_10V4Z
1
2
R473 0_0402_5%1 2
L52
MBK1608121YZF_06031 2
R228
40.2_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ZAD0ZAD1ZAD2ZAD3ZAD4ZAD5ZAD6ZAD7ZAD8ZAD9ZAD10ZAD11ZAD12ZAD13ZAD14ZAD15ZAD16
Z_CLK0
ZSTB_DN0ZSTB_DP0
ZSTB_DN1ZSTB_DP1
ZDREQZUREQ
A_HSYNC
Z4XAVSSZ4XAVDD
Z_COMP_N
Z_VREFZ_COMP_P
A_VSYNC
A_DDC1DATA_DDC1CLK
VGA_CRT_GVGA_CRT_R
VGA_CRT_B
INTA#
VOSCI
DACAVSS1
ECLKAVDD
DACAVDD1
VCOMP
VRSET
DCLKAVDD
ECLKAVSS
DCLKAVSS
VVBWN
DACAVDD2DACAVSS2
DACAVDD1
DCLKAVDD
DCLKAVSS
GMCH_CRT_CLK
Z4XAVDD
Z4XAVSS
Z_VREF
AGPSTOP#AGPBUSY#
VBHCLK
VBHSYNCVBVSYNC
VBCLKVBCAD
SB_PWRGDAUX_PWRGD
NB_RST#
NB_ENTEST
SB_PWRGD
AUX_PWRGD
AGPBUSY#
VGA_CRT_VSYNCVGA_CRT_HSYNC
GMCH_CRT_DATA
ECLKAVDD
ECLKAVSS
DACAVSS1
DACAVDD2
DACAVSS2
VCOMP
VVBWN
VRSET
ZAD[0..16]
VACLKH_VACLKVGA_CRT_HSYNC<17>
REF_CLK0<14>
VGA_CRT_VSYNC<17>
VGA_CRT_R<17>VGA_CRT_G<17>VGA_CRT_B<17>
INT_N_A<7,19>
Z_CLK0<14>
ZDREQ<19>ZUREQ<19>
ZSTB_DP0<19>ZSTB_DN0<19>ZSTB_DP1<19>
ZSTB_DN1<19>
AUX_PWRGD <20,31>SB_PWRGD <20,31>NB_RST# <18,19>
AGPSTOP# <20>
VBVSYNC <18>VBHSYNC <18>
VBCLK <18>
VBHCLK <18>
AGPBUSY# <20>
GMCH_CRT_DATA<17>GMCH_CRT_CLK<17>
VBCAD <18>
ZAD[0..16]<19>
VACLK <18>
+3VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8VS
+1.8VS+1.8VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
M672MX (3/5)-ASLCustom
9 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
For SiS VB 307 use only
Z4XAVDD:10mA
DCLKAVDD:5mA
ECLKAVDD:5mA
DACAVDD1:73mA
DACAVDD2:73mA
DACAVDD1 Spec.Voltage : 1.5V +/- 5%Current : 100mA
7/24 modified7/30 modified to @
C469
0.01U_0402_16V7K
1
2
R178
390_0402_5%
12
R230 56_0402_5%1 2
R396 0_0402_5%1 2
L45
MBK1608121YZF_06031 2
C461
1U_0603_10V4Z@
1
2
C252
10U_0805_10V4Z
1
2
C249
0.1U_0402_16V4Z
1
2
R395
3.3_0402_5%
C178 0.1U_0402_16V4Z1 2
C177 0.1U_0402_16V4Z1 2
L24
MBK1608121YZF_06031 2
C250
0.1U_0402_16V4Z
1
2
R183 0_0402_5%1 2
C174
10U_0805_10V4Z
1
2
R185 0_0402_5%1 2
R196 0_0402_5%1 2
R406 0_0402_5%1 2
C248
0.01U_0402_16V7K
1
2
C180 0.1U_0402_16V4Z1 2
C484
0.1U_0402_16V4Z
1
2
C483
0.1U_0402_16V4Z
1
2
R231 0_0402_5%1 2
R415 0_0402_5%1 2
C181 0.1U_0402_16V4Z1 2
C491
10U_0805_10V4Z
1
2
C490
1U_0603_10V4Z
1
2
R174 130_0402_5%1 2
R472 56_0402_5%1 2
R216 4.7K_0402_5%1 2
R177
0_0402_5%1 2
C463
0.1U_0402_16V4Z@
1
2
C485
0.01U_0402_16V7K
1
2
L42
MBK1608121YZF_06031 2
ASL
U30A
SISM672MX-A1_TEBGA_847P
ZAD16AM8
ZCMP_NAM9
Z4XAVDDAM10
ZUREQAN8
Z4XAVSSAN10
ZSTB1AP4ZSTB1#AP5
ZDREQAP8
ZCMP_PAP9
ZCLKAH10
ZSTB0#AL7
ZVREFAL9
ZSTB0AM7
ZAD0AK10ZAD1AM6ZAD2AK11ZAD3AJ11ZAD4AP7ZAD5AJ9ZAD6AP6ZAD7AN6ZAD8AK9ZAD9AM4ZAD10AK6ZAD11AK8ZAD12AN4ZAD13AK7ZAD14AL5ZAD15AM5
ROUTD13GOUTC12BOUTC13
VSYNCG12 HSYNCF12
VGPIO0D11VGPIO1E12
VCOMPD15
VRSETC14 VVBWNC15
VOSCIF11
INTA#F13
DACAVDD1A12DACAVSS1B12
DACAVDD2A13DACAVSS2B13
DCLKAVDDB10DCLKAVSSA11
ECLKAVDDA9
ENTEST F15
TESTMODE0 D16TESTMODE1 E16TESTMODE2 F16
TRAP0 D17TRAP1 E17TRAP2 F17
TRAP3 AC32TRAP4 AD34TRAP5 AB28TRAP6 AD32TRAP7 AD33TRAP8 AE34TRAP9 AC30
TRAP10 AC29
AUXOK A5PWROK C6
PCIRST# A7
AGPBUSY# A6
VACLK D9
VBCLK C8VBCAD E9
VBHCLK E7
VBVSYNC D8VBHSYNC F7
NC0 AH2NC1 AG3
ECLKAVSSB8
AGPSTOP# G14
C453
10U_0805_10V4Z@
1
2
C67
0.1U_0402_16V4Z
1
2
R182 0_0402_5%1 2
C467
10U_0805_10V4Z
1
2
R195 0_0402_5%1 2
C468
0.1U_0402_16V4Z
1
2
R179
390_0402_5%
12 R559 33_0402_5%1 2
R193 4.7K_0402_5%1 2
R184 0_0402_5%1 2
R232
150_0402_1%
12
R229
49.9_0402_1%
12
R383 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8V
+1.8VS
+1.8VS
+1.8VS
+1.2VS
+1.2VALW
+1.8VALW
+1.8VS
+1.05VS
+1.2VS+1.8V +1.2VS +1.8VALW +1.2VALW
+1.8VS +1.2VS
+1.8VALW +1.2VALW
+1.8VS +1.2VS +1.05VS
+1.8V +1.2VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
M672MX (4/5)-POWERCustom
10 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Place these Cap under M672MX solder side.
IVDD:2024mA
VTT:80mAPVDDH/VCC1.8/VTTP/VDD1.8/VDDVB1.8:392mA
VCCM:644mA
VDDPEX:876mA
AUX1.8:1mA AUX_IVDD:92mA
C184 1U_0603_10V4Z1 2
C232 0.1U_0402_16V4Z1 2
C244 1U_0603_10V4Z1 2
C198 0.1U_0402_16V4Z1 2
C182
1U_0603_10V4Z
1
2
C247 10U_0805_10V4Z1 2
C190
1U_0603_10V4Z
1
2
C202 0.1U_0402_16V4Z1 2
C225 1U_0603_10V4Z1 2
C220 1U_0603_10V4Z1 2
C230 0.1U_0402_16V4Z1 2
C236 4.7U_0805_10V4Z1 2
C197 0.1U_0402_16V4Z1 2
C246 10U_0805_10V4Z1 2
C227 1U_0603_10V4Z1 2
C242 4.7U_0805_10V4Z1 2
C213 1U_0603_10V4Z1 2
C237 4.7U_0805_10V4Z1 2
C229 10U_0805_10V4Z1 2
C196 4.7U_0805_10V4Z1 2
C204 0.1U_0402_16V4Z1 2
C231 0.1U_0402_16V4Z1 2
C243 10U_0805_10V4Z1 2
C188 0.1U_0402_16V4Z1 2
C176 10U_0805_10V4Z1 2
C192 1U_0603_10V4Z1 2
C226 0.1U_0402_16V4Z1 2
C187
1U_0603_10V4Z
1
2
C234 1U_0603_10V4Z1 2
C183
1U_0603_10V4Z
1
2
C193 1U_0603_10V4Z1 2
C195 1U_0603_10V4Z1 2
C245 1U_0603_10V4Z1 2
C240 1U_0603_10V4Z1 2
C223 1U_0603_10V4Z1 2
C221 1U_0603_10V4Z1 2
C239 1U_0603_10V4Z1 2
PWR
U30E
SISM672MX-A1_TEBGA_847P
VCC1.8AB12VCC1.8AB13VCC1.8AC12VCC1.8AC13VCC1.8AC14VCC1.8AC15VCC1.8AH6VCC1.8AH7VCC1.8AJ4VCC1.8AJ5VCC1.8AJ6VCC1.8AJ7VCC1.8AN2VCC1.8AK4VCC1.8AK5VCC1.8AL1VCC1.8AL2VCC1.8AL3VCC1.8AL4VCC1.8AM1VCC1.8AM2VCC1.8AM3VCC1.8AN3VCC1.8AN5VCC1.8AN7VCC1.8AN9
VDDVB1.8E8
VDD1.8E10
VDDVB1.8F9
VDD1.8F10
VDDVB1.8F8
IVDD AB18IVDD AB20
PVDDHP20PVDDHP22PVDDHR21PVDDHT22PVDDHU21PVDDHV22
VDDPEXM11VDDPEXN11VDDPEXP11VDDPEXR11VDDPEXT11VDDPEXU11VDDPEXV11VDDPEXW11VDDPEXY11VDDPEXAA11VDDPEXAB11
AUX_IVDDD6
AUX1.8G8
PVDDHN19PVDDHN21
VCCMW23VCCMY23VCCMAA23VCCMAB23VCCMAC23VCCMAC18VCCMAC20VCCMAC16VCCMAD16VCCMAD17VCCMAD19VCCMAD20VCCMAD21VCCMAD22VCCMAJ22VCCMAJ24VCCMAL23
VCCMAN21VCCMAN23VCCMAN25VCCMAN27VCCMAN29
IVDD AA13IVDD AA22IVDD AB14IVDD AB15IVDD AB16
IVDD AB22IVDD AF6IVDD AF7IVDD AK3IVDD AG4IVDD AG5IVDD AG6IVDD AG7IVDD R13IVDD AH3IVDD AH4IVDD AH5IVDD AJ1IVDD AJ2IVDD AJ3IVDD AK1IVDD AK2IVDD AC22IVDD AC21IVDD AC19IVDD AC17
VTT A19VTT A20VTT B19VTT B20VTT C19VTT C20VTT D19VTT D20VTT E19VTT E20VTT F19VTT F20VTT G19VTT G20VTT L18VTT L19VTT L20VTT M20VTT M21VTT M22VTT M23VTT N23VTT P23VTT R23VTT T23VTT U23VTT V23
VTTP M12VTTP N12VTTP P12VTTP R12VTTP T12VTTP U12VTTP V12VTTP W12VTTP Y12VTTP AA12
VCC1.8AP3
IVDD M13IVDD M14IVDD M15IVDD M16IVDD M17IVDD M18IVDD M19IVDD N16IVDD N17IVDD N18IVDD N20IVDD R22IVDD N22IVDD N13IVDD P13IVDD Y13IVDD Y22IVDD T13IVDD U13IVDD U22IVDD V13IVDD W13IVDD W22
AUX_IVDDC5 AUX_IVDDB5
VCCMAL26
C235 1U_0603_10V4Z1 2
C179 1U_0603_10V4Z1 2
C209 0.1U_0402_16V4Z1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
M672MX (5/5)-GNDCustom
11 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
GND
U30F
SISM672MX-A1_TEBGA_847P
VSSA3VSSB2VSSB3VSSB4
VS
SA
A16
VS
SA
A17
VS
SA
A18
VS
SA
A19
VS
SA
A20
VS
SA
A21
VS
SA
A31
VS
SA
A33
VS
SA
B3
VS
SA
B4
VS
SA
B5
VS
SA
G2
VS
SA
G31
VS
SA
G33
VS
SA
H29
VSSB21VSSB23VSSB25VSSB27VSSB29VSSB31VSSC1VSSC2VSSC3VSSC4
VS
SA
B7
VS
SA
B29
VS
SA
C2
VS
SA
C3
VS
SA
C31
VS
SA
C33
VS
SA
D2
VS
SA
D3
VS
SA
D4
VS
SA
D5
VS
SA
D7
VS
SA
D29
VS
SA
E3
VS
SA
E31
VS
SA
E33
VS
SA
F2V
SS
AF3
VS
SA
F4V
SS
AF5
VS
SA
F29
VS
SA
J8V
SS
AJ1
0V
SS
AJ1
2V
SS
AJ1
4V
SS
AJ1
6V
SS
AJ1
8V
SS
AJ2
0V
SS
AJ2
6V
SS
AJ2
8V
SS
AJ3
3V
SS
AK
31V
SS
AL6
VS
SA
L8V
SS
AL1
0V
SS
AL1
2V
SS
AL1
4V
SS
AL1
6V
SS
AL1
8V
SS
AL2
0
VS
SA
L28
VS
SA
L30
VS
SA
L33
VS
SA
N11
VS
SA
N13
VS
SA
N15
VS
SA
N17
VS
SA
H1
VSS T29VSS U2VSS U3VSS U4VSS U5VSS U6VSS U14VSS U15VSS U16VSS U17VSS U18VSS U19VSS U20VSS U31VSS U33VSS V2VSS V3VSS V4VSS V5VSS V14VSS V15VSS V16VSS V17VSS V18VSS V19VSS V20VSS V29VSS AN33VSS AN31VSS AN19VSS W3VSS W14VSS W15VSS W16VSS W17VSS W18VSS W19VSS W20VSS W21VSS W31VSS W33VSS Y2VSS Y3VSS Y4VSS Y5VSS Y7VSS Y14VSS Y15VSS Y16VSS Y17VSS Y18VSS Y19VSS Y20VSS Y21VSS Y29VSS AA2VSS AA3VSS AA14VSS AA15
VS
SH
5V
SS
H29
VS
SJ2
VS
SJ3
VS
SJ7
VS
SJ3
1V
SS
J33
VS
SK
3V
SS
K4
VS
SK
5V
SS
K29
VS
SL2
VS
SL3
VS
SL4
VS
SL5
VS
SL7
VS
SL3
1V
SS
L33
VS
SM
2V
SS
M3
VS
SM
29V
SS
N3
VS
SN
4V
SS
N5
VS
SN
6V
SS
N7
VS
SN
14V
SS
N15
VS
SN
31V
SS
N33
VS
SP
2V
SS
P3
VS
SP
14V
SS
P15
VS
SP
16V
SS
P17
VS
SP
18V
SS
P29
VS
SR
2V
SS
R3
VS
SR
4V
SS
R5
VS
SR
14V
SS
R15
VS
SR
16V
SS
R17
VS
SR
18V
SS
R19
VS
SR
20V
SS
R31
VS
SR
33V
SS
T3V
SS
T6V
SS
T14
VS
ST1
5V
SS
T16
VS
ST1
7V
SS
T18
VS
ST1
9V
SS
T20
VS
SG
31V
SS
G33
VS
SH
4
VSSC9VSSC10VSSC11VSSC16VSSC18VSSC32VSSC33VSSD1VSSD2VSSD3VSSD4VSSD5VSSD10VSSD12VSSD21VSSD23VSSD25VSSD27VSSD29VSSE1VSSE2VSSE3VSSE6VSSE11VSSE13VSSE14VSSE18VSSE29VSSE30VSSE33VSSF2VSSF3VSSF4VSSF5VSSF6VSSF14VSSF22VSSF24VSSF26VSSF28VSSG2VSSG3VSSG7VSSG10 VSS AB17
VSS AB19VSS AB21VSS P19
VSSP21VSST21VSSV21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDRA_SMA[0..14]
DDRA_SDM[0..7]
DDRA_SDQ[0..63]
DDRA_SMA2
DDRA_SMA6
DDRA_SMA10
DDRA_SMA8
DDRA_SMA11
DDRA_SBS1
DDRA_SWE#
DDRA_SMA13DDRA_ODT0
DDRA_SCS1#
DDRA_SCS0#
DDRA_SDM5
DDRA_SMA10
DDRA_SDQ8
DDRA_SDQ55
DDRA_SDM6
DDRA_SDQ29
DDRA_SDQ12
DDRA_SDQ4
DDRA_SDM7
DDRA_SDQ48
DDRA_SDQS4
DDRA_SBS0
DDRA_SMA3
DDRA_SDQ0
DDRA_SDQ39
DDRA_SDQ32
DDRA_SMA12
DDRA_SDQS2#
DDRA_SDQS0#
DDRA_SDQ58
DDRA_SDQ56
DDRA_SDQ33
DDRA_SCS1#
DDRA_SMA5
DDRA_SDQ19
DDRA_SDQ62
DDRA_SDQ54
DDRA_SDM4
DDRA_SDQ21
DDRA_SDQ15
DDRA_SDQ57
DDRA_SMA1
DDRA_SDQ53
DDRA_SDQ14
DDRA_SDM0
DDRA_SDQ5
DDRA_SDQ59
DDRA_SDQS4#
DDRA_SMA8
DDRA_SDQ25
DDRA_SDQ38
DDRA_SDQ31
DDRA_SDQ28
DDRA_SDM2
DDRA_SDQ7
DDRA_SDQ49
DDRA_SDQS0
DDRA_SDQ1
DDRA_SDQS7
DDRA_SCS0#
SDATADDRA_SDQ63
DDRA_SDQ61
DDRA_SMA6
DDRA_SDQ6
DDRA_SDQS6#
DDRA_SDQ43
EC_RX_P80_CLK
DDRA_SDQ27
DDRA_SDQS1
DDRA_SDQ9
DDRA_SDQ60
DDRA_SDQ52
DDRA_ODT0
DDRA_SDQ23
DDRA_SDQ3
DDRA_SDQ37
DDRA_SMA13
DDRA_SMA14
DDRA_SDQ30
DDRA_SDQS3#
DDRA_SDQ40
DDRA_SDQ16
DDRA_SDQ2
DDRA_SDQS5
DDRA_SMA11
DDRA_SWE#
DDRA_SMA9
DDRA_SDQ17
DDRA_SDQ10
DDRA_SDQ46
DDRA_SDQ45
DDRA_SRAS#
DDRA_SMA0
DDRA_SDQS3
DDRA_SDQ20
DDRA_SDQ13
DDRA_SDQ42
DDRA_SDQ35
DDRA_SBS2
DDRA_SDQS1#
EC_RX_P80_CLK_R
DDRA_SDQ22
DDRA_ODT1
DDRA_SDQS5#
DDRA_SDQ36
DDRA_SBS1
DDRA_SMA7
DDRA_SDQ24
DDRA_SDQ18
DDRA_SDQS7#
DDRA_SMA4
DDRA_SDM1
DDRA_SDQS6
DDRA_SDQ41
DDRA_CKE0
DDRA_SDQ26
EC_TX_P80_DATADDRA_SDM3
DDRA_SDQS2
DDRA_SDQ47
DDRA_SDQ44
DDRA_SMA2
DDRA_CKE1
DDRA_SDQ51DDRA_SDQ50
DDRA_SDQ34
DDRA_SCAS#
DDRA_SDQ11
DDRA_SMA1
DDRA_SBS0
DDRA_SCAS#
DDRA_ODT1
DDRA_SMA14
DDRA_SMA7
DDRA_SMA4
DDRA_SMA0
DDRA_SRAS#
DDRA_CKE1
EC_RX_P80_CLKEC_RX_P80_CLK_R
DDR_CLK0DDR_CLK0#
DDR_CLK1DDR_CLK1#
SCLK
DDRA_CKE0DDRA_SBS2
DDRA_SMA9DDRA_SMA12
DDRA_SMA5
DDRA_SMA3
DDRA_SCAS#<8,13>
DDRA_SWE#<8,13>
DDRA_SCS1#<8>
DDRA_CKE0<8>
DDRA_SBS0<8,13>DDRA_SCS0# <8>DDRA_SRAS# <8,13>DDRA_SBS1 <8,13>
DDRA_ODT1<8>
DDRA_ODT0 <8>
DDRA_CKE1 <8>
DDRA_SDQ[0..63]<8,13>
SDATA<13,14,15,20>SCLK<13,14,15,20>
DDRA_SBS2<8,13>EC_RX_P80_CLK<13,31>
EC_TX_P80_DATA<13,31>
EC_RX_P80_CLK_R<13>
DDRA_SDQS1<8,13>
DDRA_SDQS2<8,13>
DDRA_SDQS4<8,13>
DDRA_SDQS3 <8,13>
DDRA_SDQS1#<8,13>
DDRA_SDQS0<8,13>
DDRA_SDQS6<8,13>
DDRA_SDQS5# <8,13>
DDRA_SDQS0#<8,13>
DDRA_SDQS2#<8,13>
DDRA_SDQS4#<8,13>
DDRA_SDQS6#<8,13>
DDRA_SDQS7 <8,13>DDRA_SDQS7# <8,13>
DDRA_SDQS5 <8,13>
DDRA_SDQS3# <8,13>
DDRA_SMA[0..14]<8,13>
DDRA_SDM[0..7]<8,13>
DDR_CLK0 <15>DDR_CLK0# <15>
DDR_CLK1 <15>DDR_CLK1# <15>
+1.8V +1.8V
+3VS
+DIMM_VREF
+0.9VS
+1.8V
+1.8V
+1.8V
+0.9VS
+0.9VS
+0.9VS
+3VS
+DIMM_VREF
+DIMM_VREF
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
DDRII-SODIMM0B
12 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
DIMM0 STD H:5.2mm (BOT)
20mils
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS
Layout Note:Place near JP35
Layout Note:Place these resistorclosely JP35,alltrace length Max=1.5"
New Add For SiS New Add For SiS
Swap RP11,RP12 Pin 1 & 2
Swap RP6 Pin2 & RP7 Pin 1
R239 10K_0402_5%1 2
C294
0.1U_0402_16V4Z
1
2
C295
0.1U_0402_16V4Z
1
2
RP14 56_0404_4P2R_5%
1 42 3
C269
0.1U_0402_16V4Z
1
2
RP7 56_0404_4P2R_5%
1 42 3
R235
1K_0402_1%
12
C277
2.2U_0603_6.3V6K
C288
0.1U_0402_16V4Z
1
2
C291
0.1U_0402_16V4Z
1
2
RP16 56_0404_4P2R_5%
1 42 3
C297
0.1U_0402_16V4Z
1
2
RP11 56_0404_4P2R_5%
1 42 3
R236
1K_0402_1%
12
RP12 56_0404_4P2R_5%
1 42 3
C305
0.1U_0402_16V4Z
1
2
C281
0.1U_0402_16V4Z
1
2
JP35
P-TWO_A5652C-A0G16
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
C307
0.1U_0402_16V4Z
1
2
C296
2.2U_0603_6.3V6K
C280
2.2U_0603_6.3V6K
R241 56_0402_5%1 2
RP6 56_0404_4P2R_5%
1 42 3
C286
0.1U_0402_16V4Z
1
2
RP13 56_0404_4P2R_5%
1 42 3
+ C304
330U_D2E_2.5VM@
1
2
RP8 56_0404_4P2R_5%
1 42 3
C270
220P_0402_50V7K@
1
2
C284
0.1U_0402_16V4Z
1
2
C306
0.1U_0402_16V4Z
1
2
+ C303
330U_D2E_2.5VM@
1
2
C299
0.1U_0402_16V4Z
1
2RP15 56_0404_4P2R_5%
1 42 3
C285
2.2U_0603_6.3V6K
C293
2.2U_0603_6.3V6K
C290
0.1U_0402_16V4Z
1
2
C308
0.1U_0402_16V4Z
1
2
RP17 56_0404_4P2R_5%
1 42 3
RP9 56_0404_4P2R_5%
1 42 3
C292
0.1U_0402_16V4Z
1
2
C282
2.2U_0603_6.3V6K
R238 10K_0402_5%1 2
C278
0.1U_0402_16V4Z
1
2
R237 0_0402_5%1 2
C283
2.2U_0603_6.3V6K
C298
0.1U_0402_16V4Z
1
2RP18 56_0404_4P2R_5%
1 42 3
C271
0.1U_0402_16V4Z
1
2
C289
0.1U_0402_16V4Z
1
2
C287
0.1U_0402_16V4Z
1
2RP10 56_0404_4P2R_5%
1 42 3
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRA_SDQ54
DDRA_SDQ10
DDRA_SDQ47
DDRA_SDQ22
DDRA_SDQ9
DDRA_SDQ23
DDRA_SDQ42
DDRA_SDQ34
DDRA_SDQ61DDRA_SDQ60
DDRA_SDQ43
DDRA_SDQ35
DDRA_SDQ27
DDRA_SDQ17
DDRA_SDQ26
DDRA_SDQ7
DDRA_SDQ16
DDRA_SDM6
DDRA_SDM1
DDRA_SDQS4
DDRA_SDQ40
DDRA_SDQS2
DDRA_SDQS4#
DDRA_SDQS1DDRA_SDQS1#
DDRA_SDQS6
DDRA_SDQ21
DDRA_SDQS6#
DDRA_SDQ20
DDRA_SDQ1
DDRA_SWE#DDRA_SRAS#
DDRA_SCAS#
DDRA_SMA3DDRA_SMA1
DDRA_SMA6
DDRA_SMA0
DDRA_SMA7
DDRA_SMA2
DDRA_SMA10
DDRA_SMA12
DDRA_SMA5
DDRA_SMA8DDRA_SMA9
DDRA_SCS3#
DDRA_SCS2#
DDRA_SMA11
DDRA_SMA4
DDRA_CKE3
DDRA_SBS0
DDRA_SMA13
DDRA_SBS1
DDRA_CKE2
DDRA_SDQS5
DDRA_SDM3
DDRA_SDQ55
DDRA_SDQS5#DDRA_SDM5
DDRA_SDQS7
DDRA_SDM0
DDRA_SDQS7#
DDRA_SDQ5
DDRA_SDQ58DDRA_SDQ59
DDRA_SDQ36
DDRA_SDQ44
DDRA_SDQ28
DDRA_SDQ18
DDRA_SDQ8
DDRA_SDQ19
DDRA_SDQ62DDRA_SDQ63
DDRA_SDM7
DDRA_ODT2
DDRA_ODT3
DDRA_SDQ53
DDRA_SDM2
DDRA_SDQ52
DDRA_SDQS0#DDRA_SDQS0
DDRA_SDQ2DDRA_SDQ3
DDRA_SDQS3#DDRA_SDQS3
DDRA_SDM4
SCLKSDATA
DDRA_SDQ4
DDRA_SDQ56DDRA_SDQ57
DDRA_SDQ45
DDRA_SDQ37
DDRA_SDQ6
DDRA_SDQ38
DDRA_SDQ46
DDRA_SDQ30DDRA_SDQ31
DDRA_SMA[0..14]
DDRA_SDM[0..7]
DDRA_SDQ[0..63]
DDRA_SDQ39
DDRA_SDQ29DDRA_SDQ25
DDRA_SDQ11
DDRA_SDQ24
EC_RX_P80_CLK
EC_RX_P80_CLK_R
DDRA_SBS2
DDRA_SDQ51DDRA_SDQ50
DDRA_SDQ0
DDRA_SDQ15DDRA_SDQ14
EC_TX_P80_DATA
DDRA_SMA14
DDRA_SDQ49
DDRA_SDQ12
DDRA_SDQ48
DDRA_SDQ32
DDRA_SDQ13
DDRA_SDQ41
DDRA_SDQS2#
DDRA_SDQ33
DDRA_SCS3#DDRA_ODT3
DDRA_CKE2
DDRA_ODT2
DDRA_CKE3
DDRA_SCS2#
DDR_CLK2DDR_CLK2#
DDR_CLK3DDR_CLK3#
DDRA_SCAS#<8,12>
DDRA_SWE#<8,12>
DDRA_SCS3#<8>
DDRA_CKE2<8>
DDRA_SBS0<8,12>DDRA_SCS2# <8>DDRA_SRAS# <8,12>DDRA_SBS1 <8,12>
DDRA_ODT3<8>
DDRA_ODT2 <8>
DDRA_CKE3 <8>
DDRA_SDQ[0..63]<8,12>
SDATA<12,14,15,20>SCLK<12,14,15,20>
DDRA_SBS2<8,12>EC_RX_P80_CLK<12,31>
EC_TX_P80_DATA<12,31>
EC_RX_P80_CLK_R<12>
DDRA_SDQS1<8,12>
DDRA_SDQS2<8,12>
DDRA_SDQS4<8,12>
DDRA_SDQS3 <8,12>
DDRA_SDQS1#<8,12>
DDRA_SDQS0<8,12>
DDRA_SDQS6<8,12>
DDRA_SDQS5# <8,12>
DDRA_SDQS0#<8,12>
DDRA_SDQS2#<8,12>
DDRA_SDQS4#<8,12>
DDRA_SDQS6#<8,12>
DDRA_SDQS7 <8,12>DDRA_SDQS7# <8,12>
DDRA_SDQS5 <8,12>
DDRA_SDQS3# <8,12>
DDRA_SMA[0..14]<8,12>
DDRA_SDM[0..7]<8,12>
DDR_CLK2 <15>DDR_CLK2# <15>
DDR_CLK3 <15>DDR_CLK3# <15>
+1.8V +1.8V
+3VS
+DIMM_VREF
+0.9VS
+1.8V
+1.8V
+0.9VS
+3VS
+DIMM_VREF
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
DDRII-SODIMM1B
13 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
DIMM1 STD H:9.2mm (BOT)
20mils
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS
Layout Note:Place near JP34
Layout Note:Place these resistorclosely JP34,alltrace length Max=1.5"
C267
0.1U_0402_16V4Z
1
2
C262
4.7U_0805_10V4Z
1
2
C258
0.1U_0402_16V4Z
1
2
C253
2.2U_0603_6.3V6K
C259
2.2U_0603_6.3V6K
C260
0.1U_0402_16V4Z
1
2
C261
4.7U_0805_10V4Z
1
2
C264
2.2U_0603_6.3V6K
JP34
P-TWO_A5692A-A0G16-N
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
SAO 198SA1 200
VSS 196
C257
0.1U_0402_16V4Z
1
2
R233 10K_0402_5%1 2
RP3 56_0404_4P2R_5%
1 42 3
C256
2.2U_0603_6.3V6K
R234 10K_0402_5%1 2
C254
2.2U_0603_6.3V6K
C255
2.2U_0603_6.3V6K
C263
2.2U_0603_6.3V6K
C265
0.1U_0402_16V4Z
1
2RP4 56_0404_4P2R_5%
1 42 3
RP5 56_0404_4P2R_5%
1 42 3
C266
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKGEN_VDD
VDDA
XTAL_IN
XTAL_IN
XTAL_OUT
XTAL_OUT
FSL0FSL1
REF_CLK0REF_CLK1
CLK_PCI_SB
FSL3CLK_PCI_1394
FSL4CLK_PCI_EC
STOP#
MODE
CLKREQ0#EXP_CLKREQ#
CLKREQ1#WLAN_CLKREQ#
CK_PWRGDVGATEVTTPWRGD
CLK_RESET#CPUSTP#
SMDATA
SMCLK
SDATA
SCLK
CPUT_L0
CPUC_L0
CPUT_L1
CPUC_L1
H_CLK_DP0
H_CLK_DN1
H_CLK_DN0
H_CLK_DP1
PCIET_L0PCIEC_L0
PCIE_CLK_NBPCIE_CLK_NB#
PCIET_L2PCIEC_L2
PCIE_CLK_SBPCIE_CLK_SB#
PCIET_L3PCIEC_L3
PCIE_CLK_307PCIE_CLK_307#
PCIET_L4FPCIEC_L4F
PCIE_CLK_EXPPCIE_CLK_EXP#
PCIEC_L5FPCIE_CLK_WLANPCIE_CLK_WLAN#
PCIET_L5F
SATACLKC_LSATACLKT_L
SATA_CLK_DNSATA_CLK_DP
ZCLK0ZCLK1
Z_CLK0Z_CLK1
12M USB_CLK_12M
FSL2
Z_CLK0Z_CLK1CLK_PCI_SBCLK_PCI_1394CLK_PCI_ECCLK_PCI_DBREF_CLK0REF_CLK1
MODE
CLK_RESET#
VTTPWRGD
CLKGEN_VDD
FSL0FSL1FSL2
FSL1
FSL2
FSL3
FSL4
FSL0
SDATA
SCLK
DDATA
DCLK
CLK_14M_SIO
CLK_PCI_DB PCICLK7
STOP#
VBRCLK
REF_CLK0<9>REF_CLK1<20>
CLK_PCI_SB<19>
CLK_PCI_1394<26>
CLK_PCI_EC<31>
CPUSTP#<25>
VGATE<48>
SCLK<12,13,15,20>
SDATA<12,13,15,20>
H_CLK_DP0 <4>
H_CLK_DN0 <4>
H_CLK_DP1 <7>
H_CLK_DN1 <7>
PCIE_CLK_SB <20>PCIE_CLK_SB# <20>
PCIE_CLK_307 <18>PCIE_CLK_307# <18>
PCIE_CLK_EXP <30>PCIE_CLK_EXP# <30>
PCIE_CLK_WLAN <29>PCIE_CLK_WLAN# <29>
SATA_CLK_DP <21>SATA_CLK_DN <21>
Z_CLK0 <9>Z_CLK1 <19>
USB_CLK_12M <21>
PCIE_CLK_NB <7>PCIE_CLK_NB# <7>
H_BSEL0<5>H_BSEL1<5>H_BSEL2<5>
DDATA<29,30>
DCLK<29,30>
EXP_CLKREQ#<30>
WLAN_CLKREQ#<29>
CLK_14M_SIO<33>
CLK_PCI_DB<33>
VBRCLK<18>
+3VS
+3VS
+3VS
+3VS +3VS+CPU_CORE
+3VS
+3VS
+3VS+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Clock Generator ICS9LPR600CCustom
14 49Thursday, September 06, 2007
2005/03/01 2006/03/01
Use SB03904008L & SB000006A00 FootPrint
NB
SB
307LV
NewCard
WLAN
SB1394
ECDB
Part no.SD028270180
Reference schematic use 1206
Pin 26 need BIOS to set disable,
for saving power & good EMI
1
1000
100
1
PCIMHz
133
0
PCIEMHz
33.3
CPUMHz
33.30
FSL0
166
FSL2
1
FSL1FSL3FSL4 ZCLKMHz
0 1 0 200 100 33.30 1 133
0
0
1
1
133
133
R103 33_0402_5%1 2
C99
0.1U_0402_16V
4Z
1
2
R87 33_0402_5%1 2
R50 33_0402_5%1 2
R67 0_0402_5%1 2
R94 33_0402_5%1 2
ICS9LPR600
U4
ICS9LPR600BGLF-T_TSSOP56
VTTPWRGD/PD#/(CLK_STOP#)1
VD
DR
EF
2
*FSL0/REF0_2x3**FSL1/REF1_2x4
X15
X26
GN
DR
EF
7G
ND
PC
I_0
8
**FSL2/PCICLK0_2x9
**FS3/PCICLK1_2x10
**FS4/PCICLK211
*(PCI_STOP#)/PCICLK312
GN
DP
CI_
113
VD
DP
CI_
014
**MODE/PCICLK415
(PECLKREQ0#)/PCICLK516
(PECLKREQ1#)/PCICLK617
PCICLK718
VD
DP
CI_
119
GN
DZ
20
ZCLK0 21ZCLK1 22
VD
DZ
23V
DD
4824
12MHz 25
**SEL24_48#/24_48MHz 26
GN
D48
27
*(CPU_STOP#)/RESET#28
VD
DC
PU
56
CPUT_L0 55
CPUC_L0 54
GN
DC
PU
53
CPUT_L1 52
CPUC_L1 51
VDDA50
SATACLKT_L 49SATACLKC_L 48
GNDA47
SCLK46
SDATA45
PCIET_L0 44PCIEC_L0 43
GN
DP
CIE
X_0
42
PCIET_L1 41PCIEC_L1 40
VD
DP
CIE
X_0
39
PCIET_L2 38PCIEC_L2 37
PCIET_L3 36PCIEC_L3 35
PCIET_L4F 34PCIEC_L4F 33
GN
DP
CIE
X_1
32
PCIET_L5F 31PCIEC_L5F 30
VD
DP
CIE
X_1
29
C86 18P_0402_50V8J
R355
2.2K_0402_5%
R54 2.7K_0402_5%@
G
D S
Q312N7002_SOT23
2
1 3
C98
0.1U_0402_16V
4Z
1
2
G
D S
Q302N7002_SOT232
1 3
R105 33_0402_5%1 2
R89 33_0402_5%1 2
R35 22_0402_5%@1 2
C62 10P_0402_50V8J@1 2
R56 2.7K_0402_5%
R43 10K_0402_5%1 2
R70 22_0402_5%1 2
C72
0.1U_0402_16V
4Z
1
2
R106 33_0402_5%1 2
EB
CQ9MMBT3904_SOT23
2
31
C82 18P_0402_50V8J
C69
0.1U_0402_16V
4Z
1
2
R68 33_0402_5%1 2
R71 33_0402_5%1 2
Y114.31818MHZ_16PF_DSX840GA
12
R81 0_0402_5%@1 2
C404
10U_0805_10V4Z
1
2
C403
0.1U_0402_16V4Z
1
2
R104 33_0402_5%1 2
R58
10K_0402_5%
12
R74 2.7K_0402_5%@
R80 2.7K_0402_5%@
R38 4.7K_0402_5%1 2
R343
1K_0402_5% C59 10P_0402_50V8J@1 2
R52 2.7K_0402_5%
R53 2.7K_0402_5%@
R344
1K_0402_5%
C71
0.1U_0402_16V
4Z
1
2
R92 33_0402_5%1 2
R352
2.2K_0402_5%
C405
0.1U_0402_16V
4Z
1
2
L34
KC FBM-L11-201209-221LMAT_08051 2
R93 33_0402_5%1 2
R528 10K_0402_5%1 2
C65 10P_0402_50V8J@1 2
R79 33_0402_5%1 2
C61 10P_0402_50V8J@1 2
R102 33_0402_5%1 2
R37 33_0402_5%1 2
C100
10U_0805_10V4Z
1
2
L13
KC FBM-L11-201209-221LMAT_0805
1 2
R91 33_0402_5%1 2
R32
10K_0402_5%
12
R337 0_0402_5%1 2
R57
10K_0402_5%
12
R72 33_0402_5%1 2
C70
0.1U_0402_16V
4Z
1
2
C420
10U_0805_10V4Z@
1
2
R51 33_0402_5%@1 2
R75 33_0402_5%1 2
R39 4.7K_0402_5%1 2
R86 33_0402_5%1 2
EB
CQ10MMBT3904_SOT23
2
31
R88 33_0402_5%1 2
C66 10P_0402_50V8J@1 2
C664
10U_0805_10V4Z
1
2
R77 22_0402_5%1 2
R73 2.7K_0402_5%@
R49 22_0402_5%1 2R40 4.7K_0402_5%1 2
C57 10P_0402_50V8J@1 2
R338 0_0402_5%1 2
C64 10P_0402_50V8J@1 2
R101 33_0402_5%1 2
R90 33_0402_5%1 2
R55 2.7K_0402_5%@
R66 10K_0402_5%1 2
R76 2.7K_0402_5%@
R82 0_0402_5%1 2
C63 10P_0402_50V8J@1 2
R95 33_0402_5%1 2
R541 22_0402_5%1 2
R78 2.7K_0402_5%@
C79
0.1U_0402_16V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_INCCLK_INT
SDATASCLK
FB_INAFB_OUTA
CLKBUF_AVDD
CLKBUF_AVDD
CLKBUF_VDD
CLKBUF_VDD
DDRC0DDRT0
DDRC1DDRT1
DDRC2DDRT2
DDRC3DDRT3 DDR_CLK3
DDR_CLK0#DDR_CLK0
DDR_CLK2#DDR_CLK2
DDR_CLK1#DDR_CLK1
DDR_CLK3#
SDATA<12,13,14,20>SCLK<12,13,14,20>
CLK_INC<8>CLK_INT<8>
DDR_CLK0# <12>DDR_CLK0 <12>
DDR_CLK2# <13>DDR_CLK2 <13>
DDR_CLK1# <12>DDR_CLK1 <12>
DDR_CLK3# <13>DDR_CLK3 <13>
+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Clock Buffer ICS9P935Custom
15 49Thursday, September 06, 2007
2005/03/01 2006/03/01
Reference schematic use 1206
Horizontal rotate
C300 close to R242
R566 0_0402_5%1 2
C272
0.1U_0402_16V4Z
1
2
R565 0_0402_5%1 2
R243 0_0402_5%12
R564 0_0402_5%1 2
C276
10U_0805_10V4Z
1
2
R563 0_0402_5%1 2
R245 0_0402_5%12
R562 0_0402_5%1 2
R561 0_0402_5%1 2
C302
0.1U_0402_16V4Z
1
2
C273
0.1U_0402_16V4Z
1
2
R560 0_0402_5%1 2
C279
0.1U_0402_16V4Z
1
2
C301
0.1U_0402_16V4Z
1
2
L26
KC FBM-L11-201209-221LMAT_08051 2
C300
10P_0402_50V8J
1
2
L25
KC FBM-L11-201209-221LMAT_08051 2
R242 22_0402_5%12
C275
0.1U_0402_16V4Z
1
2
C274
10U_0805_10V4Z
1
2
U12
ICS9P935AFLF-T_SSOP28
DDRC0 1DDRT0 2
VDD1.8_03
DDRT1 4DDRC1 5
GND_16
VDDA1.8 7
GND_08
CLK_INT9 CLK_INC10
VDD1.8_111
DDRT2 12DDRC2 13
GND_414
GND_228 DDRC5 27DDRT5 26
VDD1.8_225
GND_324
DDRC4 23DDRT4 22
VDD1.8_321
SDATA20SCLK19
FB_IN18FB_OUT17 DDRT3 16DDRC3 15
C665
10U_0805_10V4Z
1
2
R244 0_0402_5%12
R567 0_0402_5%1 2
C268
10U_0805_10V4Z@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BKOFF# DISPOFF#
I2CC_SDAI2CC_SCL
+LCDVDD_L
TZOUT0+
TZCLK-
TZOUT2+
TZOUT0-
TZOUT2-
TZOUT1+TZOUT1-TXOUT1-
TXOUT1+
TXOUT2-TXOUT2+
TXCLK+TXCLK-
TXOUT0+TXOUT0-
DISPOFF#INV_PWN_R
DAC_BRIG
INVT_PWM
DISPOFF#
TZCLK+
INVT_PWM INV_PWN_R
GMCH_ENVDD_Q
+LCDVDD_L
BKOFF#<31>
GMCH_ENVDD<18>
I2CC_SCL <18>I2CC_SDA <18>
TZCLK- <18>
TZOUT2+ <18>
TZCLK+ <18>
TZOUT2- <18>
TZOUT1- <18>
TZOUT0- <18>
TZOUT1+ <18>
TZOUT0+ <18>
TXOUT1-<18>TXOUT1+<18>
TXOUT2-<18>TXOUT2+<18>
TXCLK+<18>TXCLK-<18>
TXOUT0-<18>TXOUT0+<18>
DAC_BRIG<31>
INVT_PWM<31>
+3VS
+LCDVDD
+3VS
+LCDVDD +3VALW
+3VS
+INVPWR_B+
B+
+LCDVDD
+3VS
+INVPWR_B+
+3VS
+3VALW +3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
LVDS & DVI ConnectorB
16 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
LCD POWER CIRCUIT
LCD/PANEL BD. Conn.
W=60mils
W=60mils
Follow HEL80's pin definition
(60 MIL)
INVERTER Conn.
Except pin 29
Level Shift Circuit
C25
0.1U_0402_16V4Z
1
2
C32
0.1U_0402_16V4Z
1
2
R16300_0603_5%
12
C28
10U_0805_10V4Z
1
2
C36
4.7U_0805_10V4Z@
1
2
R542
47K_0402_5%
1 2
C29
4.7U_0805_10V4Z@
1
2
R17100K_0402_5%
12
JP31
ACES_88242-3001ME@
2525
8 8
24 24
4 4
2121
18 1816 16
7799 10 10
33
2929
2323
15151717
55
2727 26 26
20 20
14 141111 12 12
6 6
11 2 2
1919
28 2830 30
1313
22 22
GND131GND232
C22
220P_0402_50V7K@
1
2
JP37
MOLEX_53780-0790ME@
1234567
L11KC FBM-L11-201209-221LMAT_0805
12
L12KC FBM-L11-201209-221LMAT_0805
12
R15 10K_0402_5%12
EB
CQ37MMBT3904_SOT23
2
31
G
D
S
Q5SI2301BDS_SOT23
2
13
C18
0.1U_0402_16V4Z
1
2
C20
220P_0402_50V7K@
1
2
R25 0_0402_5%1 2
C35
0.1U_0402_16V4Z1
2
C48 470P_0402_50V7K@1 2
C49
0.1U_0603_50V4Z
L10
FBMA-L11-201209-221LMA30T_0805
12
G
D
S Q82N7002_SOT23
2
13
C45 470P_0402_50V7K@1 2
R22
100K_0402_5%
12
C43
68P_0402_50V8K@
1
2
G
D
S
Q7
2N7002_SOT23
2
13
D10 RB751V_SOD32321
R28
4.7K_0402_5%
12
R543
10K_0402_5%
12
EB
CQ38MMBT3904_SOT23
2
31
C44 470P_0402_50V7K@1 2
R544
15K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+L_CRT_VCC
CRT_VSYNC_2
CRT_HSYNC_2
DSUB_12
DSUB_15
CRT_R_2
DSUB_12
DSUB_15
TVDACG_Y
TVDACR_CVBS
TVDACB_C
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
CRT_G_2
CRT_B_2
CRT_G_1
CRT_R_1
CRT_B_1
CRT_VSYNC_1
CRT_HSYNC_0
CRT_VSYNC_0
CRT_HSYNC_1
TV_CTV_CVBS
TV_Y
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_R<9>
VGA_CRT_G<9>
VGA_CRT_B<9>
VGA_CRT_HSYNC<9>
VGA_CRT_VSYNC<9>
GMCH_CRT_DATA <9>
GMCH_CRT_CLK <9>
TVDACG_Y<18>
TVDACB_C<18>
TVDACR_CVBS<18>
+CRT_VCC+R_CRT_VCC
+CRT_VCC
+CRT_VCC
+CRT_VCC
+3VS
+3VS
+3VS
+3VS
+3VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
CRT & TV-OUT ConnectorB
17 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
W=40mils
CRT Connector
W=40mils
TV-OUT Conn.
Place closed to chipset
Place closed to chipset
12/15 Modified. Note L26~L30 are 0 Ohm resisters
12/22 Change to SE071680J80
0208 Add L64 for EMI
8/29 changeL4,L6,L8 from 0 Ohm to bead
8/29 changeC9,C14,C17 from 22P @ to 18p
8/29 change R330,R333,R339 from 75Ohm to @ 8/29 change C397,C388,C414,C398,C387,C407 from 6P to @
8/29 change L30,L31,L33 from BEAD to @
9/5 change C8,C12,C15 from 10P @to mount
L9 0_0603_5%
R330
75_0402_5%@
12
R10
75_0402_5%
12
D4
DAN217_SC59@
2 31
C2
68P_0402_50V8K
1
2
D1
RB411DT146_SOT23-3
2 1
R333
75_0402_5%@
12
C9
18P_0402_50V8J
1
2
R9
75_0402_5%
12
C414
6P_0402_50V8D
@
1
2
C8
10P_0402_50V8J
1
2
G
D S
Q12N7002_SOT23
2
1 3
L4FBMA-L10-160808-800LMT_0603
1 2
C387
6P_0402_50V8D
@
1
2
D23
DAN217_SC59@
2 31
C14
18P_0402_50V8J
1
2
C16
10P_0402_50V8J
1
2
C610P_0402_50V8J
1
2
U1
TC7SET125FUF_SC70
A2 Y 4OE#
1
G3
P5
L30 FCM1608C-121T_0603@1 2
D3
DAN217_SC59@ 2 3
1
L6FBMA-L10-160808-800LMT_0603
1 2
R1
2.2K_0402_5%
12
JP30
SUYIN_030107FR007SX08FUME@
367
42
1
5
89
C17
18P_0402_50V8J
1
2
L3 FCM1608C-121T_06031 2
C11 0.1U_0402_16V4Z1 2
L8FBMA-L10-160808-800LMT_0603
1 2
C398
6P_0402_50V8D@
1
2
L1KC FBM-L11-201209-221LMAT_0805
12
C5 0.1U_0402_16V4Z1 2
L7 0_0603_5%
L31 FCM1608C-121T_0603@1 2
D2
DAN217_SC59@2 3
1
C388
6P_0402_50V8D
@
1
2
R2
2.2K_0402_5%
12
R7 39_0402_1%1 2
L33 FCM1608C-121T_0603@1 2
D24
DAN217_SC59@
2 31
C407
6P_0402_50V8D@
1
2
D5
DAN217_SC59@
2 31
C7
68P_0402_50V8K
1
2
L5 0_0603_5%
R4
2.2K_0402_5%
12
F1
1.1A_6VDC_FUSE
21
R5 39_0402_1%1 2
D25
DAN217_SC59@
2 31
C397
6P_0402_50V8D
@
1
2
D6
DAN217_SC59@
2 31
R6 10K_0402_5%12
C12
10P_0402_50V8J
1
2
JP29
SUYIN_7846S-15G2T-HIME@
611
17
1228
1339
144
1015
5
1617
L2 FCM1608C-121T_06031 2
R3
2.2K_0402_5%
12
C15
10P_0402_50V8J
1
2
C10
10P_0402_50V8J
1
2
G
D S
Q22N7002_SOT23
2
1 3
C10.1U_0402_16V4Z
1
2
C3
100P_0402_50V8J
1
2
U2
TC7SET125FUF_SC70
A2 Y 4OE#
1
G3
P5
C4
10P_0402_50V8J
1
2
R339
75_0402_5%@
12
R8
75_0402_5%
12
C13
10P_0402_50V8J
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VB_PCIEVDDVB_PCIEAVDD
VB_LVDSPLLVDDVB_PLL1VDD
VB_LAVDD
VBOSCOVBRCLK_R
VB_PCIERSET0VB_PCIERSET1
VBCLK_R
V2COMP
VB_PCIEAVSSVB_LVDSPLLVSSVB_PLL1VSS
VB_PCIEVDD VB_PCIEAVDD
VB_PCIEAVSS
VB_VDD3V
VB_LAVDD
VB_LVDSPLLVDD
VB_LVDSPLLVSS
V2RSET
VBRCLK_R
VB_PLL1VDD
VB_PLL1VSS
V2COMP
VBOSCO
EXTSWING
I2CC_SCLI2CC_SDA
VB_LAVDD
VBRCLK
GMCH_ENVDD<16>ENBKL<31>
TZOUT2+<16>TZOUT2-<16>
TZOUT1-<16>TZOUT1+<16>
TZOUT0-<16>TZOUT0+<16>
TZCLK+<16>TZCLK-<16>
NB_RST#<9,19>
I2CC_SDA<16>I2CC_SCL<16>
TXCLK+<16>TXCLK-<16>
TXOUT0-<16>TXOUT0+<16>
TXOUT1-<16>TXOUT1+<16>
TXOUT2+<16>TXOUT2-<16>
VBCAD <9>
HDVBN2_C <7>HDVBP2_C <7>
HDVBP1_C <7>HDVBN1_C <7>
HDVBP0_C <7>HDVBN0_C <7>
HDVAN2_C <7>HDVAP2_C <7>HDVAN1_C <7>HDVAP1_C <7>HDVAN0_C <7>HDVAP0_C <7>
PCIE_CLK_307# <14>PCIE_CLK_307 <14>
VACLK <9>
VBHCLK <9>
VBCLK <9>VBHSYNC <9>VBVSYNC <9>
TVDACR_CVBS <17>TVDACG_Y <17>TVDACB_C <17>
VBRCLK<14>
VB_VDD3V VB_DACVDD
+1.8VS +1.8VS
+3VS
+1.8VS
+3VS
+3VS
VB_DACVDD
VB_DACVDD +3VS
+3VS
+1.8VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
LVDS Encoder SiS307LVCustom
18 49Thursday, September 06, 2007
2005/03/01 2006/03/01
Internal Core Power
General I/O Power
For 307LV/ELV only
307LV/ELV:
Un-stuff R108307DV/CP: Stuff R108Un-stuff R107, R96, C110
Stuff R107, R96, C110
307ELV:NC these 4 pins!
307ELV:change C94 to 0 ohm307LV/DV/CP:C94=0.1uF
Side-BandSignals
NOTE: all stuffed(default)Modify before using!
DDC pull-up
Modify 10U_1206 to 10U_0805
Modify 10U_1206 to 10U_0805
Modify 10U_1206 to 10U_0805 Modify 10U_1206 to
10U_0805
96mA
30mA
99mA
11mA
254mA 35mA
392mA
AGND
AGND
AGND
AGND
AGND
7/30 change L14 to 1_0603Add C669 and C670
8/28 Change C94 from 0.1U to 0 Ohm
8/28 Change U6 from SIS307LV SA00000O920 to SIS307ELV SA00000O930
R139 0_0402_5%1 2
T18 PAD
R540 0_0402_5%1 2
T20 PAD
R358 0_0402_5%1 2
C118
0.1U_0402_16V4Z
1
2
C434
0.1U_0402_16V4Z
1
2
C109 0.1U_0402_16V4Z1 2
R369 124_0402_1%
L35MBK1608121YZF_0603
1 2
C399
10U_0805_10V4Z
1
2
C670
10U_0805_10V4Z
1
2
C425
0.1U_0402_16V4Z
1
2
T8 PAD
C440
0.1U_0402_16V4Z
1
2
R130
100K_0402_5%
12
T14 PAD
L14
1_0603_5%
C422
0.1U_0402_16V4Z
1
2
L32
MBK1608121YZF_06031 2
C1101U_0603_10V4Z
1 2
R132 33_0402_5%1 2
R125 10_0402_5%@1 2
T7 PAD
C433
0.1U_0402_16V4Z
1
2
T6PAD
R346 115_0402_1%
T19 PAD
C428
10U_0805_10V4Z
1
2
C424
0.1U_0402_16V4Z
1
2
C421
0.1U_0402_16V4Z
1
2
L17
MBK1608121YZF_06031 2
C154
10U_0805_10V4Z
1
2
T16 PAD
C436
10U_0805_10V4Z
1
2C427
0.1U_0402_16V4Z
1
2
R336 0_0402_5%1 2
C443
0.1U_0402_16V4Z
1
2
T11 PAD
R124 2.2K_0402_5%1 2
C94 0_0402_5%1 2
Y2 14.31818MHZ_16PF_DSX840GA@1 2
R108 1.65K_0402_1%@1 2
R96 24K_0402_1%
1 2
T9 PAD
C423
0.1U_0402_16V4Z
1
2
C92
0.1U_0402_16V4Z
1
2
C91
10U_0805_10V4Z
1
2
C116
27P_0402_50V8J@
1
2
C669
4.7U_0805_10V4Z
1
2
T15 PAD
L36 MBK1608121YZF_06031 2
T21 PAD
C441
0.1U_0402_16V4Z
1
2
C439
10U_0805_10V4Z
1
2
T10 PAD
C93
0.01U_0402_16V7K
1
2
R365 0_0402_5%1 2
T22 PAD
R334 0_0603_5%
C444
0.1U_0402_16V4Z
1
2
C113
27P_0402_50V8J@
1
2
R345 0_0402_5%@1 2
L37 MBK1608121YZF_06031 2
C119
0.01U_0402_16V7K
1
2
C430
0.1U_0402_16V4Z
1
2
T13 PAD
T17 PAD
C429
0.1U_0402_16V4Z
1
2
C431
0.1U_0402_16V4Z
1
2
R118 2.2K_0402_5%1 2
SiS307ELV
U6
SIS307LV-B0_BGA_167P
EXTSWINGC13LX3PA12LX3NA13LX2PC11LX2NC12LX1PA10LX1NA11LX0PC9LX0NC10LXC1PA8LXC1NA9LXC2PC7LXC2NC8LX4PA6LX4NA7LX5PC5LX5NC6LX6PA4LX6NA5LX7PC3LX7NC4
LAV
DD
E5
LAV
DD
E6
LAV
DD
E7
LAV
DD
E8
LAV
DD
E9
LVD
SP
LLV
DD
B3
LVDSPLLVSS A2
LAV
SS
A3
LAV
SS
B4
LAV
SS
B5
LAV
SS
B6
LAV
SS
B7
LAV
SS
B8
LAV
SS
B9
LAV
SS
B10
LAV
SS
B11
LAV
SS
B12
LAV
SS
B13
LAV
DD
D10
LAV
DD
D11
LDDCCLKF12 LDDCDATAE13
IVD
DH
10
VD
D3V
G10
GPIOAG2GPIOBH2GPIOCH1GPIODG1
GPIOGG13GPIOHG12GPIOIF11GPIOJF3GPIOKG3
V2RSET B2V2COMP B1TVDACR D2TVDACG D1TVDACB E2
TVCSYNC E1
V2HSYNC/GPIOLF2V2VSYNC/GPIOMF1TSCLKI/GPIONH3TVCLKO/GPIOOJ3
DA
CV
DD
C2
PLL
1VD
DK
2
VBRCLKJ2 VBOSCOJ1
PLL1VSS K1
DACVSS C1
DACVSS E3
DACVSS F4
PERN2/SVA_Bn N6PERP2/SVA_Bp N7PERN1/SVA_Gn N4PERP1/SVA_Gp N5PERN0/SVA_Rn N2PERP0/SVA_Rp N3
VACLK K13VBCLK J12
VBHSYNC K11VBVSYNC J11
VBHCAD L13VBHCLK L12
EXTRSTNF13 PFTESTOE10 PFTEST1F10 PFTEST2G11
REFCLKN L7REFCLKP L8
PCIERSET0 L4PCIERSET1 L5
PC
IEV
SS
L11
PCIEAVSS L9
PC
IEV
DD
L2
PC
IEV
SS
L10
PERN5/SVB_Bn N12
PC
IEV
SS
M4
PC
IEV
DD
J5
PC
IEV
DD
K3
PC
IEV
SS
M2
PC
IEV
SS
M11
PC
IEV
SS
M8
PC
IEV
DD
J7
PC
IEA
VD
DL6
PC
IEV
SS
M5
PC
IEV
SS
M9
PC
IEV
DD
J6
PERP3/SVB_Rp N9
PC
IEV
DD
L3
PC
IEV
SS
N1
PC
IEV
DD
M1
PC
IEV
SS
M12
PERN3/SVB_Rn N8
PC
IEV
DD
K4
PERN4/SVB_Gn N10PERP5/SVB_Bp N13
PC
IEV
SS
M3
PC
IEV
DD
J8
PC
IEV
SS
M7
PC
IEV
SS
M13
PC
IEV
DD
J9P
CIE
VD
DL1
PC
IEV
SS
M6
PERP4/SVB_Gp N11
PC
IEV
SS
M10
IVD
DH
4IV
DD
J4
VS
SF5
VS
SF6
VS
SF7
VS
SF8
VS
SF9
VS
SG
5V
SS
G6
VS
SG
7V
SS
G8
VS
SG
9V
SS
H5
VS
SH
6V
SS
H7
VS
SH
8V
SS
H9
IVD
DG
4
LAV
DD
D12
LAV
DD
D13
IVD
DH
11IV
DD
H12
IVD
DH
13
PC
IEV
SS
K5
PC
IEV
SS
K6
PC
IEV
SS
K7
PC
IEV
SS
K8
PC
IEV
SS
K9
PC
IEV
SS
K10
PC
IEV
SS
K12
DACVSS D3
DACVSS E4
LAV
SS
D4
LAV
SS
D5
LAV
SS
D6
LAV
SS
D7
LAV
SS
D8
LAV
SS
D9
VS
SJ1
0
LCDSENSE/GPIOEE12INTN/GPIOFE11
C442
0.01U_0402_16V7K
1
2
R370 499_0402_1%1 2
T12 PAD
C402
0.01U_0402_16V7K
1
2
C437
0.1U_0402_16V4Z
1
2
R107 6.04K_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD0
PCI_AD31
PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5PCI_AD6PCI_AD7PCI_AD8PCI_AD9PCI_AD10PCI_AD11PCI_AD12PCI_AD13PCI_AD14PCI_AD15PCI_AD16PCI_AD17PCI_AD18PCI_AD19PCI_AD20PCI_AD21PCI_AD22PCI_AD23PCI_AD24PCI_AD25PCI_AD26PCI_AD27PCI_AD28PCI_AD29PCI_AD30
PCI_REQ#0
PCI_REQ#3
PCI_REQ#1PCI_REQ#2
PCI_GNT#0
PCI_SERR#
PCI_DEVSEL#
PCI_FRAME#
PCI_TRDY#PCI_STOP#
PCI_IRDY#
PCI_PAR
PCI_CBE#0PCI_CBE#1PCI_CBE#2PCI_CBE#3
PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#
INT_N_A
PCI_PLOCK#
IDE_IRQ
IDE_DIOR#IDE_DIOW#IDE_DDACK#
IDE_DIORDY
IDE_DCS1#
IDE_DD14IDE_DD15
IDE_DD13
IDE_DD10
IDE_DD12IDE_DD11
IDE_DD9
IDE_DD6
IDE_DD8IDE_DD7
IDE_DD4IDE_DD5
IDE_DDREQ
IDE_DD3IDE_DD2
IDE_DD0IDE_DD1
IDE_DCS3#
IDE_DA1IDE_DA2
IDE_DA0
ZAD2ZAD1ZAD0
ZAD3
ZAD7ZAD6
ZAD11
ZAD5
ZAD10
ZAD4
ZAD9ZAD8
ZAD12
ZAD[0..16]
ZAD16ZAD15ZAD14ZAD13
AVDD_SZ4XAVSS_SZ4X
SZVREF
SZCMP_NSZCMP_P
SZVREF
AVDD_SZ4X
SZCMP_N
SZCMP_P
IDEAVSS
PCI_PIRQB#
CLK_PCI_SB
AVSS_SZ4X
IDEAVSS
IDEAVDDIDEAVDD
PCI_PERR#
PCI_REQ#4
PCI_SERR#
PCI_DEVSEL#
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_IRDY#
PCI_PLOCK#
IDE_DIORDY
IDE_IRQ
IDE_DD7
INT_N_A
IDE_IRQ
IDE_DDREQ
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#1PCI_GNT#2PCI_GNT#3PCI_GNT#4
PCI_RST#_R
PCI_AD[0..31]<26>
PCI_IRDY# <26>
PCI_PAR <26>PCI_DEVSEL# <26>
PCI_STOP# <26>PCI_TRDY# <26>
PCI_FRAME# <26>
PCI_REQ#0 <26>
PCI_GNT#0 <26>
PCI_CBE#0 <26>PCI_CBE#1 <26>
PCI_CBE#3 <26>PCI_CBE#2 <26>
IDE_DDREQ <24>
IDE_DCS1# <24>IDE_DCS3# <24>
IDE_DD[0..15] <24>
IDE_DA[0..2] <24>
IDE_DDACK# <24>
IDE_DIOR# <24>IDE_DIOW# <24>
IDE_DIORDY <24>
IDE_IRQ <24>
CLK_PCI_SB <14>
ZAD[0..16]<9>
ZSTB_DP0<9>ZSTB_DN0<9>ZSTB_DP1<9>ZSTB_DN1<9>
ZUREQ<9>ZDREQ<9>
Z_CLK1<14>
PCI_PERR#<26>
PCI_PIRQD# <26>PCI_PIRQC# <26>
PCI_RST# <24,26,28,29,30,31,33>
PCI_SERR# <26>
NB_RST# <9,18>
INT_N_A <7,9>
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
SIS968(1/5)-PCI_IDE_MuTIOLCustom
19 49Thursday, September 06, 2007
2005/03/01 2006/03/01
1:SPI
SPI_Hardware Trap0:LPC (Default)
8mA
16mA
R432 need to close to R5C833
R437 => Intel :Don't Pull-down SiS : Pull-down ? ohm (Un-Mount)
R434 => Intel :Pull-up 8.2K ohm (Mount) SiS :Not Pull-up
R218 => Intel :Don't Pull-down SiS : Pull-down 5.6K ohm (Mount)
R450 => Intel :Pull-up 4.7K ohm (Mount) SiS : Pull-up ? ohm (Un-Mount)
R441 => Intel :Don't Pull-down SiS : Pull-down ? ohm (Un-Mount)
R198
150_0402_1%
12
R446 0_0402_5%1 2
R206 56_0402_5%1 2
R441 4.7K_0402_5%@1 2
R191 8.2K_0402_5%1 2
R450 4.7K_0402_5%@1 2
PCI
MuTIOLSPI
IDE
U11A
SIS968-B0_TEBGA_570P
IDA0 AE19IDA1 AD18IDA2 AC17IDA3 AF18IDA4 AB16IDA5 AE17IDA6 AD16IDA7 AF16IDA8 AE16IDA9 AF17
IDA10 AC16IDA11 AD17IDA12 AE18IDA13 AB17IDA14 AF19IDA15 AC18
IDECSA1# AC21IDECSA0# AB21
IDSAA2 AD21IDSAA1 AD20IDSAA0 AB20
IIORA# AF20IIOWA# AD19
IDACKA# AC19
AVDD_IDE V3AVSS_IDE V4
ICHRDYA AE20IDREQA AB18
IIRQA AB19CBLIDA AC20
SPI_CS0NAE21 SPI_CS1NAF21
SPI_DOAD22 SPI_DIAE22
SPI_CLK AF22
SPI_HARDWARE_TRAP AF23
AD31H5AD30J4AD29J3AD28K1AD27K2AD26J5AD25K4AD24K3AD23L2AD22K5AD21L4AD20L3AD19M1AD18M2AD17L5AD16M4AD15P3AD14R1AD13R2AD12P5AD11R4AD10R3AD9T1AD8T2AD7T4AD6T3AD5U1AD4U2AD3T5AD2U4AD1U3AD0V1
ZAD0Y22ZAD1Y25ZAD2Y23ZAD3W21ZAD4Y26ZAD5W22ZAD6W24ZAD7W25ZAD8U21ZAD9U24ZAD10U22ZAD11T22ZAD12U25ZAD13T23ZAD14T25ZAD15T26ZAD16AA26
ZCLKAC26
ZSTB0V22ZSTB0#V23ZSTB1V25ZSTB1#V26
ZUREQAA23ZDREQAA24
ZCMP_NAB24ZCMP_PAB25
AVDD_Z4XAA22AVSS_Z4XAB23
ZVREFAB26
PREQ4# H2PREQ3# H1PREQ2# G3PREQ1# G4PREQ0# G2
PGNT4# J2PGNT3# J1PGNT2# H3PGNT1# H4PGNT0# G5
C/BE3# L1C/BE2# M3C/BE1# N5C/BE0# R5
INTA# F5INTB# F4INTC# F3INTD# G1
FRAME# N1IRDY# N2
TRDY# M5STOP# N3SERR# P2
PAR P4DEVSEL# N4
PLOCK# P1
PCICLK V2PCIRST# D5
T29PAD
L47MBK1608121YZF_0603
1 2
R200
49.9_0402_1%
12
L49MBK1608121YZF_0603
1 2
R437 4.7K_0402_5%@1 2
C521
0.1U_0402_16V4Z
1
2
T26PAD
C550
0.01U_0402_16V7K
1
2
R373 33_0402_5%1 2
R413 8.2K_0402_5%1 2
C194
0.1U_0402_16V4Z
1
2
R421 8.2K_0402_5%1 2
R434 8.2K_0402_5%1 2
R408 8.2K_0402_5%1 2
R432 8.2K_0402_5%1 2
R204 56_0402_5%1 2
C536
0.1U_0402_16V4Z
1
2
R416 8.2K_0402_5%1 2
R419 8.2K_0402_5%1 2
R181 8.2K_0402_5%1 2
T28PAD
T27PAD
R180 8.2K_0402_5%1 2
R218 5.6K_0402_5%1 2
R189 8.2K_0402_5%1 2
R384 33_0402_5%1 2
C549
0.1U_0402_16V4Z
1
2
C552
10U_0805_10V4Z
1
2
R417 8.2K_0402_5%1 2
R418 8.2K_0402_5%1 2
R215 4.7K_0402_5%1 2
C535
0.01U_0402_16V7K
1
2
R422 8.2K_0402_5%1 2
R186 8.2K_0402_5%1 2
R410 8.2K_0402_5%1 2
R412 8.2K_0402_5%1 2
R428 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GATEA20
H_THERMTRIP#
PCIE_ITX_C_PRX_N1
PCIE_CLK_SB#SB_SPKR
LPC_DRQ0#
H_INTR
H_FERR#H_STPCLK#
PCIE_ITX_C_PRX_P1
OSC32KHI
PBTN_OUT#
SERIRQ
PCIE_CLK_SB
HDA_BITCLK_SB
LPC_FRAME#
LPC_AD0
H_SMI#
AVDD_GMACCMP
AVSS_PEXTRX
AVSS_GMACCMP
AVDD_PEXTRX
LPC_AD1
H_IGNNE#
OSC32KHO
MOSC25MHI
LPC_AD3
H_INIT#
LPC_AD2
PCIE_ITX_PRX_P1
H_CPUSLP#
H_NMI
H_A20M#
PCIE_PTX_C_IRX_P0
MOSC25MHO
AGPBUSY#
PCIE_PTX_C_IRX_N0
PCIE_PTX_C_IRX_N1
AVDD_GMACCMP
AVDD_PEXTRX
SB_DPRSLPVR
SB_DPRSLPVRKB_RST#
SDATASCLK
RGMCMP_NRGMCMP_P
MOSC25MHO
MOSC25MHI
GATEA20KB_RST#
RXD0RXD1RXD2RXD3
COLCRS
MDIO
TX_EN
TXD_0TXD_1TXD_2TXD_3
RXERRXDV
RXCLK
SB_PWRGD
+RTCBATT
BAT_PWRGD
HDA_RST_SB#
HDA_SDOUT_SB
AVSS_GMACCMP
AVSS_PEXTRX
HDA_RST_SB#
HDA_SDOUT_SB
PCIE_PTX_C_IRX_P1PCIE_ITX_PRX_N0
PCIE_ITX_C_PRX_P0PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N1
PCIE_ITX_C_PRX_N0
RGMVREF
PCI_PME#
PM_SLP_S3#PM_SLP_S5#
AGPSTOP#
PROJECT_ID
PM_CLKRUN#
LPC_DRQ0#SERIRQ
EC_LID_OUT#
GPIO21
GPIO23GPIO24
GPIO22
GPIO16
GPIO14
GPIO22GPIO23
GPIO24GPIO21
PCIEPRSNT1
PM_CLKRUN#
PCI_PME#
PSON#
PCIEPRSNT0
HDA_SYNC_SB
HDA_SYNC_SB
PBTN_OUT#
BAT_PWRGD
CPUSTP_N_OLD
EC_SCI#EC_LID_OUT#EC_SMI#
CP_PE#PCIEPRSNT1
GPIO5IDE_HRESET#
GPIO5IDE_HRESET#
GPIO1
GPIO1
GTXCLKEXTCLK
TXER
EC_SCI#
EC_SMI#GPIO2GPIO3
GPIO2GPIO3
PM_SLP_S5#AGPSTOP#CPUSTP_N_OLDEC_THERM#PM_SLP_S3#GPIO16 PSON#
GPIO23
PROJECT_ID
KB_RST#GATEA20
EC_THERM#GPIO2GPIO14
GPIO14
MDCH_MDC
LPC_FRAME#<31,33>
LPC_AD0<31,33>LPC_AD1<31,33>LPC_AD2<31,33>LPC_AD3<31,33>
LPC_DRQ0#<33>
HDA_SDIN0<35>HDA_SDIN1<37>
H_FERR#<4>H_IGNNE#<4>
H_INIT#<4>
H_INTR<4>H_SMI#<4>
H_NMI<4>
H_STPCLK#<4>
SERIRQ<26,31,33>
PBTN_OUT#<31>
H_CPUSLP#<5>
H_A20M#<4>
RXD0 <28>RXD1 <28>RXD2 <28>RXD3 <28>
COL <28>CRS <28>
TXEN <28>
TXD0 <28>TXD1 <28>TXD2 <28>TXD3 <28>
TXCLK <28>
RXER <28>RXDV <28>
RXCLK <28>
MDIO <28>
HDA_SYNC_MDC<37>
HDA_SYNC_AUDIO<35>
HDA_BITCLK_MDC<37>
HDA_BITCLK_AUDIO<35>
AGPBUSY#<9>
REF_CLK1<14>
SB_SPKR<35>
PCIE_PTX_C_IRX_N0 <29>PCIE_PTX_C_IRX_P0 <29>
PCIE_ITX_C_PRX_P0 <29>PCIE_ITX_C_PRX_N0 <29>
PCIE_ITX_C_PRX_P1 <30>PCIE_ITX_C_PRX_N1 <30>
PCIE_PTX_C_IRX_N1 <30>PCIE_PTX_C_IRX_P1 <30>
HDA_RST_AUDIO#<35>
HDA_RST_MDC#<37>
HDA_SDOUT_AUDIO<35>
HDA_SDOUT_MDC<37>
PCIE_CLK_SB# <14>PCIE_CLK_SB <14>
SB_PWRGD<9,31>
H_PROCHOT#<4>
PCI_PME#<31>
PM_SLP_S3#<31>PM_SLP_S5#<31>
AGPSTOP#<9>
SB_DPRSLPVR<25>
PSON#<31>
CP_PE# <30>
AUX_PWRGD<9,31>
SDATA <12,13,14,15>SCLK <12,13,14,15>
EC_SCI#<31>
EC_THERM# <31>
CPUSTP_N_OLD<25>
GATEA20<31>KB_RST#<31>
EC_LID_OUT#<31>EC_SMI#<31>
H_THERMTRIP#<4>
PM_CLKRUN# <26,31>
IDE_HRESET# <24>
MDC <28>
+RTCVCC
+RTCVCC
+CHGRTC
+RTC_BATT
+1.8VS
+3VS
+3VS
+1.8VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VS
+1.8VS
+RTCVCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
SIS968(2/5)-PCIE_LAN_RTCCustom
20 49Thursday, September 06, 2007
2005/03/01 2006/03/01
PCI-Express
the same with "180"
Put closed to 968
- +
CPU IU
8mA
30mA
NEW Card
WLAN
Please close to SB
Decoupling Capacitor
R430 => Intel :Not Pull-up SiS : Pull-up 4.7K ohm (Mount)R429 => Intel :Pull-up 10K ohm (Mount) SiS :Not Pull-up
7/20 modified
7/20 modified
7/30 add for debug
7/30 modified from 27P to 33P
8/07 modified from 12P to 15P
Change D19 footprint from RLS4148_LL34-2 to LL34
8/29 change J1,J4 from net BAT_PWRGD to net +RTCVCC
8/29 change net from BAT_PWRGD to net +RTCVCC
D14 RB751V_SOD3232 1
R427 0_0402_5%1 2
C511 0.1U_0402_10V7K1 2
L38MBK1608121YZF_0603
1 2
R386 4.7K_0402_5%1 2
C185
0.1U_0402_16V4Z
1
2
R436 10K_0402_5%@1 2
R158 33_0402_5%1 2
C120
0.01U_0402_16V7K
1
2
C457
0.01U_0402_16V7K
1
2
C506 0.1U_0402_10V7K1 2
R187 4.7K_0402_5%12
T24PAD
Y4
25MHZ_20PF_6X25000017
1 2
R164 10K_0402_5%
1 2
R382 10K_0402_5%
1 2
R159 33_0402_5%1 2
R199 33_0402_5%1 2
R389 33_0402_5%1 2
C326
10U_0805_10V4Z
1
2
R393 10K_0402_5%
1 2R397 10K_0402_5%
1 2
R568 33_0402_5%1 2
R431 0_0402_5%1 2
R291
511_0603_1%
1 2
SW2SMT1-05_4P
@3
2
1
4
56
R443 10K_0402_5%1 2
R17
310
M_0
402_
5% 12
R548 10K_0402_5%1 2
R435 10K_0402_5%1 2
C333
0.1U_0402_16V4Z
1
2
C186
0.01U_0402_16V7K
1
2
R439 10K_0402_5%1 2
R203 33_0402_5%1 2
R163 10K_0402_5%
1 2
R387 10K_0402_5%
1 2
R201 33_0402_5%1 2
R150
0_0402_5%
12
R404 4.7K_0402_5%1 2
R161 56_0402_5%1 2
R378 0_0402_5%1 2
D19 RLS4148_LL34-21 2
R162 10K_0402_5%
1 2
R390 10K_0402_5%@1 2
R394 0_0402_5%@1 2
C346
1U_0603_10V4Z
1
2
D20
BAS40-04_SOT23
1
2
3
R429 10K_0402_5%1 2
R426 124_0402_1%1 2
R147 150_0402_1%1 2
R145 33_0402_5%1 2
CPU_SAPIC
LPCRTC
HD AudioACPI
GPIO
GMAC
PCI
Expr
ess
U11B
SIS968-B0_TEBGA_570P
INIT#AC23A20M#AE26SMI#AD23INTRAC22NMIAE25IGNNE#AE24FERR#AF24STPCLK#AF25CPUSLP#AD24
LAD0Y5LAD1AA4LAD2AB2LAD3AB3
LFRAME#AB1LDRQ#AB4SIRQAA5
BATOKF1PWROKE4
RTCVDDD1
RTCVSSD2
GPIO20 W5GPIO19 Y4
HDA_SDIN0E5HDA_SDIN1C4
HDA_SDOUTY3HDA_SYNCY2
HDA_RESET#B3HDA_BIT_CLKY1
OSCIAA2ENTESTF2SPKAA1
PWRBTN#E6PME#A6PSON#E7
AUXOKC3ACPILEDA5
GPIO13/DPRSLPVRD3GPIO14/AGPSTOP#/S3AUXSW#B5
GPIO15/SLP_S3#C7
GPIO16/DPRSTP#B7GPIO17/GA20#D7GPIO18/KBDRST#B4
GPIO12/CPUSTP#/DPSLP#D4 GPIO11/STP_PCI#/AGPSTOP#F6
GPIO10/SLP_S5#C2
GPIO9/HDA_SDIN2C6
TXEN C12
TXD0 D12TXD1 A13TXD2 B13TXD3 C13
RXCLK A11
RXDV C10RXER E12
RXD0 A10RXD1 C9RXD2 B9RXD3 A9
COL E10CRS E11MDC E14
MDIO E13
GPIO0/STPCPU# U5
GPIO2/THERM# V5GPIO3/EXTSMI# W4
GPIO4/CLKRUN# W3GPIO5/PREQ5# W2GPIO6/PGNT5# W1
GPIO7/GPWAK#D6GPIO8/RINGA4
TXER C11
RGMCMP_N A14
RGMVREF C14RGMCMP_P B14
OSC25MHI A8OSC25MHO B8
PRX0+ M26PRX0- M25PTX0+ N24PTX0- N23
PRX1+ K26PRX1- K25PTX1+ L24PTX1- L23
PCLK100N P25PCLK100P P26
AVDD_PEXTRX R25AVSS_PEXTRX R26
RSET0 P22RSET1 P21
OSC32KHOE2OSC32KHIE1
NC4 J23NC5 J24NC6 H25NC7 H26NC8 G23NC9 G24NC10 F25NC11 F26
GPIO21 D8GPIO22 F8GPIO23 E8GPIO24 A7
TXCLK B11
GTXCLK A12EXTCLK F14
AVSS_GMACCMP18 C8AVDD_GMACCMP18 D9
PCIEPRSNT1 R21PCIEPRSNT0 R23
GPIO1/LDRQ1#/PCIE_HOTPLUG AB5
BMBUSY#AE23
PROCHOT#AC24THERMTRIP#AD25
R279 10K_0402_5%1 2
U9
AT93C46-10SI-2.7_SO8@
CS1 SK2 DI3 DO4
VCC 8NC 7NC 6GND 5
R167 33_0402_5%1 2
R430 4.7K_0402_5%1 2
R385 4.7K_0402_5%1 2R376 100K_0402_5%1 2
R444 10K_0402_5%@1 2
X1
32.768KHZ_12.5P_1TJS125BJ2A251
OUT 4
IN 1
NC3
NC2
C328
10U_0805_10V4Z
1
2
R375 100K_0402_5%1 2
C512 0.1U_0402_10V7K1 2
R190 0_0402_5%1 2
C175 15P_0402_50V8J
R398 10K_0402_5%@1 2
R194 33_0402_5%1 2
T4PAD
R388 10K_0402_5%
1 2
R425 10K_0402_5%
1 2
R151 0_0402_5%
@
1 2
C332
0.01U_0402_16V7K
1
2
R166 33_0402_5%1 2
C473
0.1U_0402_16V4Z
1
2
R403 10K_0402_5%@1 2
R433 10K_0402_5%1 2
R438 10K_0402_5%1 2
R142
150_0402_1%
12
C152
33P_0402_50V8J
R424 1K_0402_5%14W@1 2
C168 0.1U_0402_16V4Z@
12
J4 JOPEN@
1 2
R160 56_0402_5%1 2
R192 33_0402_5%1 2
C459
0.1U_0402_16V4Z
1
2T25PAD
J1
JOPEN@
12
R176
0_0402_5%1 2
C515 0.1U_0402_10V7K1 2
C172 15P_0402_50V8J
R146 33_0402_5%1 2
R197 33_0402_5%1 2
L19MBK1608121YZF_0603
1 2
C151
33P_0402_50V8J
R381 10K_0402_5%
1 2
R420 499_0402_1%1 2
BATT1
ML1220T13RE@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_CLK_DPSATA_CLK_DN
H_SATA_LED#
ISWITCHOPEN1ISWITCHOPEN0
AVDD_SATARXAVSS_SATARX
ATRAP
USBCMPAVSS18
USBCMPAVSS33
UVDD18
USBPVSS18
AVSS_SATAPLL33
SOSC25MHI
USB_OC#1USB_OC#2USB_OC#3
SB_PCIE_WAKE#
USB20_N0USB20_P0
USB20_P1USB20_N1
USB20_N2USB20_P2
USB20_N3USB20_P3
USB20_N4USB20_P4
USB20_N5USB20_P5
USB20_N6USB20_P6
USB20_P7USB20_N7
USB_CLK_12M
USBREF
USBPVDD18USBPVSS18
USBCMPAVDD18USBCMPAVSS18
USBCMPAVSS33USBCMPAVDD33
SB_PCIE_WAKE#
AVDD_SATAPLL33
AVSS_SATAPLL33
TRAP0
SATA_DTX_C_IRX_P0SATA_DTX_C_IRX_N0
SATA_ITX_DRX_N0SATA_ITX_DRX_P0
SATA_ITX_C_DRX_N0SATA_ITX_C_DRX_P0
UVDD18
USBCMPAVDD33
SATA_REXT
USBPVDD18
USBCMPAVDD33
USBCMPAVDD18
AVSS_SATARX
AVDD_SATARX
AVDD_SATAPLL33
SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
SATA_DTX_C_IRX_N1SATA_DTX_C_IRX_P1
USB20_N1 USB20_N1_2
USB20_P1USB20_N1
USB20_P1_1USB20_N1_1
USB_OC#7
USB_OC#45
USB20_P1 USB20_P1_2
USB_OC#1USB_OC#2
USB_OC#7USB_OC#3
H_SATA_LED# SATA_LED#
USB_OC#06USB_OC#06<30>
USB_OC#45<34>
SATA_CLK_DP<14>SATA_CLK_DN<14>
USB_CLK_12M <14>
SATA_DTX_C_IRX_N0 <24>SATA_DTX_C_IRX_P0 <24>
SATA_ITX_C_DRX_N0 <24>SATA_ITX_C_DRX_P0 <24>
USB20_N3<29>USB20_P3<29>USB20_N2<30>USB20_P2<30>
USB20_N0<30>USB20_P0<30>
USB20_N4<34>USB20_P4<34>
USB20_N5<34>USB20_P5<34>
USB20_N6<30>USB20_P6<30>
USB20_N7<37>USB20_P7<37>
USB20_N1_2 <33>
USB20_P1_1 <33>USB20_N1_1 <33>
USB20_P1_2 <33>
SB_PCIE_WAKE#<7,29,30>
SATA_LED# <32>
+1.8VALW
+1.8VALW
+1.8VALW
+3VALW
+3VALW
+3VALW
+3VS
+1.8VS
+3VALW
+5VS+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
SIS968(3/5)-USB_SATACustom
21 49Thursday, September 06, 2007
2005/03/01 2006/03/01
New Card
USB
USB
USBUSB
WLAN
CAMERA
133MHz:Internal pull-down 66MHz:External pull-up
7mA
8mA
8mA
9mA
284mA
6mA
41mASATA_RXn/p need tie to ground when SATA port no used
BT
Place C478,C489 close toU11 Pin F17,F19,F22
Place C465,C466close to U11 Pin D21
R155 1K_0402_5%@1 2
R392 0_0402_5%1 2
C559 0.01U_0402_16V7K1 2
R576 10K_0402_5%@1 2
L23MBK1608121YZF_0603
1 2
R217 0_0402_5%1 2
C171
0.01U_0402_16V7K
1
2
USB
SATA
U11C
SIS968-B0_TEBGA_570P
UV0+D26UV0-D25UV1+E24UV1-E23UV2+A20UV2-B20UV3+C19UV3-D19UV4+A18UV4-B18
OC0#A23OC1#F21OC2#A24OC3#B24OC4#C23
IPB_OUT1 C22
USBREF F20
AVDD_USBPLL18 B26AVSS_USBPLL18 B25
IPB_OUT0 D22
UV5+C17UV5-D17UV6+A16UV6-B16
OC6#A25 OC5#C24
AVDD_SATARXAF14AVSS_SATARXAF15
AVDD_SATAPLL33AC9AVDD_SATAPLL33AD9
AVSS_SATAPLL33AC8AVSS_SATAPLL33AD8
REXTAF7
STX1+ AC6STX1- AD6
SRX1+ AF5SRX1- AE5
XIN AE8
TRAP0E22
UVDD18 F16
UVDD18 E16
UVDD18 J19UVDD18 H18
UVDD18 E18
UVDD18 H17UVDD18 H16
UVDD18 F15
UVDD18 H15UVDD18 J15
AVDD_USBCMP18 E21AVSS_USBCMP18 E20
AVDD_USBCMP33 D21AVSS_USBCMP33 C21
UVDD33 F17UVDD33 F19UVDD33 F22
HDACT AA3
OC7#B23
UV7+C15UV7-D15
CLK100PAE15CLK100NAD15
OSC12MHI A22OSC12MHO B22
ISWITCHOPEN1 AC1ISWITCHOPEN0 AD1
SRX0+ AF12SRX0- AE12
STX0+ AC13STX0- AD13
XOUT AF8
ATRAPD10 PCIEWAKEE9
R551 10K_0402_5%1 2
R211 1K_0402_5%1 2
R440 0_0402_5%1 2
C476
0.1U_0402_16V4Z
1
2
R168 0_0402_5%1 2
L48MBK1608121YZF_0603
1 2
C477
0.01U_0402_16V7K
1
2
R549 10K_0402_5%1 2
R209 1K_0402_5%1 2
L44MBK1608121YZF_0603
1 2
C478
0.01U_0402_16V7K
1
2
C663 0.1U_0402_16V4Z@1 2
L43MBK1608121YZF_0603
1 2
R219 0_0402_5%1 2
L46MBK1608121YZF_0603
1 2
C216 22P_0402_50V8J1 2
RP20_0404_4P2R_5%14W@
1 42 3
C215
0.01U_0402_16V7K
1
2
C466
0.01U_0402_16V7K
1
2
C545
0.1U_0402_16V4Z
1
2
R212 1K_0402_5%1 2
C465
0.1U_0402_16V4Z
1
2
R205
10K_0402_5%@
12
C560 0.01U_0402_16V7K1 2
C489
0.1U_0402_16V4Z
1
2
R207 1K_0402_5%1 2
R552 10K_0402_5%1 2
U39
TC7SET125FUF_SC70@
A2 Y 4OE
#1
G3
P5
R402 127_0402_1%1 2
C474
0.01U_0402_16V7K
1
2
RP190_0404_4P2R_5%15W@
1 42 3
C548
0.01U_0402_16V7K
1
2
R550 10K_0402_5%1 2
C222
0.1U_0402_16V4Z
1
2
R405 1K_0402_5%1 2
R374 4.7K_0402_5%1 2
C170
0.1U_0402_16V4Z
1
2
L18MBK1608121YZF_0603
1 2
R577 0_0402_5%1 2
R407 0_0402_5%1 2
R213 12K_0402_1%1 2
C475
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS
+1.8VS
+1.8VS +1.8VS
+1.05VS
+1.05VS
+1.05VS
+3VALW
+3VALW
+3VALW
+3VALW+1.8VALW
+1.8VALW
+1.8VALW+3VALW
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
SIS968(4/5)-POWERCustom
22 49Thursday, September 06, 2007
2005/03/01 2006/03/01
Put under 968 solder side
413mA
413mA
19mA
190mA
153mA
8mA
4mA
29mA
22mA
C557,C555,C217,C228,C551,C554close to U30 Pin AVDD_SATA
C504,C509,C494,C495,C513,C503close to U30 Pin AVDDPEX
C522
0.1U_0402_16V4Z
1
2
C504
0.01U_0402_16V7K
1
2
C228
10U_0805_10V4Z
1
2
C523
10U_0805_10V4Z
1
2
C486
0.1U_0402_16V4Z
1
2
C482
0.1U_0402_16V4Z
1
2
C532
0.1U_0402_16V4Z
1
2
C543
10U_0805_10V4Z
1
2
C547
0.1U_0402_16V4Z
1
2
C510
1U_0603_10V4Z
1
2
C537
0.1U_0402_16V4Z
1
2
C513
0.1U_0402_16V4Z
1
2
C555
0.1U_0402_16V4Z
1
2
C557
0.01U_0402_16V7K
1
2
C531
0.1U_0402_16V4Z
1
2
C500
0.1U_0402_16V4Z
1
2
C540
1U_0603_10V4Z
1
2
C539
1U_0603_10V4Z
1
2
C488
1U_0603_10V4Z
1
2
C556
10U_0805_10V4Z
1
2
C524
10U_0805_10V4Z
1
2
C519
0.1U_0402_16V4Z
1
2
C501
0.1U_0402_16V4Z
1
2
C530
0.1U_0402_16V4Z
1
2
C494
1U_0603_10V4Z
1
2
C551
0.1U_0402_16V4Z
1
2
C509
0.1U_0402_16V4Z
1
2
C517
0.1U_0402_16V4Z
1
2
C546
0.1U_0402_16V4Z
1
2
C518
0.1U_0402_16V4Z
1
2
C554
0.01U_0402_16V7K
1
2
C148
1U_0603_10V4Z
1
2
C217
1U_0603_10V4Z
1
2
C493
0.1U_0402_16V4Z
1
2
C527
0.1U_0402_16V4Z
1
2
C534
0.1U_0402_16V4Z
1
2
C525
0.1U_0402_16V4Z
1
2
C498
0.1U_0402_16V4Z
1
2
C542
1U_0603_10V4Z
1
2
C495
10U_0805_10V4Z
1
2
C561
1U_0603_10V4Z
1
2
C497
0.1U_0402_16V4Z
1
2
C526
0.1U_0402_16V4Z
1
2
C503
0.01U_0402_16V7K
1
2
C507
0.1U_0402_16V4Z
1
2
C520
0.1U_0402_16V4Z
1
2
C538
1U_0603_10V4Z
1
2
C492
0.1U_0402_16V4Z
1
2
C499
0.1U_0402_16V4Z
1
2
C502
0.1U_0402_16V4Z
1
2
C516
0.1U_0402_16V4Z
1
2
Power
U11D
SIS968-B0_TEBGA_570P
VDDZ U26VDDZ W26
VDDZ P18
IVDD R18
VDDZ N18
IVDD V17
PVDDV16
IVDD N9IVDD P9
VDDZ W18
PVDDV15
IVDD_AUX J18IVDD_AUX J17
OVDD_AUXH19OVDD_AUXH9
IVDD_AUX J9
VDDZ AA25VDDZ R24
VDDZ V24VDDZ Y24
IVDD M9IVDD K9IVDD V10IVDD V11IVDD V12
PVDDV14PVDDT8PVDDN8PVDDL9
OVDDW17OVDDW16OVDDW15OVDDW14OVDDW13OVDDW12OVDDK8OVDDL8OVDDM8OVDDP8OVDDR8OVDDU8OVDDV8
VTTAA21VTTAB22
IVDD_AUX J16
OVDD_AUXH8 VDDZ T24
IVDD R17
IVDD T18
VDDZ U18VDDZ V18VDDZ V19VDDZ W19
IVDD R9IVDD T9IVDD U9IVDD J14
OVDD_AUXJ12
IVDD_AUX J10IVDD_AUX J8
GMIIVDD_AUXH10GMIIVDD_AUXH11GMIIVDD_AUXH12
OVDD_AUXJ11
GMIIVDD_AUXH13GMIIVDD_AUXJ13
OVDD_AUXF7
IVDD V13
AVDDPEXK18AVDDPEXL18AVDDPEXL19AVDDPEXM18AVDDPEXM19AVDDPEXN19AVDDPEXH21AVDDPEXJ21AVDDPEXK21AVDDPEXL21AVDDPEXM21AVDDPEXN21AVDDPEXM22AVDDPEXH22
AVDD_SATA AB8AVDD_SATA AB9
AVDD_SATA AC10AVDD_SATA AC11AVDD_SATA AD10AVDD_SATA AD11AVDD_SATA AE10AVDD_SATA AF10AVDD_SATA V9AVDD_SATA W8AVDD_SATA W9AVDD_SATA W10AVDD_SATA W11
AVDD_SATA AB10AVDD_SATA AB11
C514
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
SIS968(5/5)-GNDCustom
23 49Thursday, September 06, 2007
2005/03/01 2006/03/01
Gound
U11E
SIS968-B0_TEBGA_570P
VSSZ U23VSSZ W23VSSZ R22VSSZ T21VSSZ V21VSSZ Y21VSSZ T15VSSZ P15VSSZ T17VSSZ R15VSSZ R16VSSZ T16VSSZ U16VSSZ U17VSSK10VSSK11VSSK12VSSL10VSSL11VSSL12VSSL14VSSL15VSSL16VSSM10VSSM11VSSM12VSSM13VSSM14VSSM15VSSN10 USBVSS D14
USBVSS E15USBVSS A15USBVSS B15USBVSS C16USBVSS D16USBVSS A17USBVSS B17USBVSS E17USBVSS C18USBVSS D18USBVSS A19USBVSS B19USBVSS E19USBVSS C20USBVSS D20USBVSS A21USBVSS B21USBVSS D23USBVSS D24USBVSS C25USBVSS C26USBVSS K13USBVSS K14USBVSS K15USBVSS K16USBVSS K17USBVSS L13USBVSS L17
AVSS_SATA AB6AVSS_SATA AB7AVSS_SATA AB12AVSS_SATA AB13AVSS_SATA AB14AVSS_SATA AB15AVSS_SATA AC2AVSS_SATA AC3AVSS_SATA AC4AVSS_SATA AC5AVSS_SATA AC7AVSS_SATA AC12AVSS_SATA AC14AVSS_SATA AC15AVSS_SATA AD2AVSS_SATA AD3AVSS_SATA AD4AVSS_SATA AD5AVSS_SATA AD7AVSS_SATA AD12AVSS_SATA AD14AVSS_SATA AE1AVSS_SATA AE2AVSS_SATA AE3AVSS_SATA AE4AVSS_SATA AE6AVSS_SATA AE7AVSS_SATA AE9AVSS_SATA AE11AVSS_SATA AE13AVSS_SATA AE14AVSS_SATA AF2AVSS_SATA AF3AVSS_SATA AF4AVSS_SATA AF6AVSS_SATA AF9AVSS_SATA AF11AVSS_SATA AF13
VSSAD26VSSAC25VSSB10VSSB12VSSD11VSSD13VSSU15VSSU14VSSU13VSSU12VSSU11VSSU10VSST14VSST13VSST12VSST11VSST10VSSR14VSSR13VSSR12VSSR11VSSR10VSSP14VSSP13VSSP12VSSP11VSSP10VSSN14VSSN13VSSN12VSSN11
AVSSPEXP24AVSSPEXP23AVSSPEXN22AVSSPEXN26AVSSPEXN25AVSSPEXM24AVSSPEXM23AVSSPEXL22AVSSPEXK22AVSSPEXJ22AVSSPEXG22AVSSPEXL26AVSSPEXL25AVSSPEXK24AVSSPEXK23AVSSPEXJ26AVSSPEXJ25AVSSPEXH24AVSSPEXH23AVSSPEXG26AVSSPEXG25AVSSPEXF24AVSSPEXF23AVSSPEXE26AVSSPEXE25AVSSPEXP16AVSSPEXM17AVSSPEXN17AVSSPEXP17AVSSPEXM16AVSSPEXN16AVSSPEXN15
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
IDE_DD[0..15]
IDE_DA[0..2]IDE_RST#
IDE_DA2IDE_DA1IDE_DA0
IDE_DIORDY
IDE_DD7
IDE_IRQ
IDE_DD14IDE_DD13IDE_DD3
IDE_DIOW#
IDE_DD0
IDE_LED#
IDE_DD5IDE_DD4
IDE_RST#
IDE_DD1IDE_DD2
IDE_LED#
IDE_DIOR#
IDE_DD8
IDE_DCS1#
IDE_DD6
IDE_PDIAG#
IDE_DDACK#
IDE_CSEL
SATA_ITX_C_DRX_P0SATA_ITX_C_DRX_N0
IDE_RST#IDE_DD7
IDE_DD5IDE_DD6
IDE_DD3IDE_DD4
IDE_DD2
IDE_DD0IDE_DD1
IDE_DIORDYIDE_IRQ
IDE_DIOW#
IDE_DA1IDE_DA0
IDE_LED#IDE_DCS1#
IDE_CSEL R_IDE_CSEL
R_IDE_RST#R_IDE_DD7
R_IDE_DD5R_IDE_DD6
R_IDE_DD3R_IDE_DD4
R_IDE_DD2
R_IDE_DD0R_IDE_DD1
R_IDE_DIORDYR_IDE_IRQ
R_IDE_DIOW#
R_IDE_DA1R_IDE_DA0
R_IDE_LED#R_IDE_DCS1#
R_IDE_DIOR#
IDE_DD15
R_IDE_DD11
IDE_DD13
IDE_DD10
R_IDE_DA2
R_IDE_DD15IDE_DD14
IDE_DD11
R_IDE_PDIAG#
R_IDE_DDREQ
IDE_DA2
IDE_DDREQ
IDE_DD12
IDE_PDIAG#
IDE_DIOR#
R_IDE_DD12
R_IDE_DD14
R_IDE_DCS3#
R_IDE_DDACK#
R_IDE_DD13
R_IDE_DD8IDE_DD8IDE_DD9
R_IDE_DD10
IDE_DDACK#
R_IDE_DD9
IDE_DCS3#
IDE_DD15
IDE_DD12IDE_DD11IDE_DD10
IDE_DDREQ
IDE_DCS3#
IDE_DD9
R_IDE_PDIAG#
R_IDE_DD11
R_IDE_DD8
R_IDE_DIOW#
R_IDE_DD5
R_IDE_DD14R_IDE_DD13
R_IDE_DD9
R_IDE_DD0
R_IDE_DD7R_IDE_RST#
R_IDE_DDREQ
R_IDE_DD12
R_IDE_DA0
R_IDE_DD2
R_IDE_DIORDY
R_IDE_LED#
R_IDE_DD15
R_IDE_DA1
R_IDE_DD4
R_IDE_DD10
R_IDE_DCS3#
R_IDE_IRQ
R_IDE_DD1
R_IDE_DD3
R_IDE_CSEL
R_IDE_DIOR#
R_IDE_DA2
R_IDE_DD6
R_IDE_DDACK#
R_IDE_DCS1#
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
IDE_HRESET#
PCI_RST#IDE_DD[0..15]<19>
IDE_DA[0..2]<19> PCI_RST#<19,26,28,29,30,31,33>
IDE_DIOW#<19>IDE_DDACK# <19>
IDE_DDREQ <19>
IDE_DCS3# <19>
IDE_IRQ<19>
IDE_DIOR# <19>
IDE_DCS1#<19>
IDE_DIORDY<19>
SATA_ITX_C_DRX_P0<21>SATA_ITX_C_DRX_N0<21>
SATA_DTX_C_IRX_P0<21>
SATA_DTX_C_IRX_N0<21>
IDE_HRESET#<20>
+3VS+5VS
+5VS
+5VS +5VS
+5VS
+5VS +3VS
+3VS
+5VS
+5VS_ODD +5VS_ODD
+5VS_ODD +5VS +5VS_ODD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
HDD & ODD ConnectorB
24 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Placea caps. near ODD CONN.
IDE_CSELGrounding for Master (When use SATA HDD)Open or High for Slaver (Normal)
(NEW)
Change Library(NEW)
SATA HDD Conn.
14W ODD Conn.
15W ODD Conn.
12/4 Change J7 to 2x0 Ohm 1/4w resistors
R486 0_0402_5%15W@1 2
C400 0.01U_0402_16V7K1 2
R259 0_0402_5%15W@1 2
R504 0_0402_5%15W@1 2
R516 0_0402_5%15W@1 2
C366
1000P_0402_50V7K
1
2
C309
1U_0603_10V4Z15W@
1
2
R255 0_0402_5%15W@1 2
R491100K_0402_5%
1 2
C601
1000P_0402_50V7K14W@
1
2
R500 0_0402_5%15W@1 2
C311
1000P_0402_50V7K15W@
1
2
R248 0_0402_5%15W@1 2
R258 0_0402_5%15W@1 2
R247 0_1206_5%15W@1 2
C367
1U_0603_10V4Z
1
2
R246 0_0402_5%15W@1 2
R252 0_0402_5%15W@1 2
JP27
OCTEK_CDR-50DY1G14W@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 50
C313
10U_0805_10V4Z15W@
1
2
R499 0_0402_5%15W@1 2
R262 0_0402_5%15W@1 2
C354
10U_0805_10V4Z
1
2
R513 0_0402_5%15W@1 2
U36
NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
C68
0.1U_0402_16V4Z@
1
2
R257 0_0402_5%15W@1 2
C310
0.1U_0402_16V4Z15W@
1
2
C599
1U_0603_10V4Z14W@
1
2
R497 0_0402_5%15W@1 2
C395 0.01U_0402_16V7K1 2
C628 0.1U_0402_16V4Z1 2
R263 0_0402_5%15W@1 2
R512 0_0402_5%15W@1 2
R264 0_0402_5%15W@1 2
R253 0_0402_5%15W@1 2
R249 0_1206_5%15W@1 2
R261 0_0402_5%15W@1 2
C312
10U_0805_10V4Z15W@
1
2
R240 475_0402_1%1 2
JP28
SUYIN_127043FB022S338ZR_RVME@
GND1A+2A-3GND4B-5B+6GND7
V338V339V3310GND11GND12GND13V514V515V516GND17Reserved18GND19V1220V1221V1222
R493 0_0402_5%15W@1 2
C365
0.1U_0402_16V4Z
1
2
R509 0_0402_5%15W@1 2
R256 0_0402_5%15W@1 2
C594
10U_0805_10V4Z14W@
1
2
C353
10U_0805_10V4Z
1
2
R490 0_0402_5%15W@1 2
R250 0_0402_5%15W@1 2
R487 100K_0402_5%12
R508 0_0402_5%15W@1 2
R260 0_0402_5%15W@1 2
C595
0.1U_0402_16V4Z14W@
1
2
R254 0_0402_5%15W@1 2
R251 0_0402_5%15W@1 2
R265 0_0402_5%15W@1 2
R505 0_0402_5%15W@1 2
JP41
OCTEK_CDR-50DY1G15W@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 50
C598
10U_0805_10V4Z14W@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_DPSLP_N_LS
CPUSTP#
H_DPSLP_N_LS
DPRSTP_N_INV
DPRSTP_N_INV
DPRSTP_N_INV
H_DPSLP_N_LS
H_DPRSTP#
H_DPSLP#
CPUSTP_N_OLD<20>
H_DPSLP# <5>
H_DPRSTP# <5,48>
CPUSTP# <14>
SB_DPRSLPVR<20> PM_DPRSLPVR_D <48> SB_DPRSLPVR<20>
+3VS+1.05VS
+3VS
+3VS
+3VS +3VS
+3VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
<Doc> <RevCode>
<Title>
Custom
25 49Thursday, September 06, 2007
2005/03/01 2006/03/01
Connecte to CPU
Use SA00001N400 FootPrint
Use SA00001N400 FootPrint
Use SA00001N400 FootPrint
7/20 Reserved
8/1 Rotate
8/1 Rotate
C464
0.01U_0402_16V7K@
1
2
C447
100P_0402_50V8J
1
2
U25
NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
C458 0.1U_0402_16V4Z1 2
U23NL17SZ17DFT2G_SOT353-5
A2 Y 4NC 1
Vcc
5G
3
R380 33_0402_5%1 2
R553 0_0402_5%@1 2
R391 33_0402_5%1 2
U10
PCA9306DCUR_VSSOP8@
SCL1 3
VREF1 2
GN
D1
SDA1 4SDA25
SCL26
VREF27
EN
8
C460
0.01U_0402_16V7K@
1
2
R414 33_0402_5%1 2
U26NL17SZ17DFT2G_SOT353-5
A2 Y 4NC 1
Vcc
5G
3
R165
300_0402_5%
12
R401 33_0402_5%1 2 R377 33_0402_5%1 2
C446 0.1U_0402_16V4Z1 2
C452 0.1U_0402_16V4Z1 2
R170
1.05K_0402_1%
R172
200K_0402_5%
@
R372 499_0402_1%
C173
0.01U_0402_16V7K@
1
2
R371 33_0402_5%1 2
R379 33_0402_5%1 2
R171
1.05K_0402_1%
U22
NC7SZ32P5X_NL_SC70-5
B2
A1 Y 4
G3
Vcc
5
U28
NL17SZ17DFT2G_SOT353-5
A2 Y 4NC 1
Vcc
5G
3
C451
0.01U_0402_16V7K@
1
2
C450 0.1U_0402_16V4Z1 2
U24
NL17SZ14DFT2G_SOT353-5A2 Y 4
P5
NC
1
G3
R157
300_0402_5%
12
C448 0.1U_0402_16V4Z1 2
U40
NC7WZ07P6X_NL_SC70-6
GND2
Y2 4
A11
A23
VCC 5
Y1 6
C496 0.1U_0402_16V4Z1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD29PCI_AD30
PCI_AD28
PCI_AD31
PCI_AD26PCI_AD25
PCI_AD27
PCI_AD22PCI_AD23
PCI_AD20
PCI_AD24
PCI_AD21
PCI_AD18PCI_AD17
PCI_AD19
PCI_AD14
PCI_AD16
PCI_AD13
PCI_AD15
PCI_AD12PCI_AD11PCI_AD10PCI_AD9
PCI_AD7PCI_AD6
PCI_AD8
PCI_AD4PCI_AD5
PCI_AD1PCI_AD2PCI_AD3
PCI_AD0
PCI_PARPCI_FRAME#
PCI_STOP#PCI_DEVSEL#
PCI_TRDY#PCI_IRDY#
PCI_AD22 CBS_IDSEL
PCI_REQ#0PCI_GNT#0
PCI_PERR#PCI_SERR#
CBS_GRST#
CLK_PCI_1394
CBS_GRST#
R5C832XI
IEEE1394_TPAN0
R5C832XO
R5_PME#
IEEE1394_TPAP0IEEE1394_TPAN0
IEEE1394_TPBP0IEEE1394_TPBN0
IEEE1394_TPBIAS0
R5C832XIR5C832XO
MSENXDEN
MSEN
UDIO3UDIO4
UDIO3UDIO4
SDCD#_XDCD0#
SDDATA0_MSDATA0
SDDATA2_MSDATA2
MSCD#_XDCD1
SDDATA3_MSDATA3
SDCMD_MSBS
SDPWR0_MSPWR_XDPWRSDWP#_XDRB#
SDDATA1_MSDATA1
SDCLK_MSCLK
TP_UDIO1SERIRQ
TP_UDIO2
UDIO5
+3V_PHY
SDCD#_XDCD0#
SD_MSDATA1
SD_MSDATA2
PCI_CBE#0PCI_CBE#1
PCI_CBE#3PCI_CBE#2
Z3008
IEEE1394_TPBIAS0
IEEE1394_TPAP0
IEEE1394_TPBP0IEEE1394_TPBN0
UDIO5
XDEN
SDDATA1_MSDATA1
SDDATA2_MSDATA2
SDPWR0_MSPWR_XDPWR
IEEE1394_R_TPAN0IEEE1394_R_TPAP0
IEEE1394_R_TPBP0IEEE1394_R_TPBN0
PCI_AD[0..31]<19>
PCI_PAR<19>PCI_FRAME#<19>PCI_TRDY#<19>PCI_IRDY#<19>PCI_STOP#<19>PCI_DEVSEL#<19>
PCI_PERR#<19>PCI_SERR#<19>
PCI_GNT#0<19>PCI_REQ#0<19>
PM_CLKRUN#<20,31>R5_PME#<31>
PCI_PIRQC#<19>PCI_PIRQD#<19>
CLK_PCI_1394<14>PCI_RST#<19,24,28,29,30,31,33>
SERIRQ <20,31,33>
PCI_CBE#0<19>PCI_CBE#1<19>PCI_CBE#2<19>PCI_CBE#3<19>
SUSP#<30,31,40,43,46,47>
SDDATA0_MSDATA0 <27>
SDDATA3_MSDATA3 <27>
SDWP#_XDRB# <27>
SDCMD_MSBS <27>
SDCD#_XDCD0# <27>MSCD#_XDCD1 <27>
SDCLK_MSCLK <27>
SD_MSDATA1 <27>
SD_MSDATA2 <27>
SDDATA1_MSDATA1 <27>SDDATA2_MSDATA2 <27>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3V_PHY
+3VS
+5VS+VCC_3IN1+3VS
+VCC_3IN1
+3V_PHY
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
R5C833 Cardreader+1394Custom
26 49Thursday, September 06, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
Layout Note: Place close to R5C832
Layout Note: Shield GND forIEEE1394_TPA and TPB
Layout Note: Place close to R5C832and Shield GND for SD_CLK
Layout Note: Place close to R5C832and Shield GND for SDCLK_MSCLK
MDIOPIN NameMDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
SD CardPIN NameSDCD#
SDWP#
SDPWR0
SDPWR1
SDLED#
SDCCMD
MDIO09 SDCCLK
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
SDCDAT0
SDCDAT1
SDCDAT2
SDCDAT3
MMC CardPIN Name
MMCDAT
MMCCMD
MMCCLK
MMCCD#
MMCPWR
MMCLED#
MS CardPIN Name
MSCD#
MSWR
MSLED#
MSEXTCK
MSCDAT0
MSCDAT1
MSCDAT2
MSCDAT3
MSBS
MSCCLK
Layout Note: Shield GND forCBS_CCLK_INTERNAL and CBS_CCLK
SD,MMC,MS muti-function pin define
Solve MS Duo Adaptor short problem
40mil
MSEN XDENUDIO3 UDIO4
Pull-up
Function
Pull-upPull-up EnableSD,MS,MMC Card
Pull-low
Function set pin define
Layout Note: Shield GND forCLK_PCI_1394
IEEE1394TPA+/- and IEEE1394TPB+/-Same Wire Length
Layout Note: C268,C270,R125 Place close to R5C832and Shield GND for FIL0,REXT,VREF
12/1 Modified12/1 Modified from 15P to 18P
12/15 Modified 10u X6S to Y5V
12/22 Change from X5R to Y5V
12/22 Change from 10u_1206 to 10u_0805
For EMI => Change L50,L51 to SM070000I00For EMI => Add U38 (SC300000O00)Use SC300000D00 FootPrint
Swap U38 Pin 1,Pin 3
C52
910
U_0
805_
10V
4Z
833@1
2
C21
910
00P
_040
2_50
V7K
833@1
2
C573
27P_0402_50V8J833@
1 2
R45
656
.2_0
603_
1%
833@
12
C52
80.
01U
_040
2_16
V7K
833@1
2
R44
956
.2_0
603_
1%
833@
12
C56
20.
01U
_040
2_16
V7K
833@1
2
R451 100K_0402_5%833@1 2
C21
40.
1U_0
402_
16V
4Z
833@1
2
R46
110
K_0
603_
1%
833@
12
G
D S
Q342N7002_SOT23
@ 2
1 3
R453 10K_0402_5%833@1 2
R454 0_0402_5%833@1 2
T32PAD
R470 10K_0402_5%@1 2
C53
30.
01U
_040
2_16
V7K
833@1
2
R460 0_0402_5%833@1 2
R5C833
U29
R5C832_TQFP128~D833@
AD31125AD30126AD29127AD281AD272AD263AD255AD246AD239AD2211AD2112AD2014AD1915AD1817AD1718AD1619AD1536AD1437AD1338AD1239AD1140AD1042AD943AD844AD746AD647AD548AD449AD350AD251AD152AD053
VCC_PCI3V 10VCC_PCI3V 20
VCC_RIN 61
VCC_ROUT 16VCC_ROUT 34
VCC_3V 67
VCC_MD3V 86
AVCC_PHY3V 98AVCC_PHY3V 106AVCC_PHY3V 110
TPBIAS0 113
MDIO00 80
MDIO03 77MDIO04 76MDIO05 75MDIO06 74MDIO07 73
MDIO10 82MDIO11 81MDIO12 93MDIO13 90
FIL0 96
VREF 100REXT 101
MDIO08 88MDIO09 84
MDIO01 79MDIO02 78
MDIO14 91MDIO15 89MDIO16 92MDIO17 87MDIO18 85MDIO19 83
C/BE3#7C/BE2#21C/BE1#35C/BE0#45
PAR33FRAME#23TRDY#25IRDY#24STOP#29DEVSEL#26IDSEL8PERR#30SERR#31
NC97
TEST66 HWSPND#69
INTA#115INTB#116
PCICLK121PCIRST#119GBRST#71CLKRUN#117PME#70
REQ#124GNT#123
AGND99 AGND102 AGND103
GND 4GND 13GND 22GND 28
UDIO0/SERIRQ# 72UDIO1 60UDIO2 56UDIO3 65UDIO4 59UDIO5 57
XI 94XO 95
MSEN 58XDEN 55
AGND107 AGND111
GND 54GND 62GND 63GND 68GND 118GND 122
VCC_PCI3V 32VCC_PCI3V 27
VCC_PCI3V 41
VCC_ROUT 114VCC_ROUT 64
VCC_ROUT 120
VCC_PCI3V 128
AVCC_PHY3V 112
TPAP0 109TPAN0 108
TPBP0 105TPBN0 104
R469 0_0402_5%
833@
12
R455 10K_0402_5%833@1 2
C55
30.
01U
_040
2_16
V7K
833@1
2
L20
BLM21A601SPT_0805833@
1 2
R466
100K_0402_5%833@
12
C57
910
U_0
805_
10V
4Z
833@1
2
U31
RT9701-PB_SOT23-5833@
VIN3VIN/CE4 VOUT 1
VOUT 5
GND2
X3
24.576MHz_16P_1BG24576CKIA
833@
12
C56
90.
47U
_060
3_16
V4Z
833@1
2
C58
00.
1U_0
402_
16V
4Z
833@1
2
C574
27P_0402_50V8J833@
1 2
C56
70.
01U
_040
2_16
V7K
833@1
2
T31PAD
C210
10U_0805_10V4Z833@
1
2
C572
1U_0603_10V4Z833@
C22
410
00P
_040
2_50
V7K
833@1
2
R423 100_0402_5%
833@1 2
R464 10K_0402_5%833@1 2
C57
71U
_060
3_10
V4Z
833@
1
2
R465 0_0402_5%@1 2
JP25
SUYIN_020115FB004S512ZLME@
TPB-1TPB+2TPA-3TPA+4
GND 5GND 6GND 7GND 8R462 0_0402_5%833@1 2
R45
256
.2_0
603_
1%
833@
12
C56
327
0P_0
402_
50V7
K
833@
1
2
C5700.01U_0402_16V7K833@
1 2
L51
WCM-2012-670T_4P
@
11 2 2
3 344
C57
510
U_0
805_
10V
4Z
833@1
2
R447 10K_0402_5%@1 2
C578
0.1U_0402_16V4Z833@
1
2
C54
10.
47U
_060
3_16
V4Z
833@1
2
U38
CM1293-04SO_SOT23-6
@
CH3 6
Vp 5
CH4 4
CH23
Vn2
CH11
G
D
S
Q322N7002_SOT23@
2
13
C55
80.
33U
_060
3_16
V4Z
833@1
2
R445 0_0402_5%833@1 2
R467
100K_0402_5%833@
12
C56
40.
01U
_040
2_16
V7K
833@1
2
C56
80.
01U
_040
2_16
V7K
833@1
2
R45
856
.2_0
603_
1%
833@
12
R457 0_0402_5%833@1 2
L50
WCM-2012-670T_4P
@
11 2 2
3 344
C56
510
U_0
805_
10V
4Z
833@1
2
C57
10.
01U
_040
2_16
V7K
833@1
2
R442
10_0402_5%@
12
G
D S
Q332N7002_SOT23
@
2
1 3
R45
95.
1K_0
603_
1%
833@
12
R463 10K_0402_5%
833@1 2
C544
4.7P_0402_50V8C@1
2
C21
10.
1U_0
402_
16V
4Z
833@1
2
R448 10K_0402_5%833@1 2
C56
60.
1U_0
402_
16V
4Z
833@1
2
R471 0_0402_5%
833@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDCMD_MSBSSDCD#_XDCD0#
SDWP#_XDRB#SDCLKSDCLK_MSCLK
MSCD#_XDCD1
SDCMD_MSBS
MSCLKSDCLK_MSCLK
SDDATA0_MSDATA0
SDDATA3_MSDATA3
SD_MSDATA1SD_MSDATA2
SDDATA0_MSDATA0
SDDATA3_MSDATA3SDDATA2_MSDATA2
SDDATA1_MSDATA1
SDDATA0_MSDATA0<26>
SDDATA3_MSDATA3<26>
SD_MSDATA1<26>SD_MSDATA2<26>
SDCLK_MSCLK<26>
MSCD#_XDCD1<26>
SDWP#_XDRB#<26>
SDCD#_XDCD0#<26>SDCMD_MSBS<26>
SDDATA1_MSDATA1<26>
SDDATA2_MSDATA2<26>
+VCC_3IN1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
3 IN 1 CardReader Conn.Custom
27 49Thursday, September 06, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
3 in 1 Card ReaderJP24
PROCO_MDR019-C0-1202ME@
GND23 GND22
SDIO_MS18BS_MS20
VSS_MS21
INS_MS16
VSS_SD8
SCLK_MS14
DAT1_SD10DAT2_SD2
CMD_SD4 WP_SD11
VCC_MS13
VDD_SD6
CD_SD1
RESERVED_MS17 RESERVED_MS15
VCC_MS19
CLK_SD7
DAT0_SD9
CD/DAT3_SD3
VSS_MS12
VSS_SD5
R476 22_0402_5%1 2
R477 22_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LED1
LANGND
MDCMDIO
MDIO
TXD0TXD1TXD2TXD3TXEN
LED4
LAN_XTAL_IN
RCT
LAN_XTAL_OUT
LED0
LED2
PWFBOUT
PWFBOUT
PWFBIN
TPRX-
TCT
LED3
TPRX+
PWFBOUT
RTSET
LED0
ISOLATE
RXCT
RPTR
TXCT
COL
TPRX-TPRX+
RX-
PWFBIN
TX-
LED2
RX+
TPTX-
TPTX+
TXCT
TX+
TX+
RXCT
TX-
SPEEDDUPLEX
TPRX+
ANE
TPRX-
LDPS
TPTX-TPTX+
LED3
RX+
RXER
RX-
LED1
CRS
LED4
MII_SNIB
TPTX+
RESETB
TPTX-
LED3
RXD_VRXD_0RXD_1RXD_2RXD_3RXC
LED2
ISOLATE
TXC
COL_RCRS_RRXER_R
LED0 LINKLED#
TXD0<20>TXD1<20>TXD2<20>TXD3<20>TXEN<20>TXCLK<20>RXDV<20>RXD0<20>RXD1<20>RXD2<20>RXD3<20>RXCLK<20>
MDC<20>
PCI_RST# <19,24,26,29,30,31,33>
MDIO<20>
COL<20>CRS<20>RXER<20>
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN_AVDD
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3VALW
+3V_LAN+3V_LAN_AVDD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
LAN RTL8201CLCustom
28 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Lan Conn.
Place L47, C460, C462, C463 as close to each power pinas possible.
Place C464, C465, L48 close to PWFBOUT and place C466 close to PWFBIN.
LINKLED
ACTIVITY LED
Other CG useOther CG use 1210
Other CG use 1206
LED0 LED1 LED2 LED3 LED4Link Dupx 10Act 100Act COL
For EMI => Change C31,C38 from SE071680J80 (68pF) to SE074681K80 (680pF)
7/20 Swap pin 1,2 to 7,8 and 16,15 to 10,9
7/30 modified from 27P to 33P
8/1 Change R12 from 300ohm to 150ohm
8/1 Change D7,D8 from SC1B751V010 to SC11N414880
8/27 Change D7,D8 footprint from RLS4148_LL34-2 to LL34
8/30 Add L61 FBMA-L10-160808-800LMT_0603 for EMI
L15
FBM-L11-160808-601LMT_060312
R572 75_0402_5%1 2R116 4.7K_0402_5%1 2
D8 RLS4148_LL34-212
R149
0_0603_5%
L61FBMA-L10-160808-800LMT_0603
1 2R18 300_0402_5%1 2
R571 33_0402_5%1 2
C150
10U_0805_10V4Z
1
2
R26 49.9_0402_1%1 2
C41
0.1U_0402_16V4Z1 2
R368 4.7K_0402_5%1 2
R363 0_0402_5%1 2
R366 4.7K_0402_5%@1 2
R138 33_0402_5%1 2
R573 75_0402_5%1 2
R117 33_0402_5%1 2
R129 33_0402_5%1 2
C95
10U_0805_10V4Z
1
2
R351 2K_0402_1%1 2
R357 4.7K_0402_5%1 2
R362
4.7K_0402_5%
12
R41 49.9_0402_1%1 2
R12 150_0402_1%
1 2
C1210.1U_0402_16V4Z
1
2
D32
PSOT24C_SOT23@
2
31M
II I/F
Network I/F
CLK
PHY/LED
PWR
GND
U8
RTL8201CL-VD-LF
MDC25MDIO26TXD06TXD15TXD24TXD33TXEN2TXC7RXDV22RXD021RXD120RXD219RXD318RXC16COL1CRS23RXER/FXEN24
PHYAD3/LED313 PHYAD2/LED212 PHYAD1/LED110 PHYAD0/LED09
LDPS 41
RPTR 40
NC 27
PWFBIN 8
PWFBOUT 32
ISOLATE 43
RTSET 28
SPEED 39DUPLEX 38
X146
X247
TPTX- 33TPTX+ 34
TPRX- 30TPRX+ 31
PHYAD4/LED415
DVDD33 14DVDD33 48
ANE 37
AVDD33 36
AGND 29AGND 35
MII/SNIB44
DGND 17DGND 45
DGND 11
RESETB 42
R350 1.5K_0402_1%1 2
C56
0.1U_0402_16V4Z
1
2
C38 680P_0402_50V7K12
JP23
TYCO_3-440470-4<BOM Structure>
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED-11
Amber LED+12
SHLD1 13
SHLD2 14
SHLD2 16
SHLD1 15
R360 4.7K_0402_5%1 2
R156 33_0402_5%1 2
R153 4.7K_0402_5%1 2
R575 75_0402_5%1 2
R30 0_0603_5%
C435
0.1U_0402_16V4Z
1
2
L16
FBM-L11-160808-601LMT_06031 2
R570 33_0402_5%1 2
T1
350uH_NS0013LF
RD+1RD-2CT3
CT6TD+7TD-8 TX- 9TX+ 10CT 11
CT 14RX- 15RX+ 16
NC4NC5 NC 13
NC 12
C1530.1U_0402_16V4Z
1
2
D7 RLS4148_LL34-212
Y3
25MHZ_20PF_6X25000017
1 2
C50
0.1U_0402_16V4Z
1
2
C147
0.1U_0402_16V4Z
1
2
R29 75_0402_5%1 2
D33
PSOT24C_SOT23@
2
31
R122 33_0402_5%1 2
R33 0_0603_5%
R353 4.7K_0402_5%1 2
R361 4.7K_0402_5%1 2
R135 33_0402_5%1 2
C274.7U_0805_10V4Z
1
2
R34 75_0402_5%1 2
R36 49.9_0402_1%1 2
R123 4.7K_0402_5%1 2
C117
33P_0402_50V8J
C115
33P_0402_50V8J
C42
1000P_1206_2KV7K
1 2
R569 33_0402_5%1 2
C149
4.7U_0805_10V4Z
1
2
R364 4.7K_0402_5%1 2
C60
0.1U_0402_16V4Z1 2
R367 4.7K_0402_5%1 2
R154 4.7K_0402_5%1 2
R359 0_0402_5%@1 2
C260.1U_0402_16V4Z
1
2
R354 4.7K_0402_5%1 2
C31 680P_0402_50V7K12
R574 75_0402_5%1 2
C102
0.1U_0402_16V4Z
1
2
R109 33_0402_5%1 2
C1010.1U_0402_16V4Z
1
2
R97 4.7K_0402_5%1 2
R356 4.7K_0402_5%1 2
C1220.1U_0402_16V4Z
1
2
R23 49.9_0402_1%1 2
R152 4.7K_0402_5%@1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
KILL_SW#
MINI_RF_OFF#
CLK_PCIE_WLAN#CLK_PCIE_WLAN
DCLKDDATA
WLAN_CLKREQ#
WLAN_ACTIVEMINI_VCC
USB20_N3_RUSB20_P3_R
SB_PCIE_WAKE#
BT_ACTIVE
WLAN_LED#
MINI_RF_OFF#
RF_ON#
PCI_RST#
PCIE_CLK_WLAN#<14>PCIE_CLK_WLAN<14>
DCLK <14,30>DDATA <14,30>
USB20_N3 <21>USB20_P3 <21>
SB_PCIE_WAKE#<7,21,30>
WLAN_CLKREQ#<14>
WLAN_ACTIVE<33>
KILL_SW# <31,34>
BT_ACTIVE<33>
WLAN_LED# <34,37>
RF_ON# <31>
PCIE_PTX_C_IRX_P0<20>PCIE_PTX_C_IRX_N0<20>
PCIE_ITX_C_PRX_N0<20>PCIE_ITX_C_PRX_P0<20>
PCI_RST# <19,24,26,28,30,31,33>
+3VALW
+1.5VS +3VS
+3VALW
+3VALW
+5VS
+3VS +1.5VS
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
Mini-Card/Kill SW
29 49Thursday, September 06, 2007
2006/08/05 2007/08/05Compal Electronics, Inc.
Kill SWITCH
Mini-Express Card for WLAN***
12/13 Add
12/19 Change SW2 to correct symbol (by EMI)
12/28 modified to @
8/31Add R593 connect net WLAN_ACTIVE to JP22 pin38/31Add R594 connect net BT_ACTIVE to JP22 pin5
C208
0.1U_0402_16V4Z
1
2
R222
100K_0402_5%
1 2
R583 0_0402_5% 1 2
C206
0.01U_0402_16V7K
1
2
C203
4.7U_0805_10V4Z
1
2
R208
10K_0402_5%
12
C205
0.1U_0402_16V4Z
1
2
R593 0_0402_5% 1 2
L21
KC FBM-L11-201209-221LMAT_0805
1 2
C241
0.01U_0402_16V7K
1
2
R529
0_0402_5%
@1 2
D18DAN217_SC59@
231
C199
4.7U_0805_10V4Z
1
2
R584 0_0402_5% 1 2
C207
0.1U_0402_16V4Z
1
2
R594 0_0402_5% 1 2
R268
100K_0402_5%14W@1
2
JP22
FOX_AS0B226-S56N-7FME@
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54 SW11BS003-1210L_3P14W@
11
22
33
G1
4G
25
G
D
S
Q112N7002_SOT23
2
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP#SYSON
PERST1#RCLKEN1
CP_PE#
PCI_RST#
CP_USB#PERST1#
EXP_CLKREQ1#
CP_USB#
RCLKEN1
EXP_CLKREQ1#
CP_PE#
+USB_VCCB+USB_VCCB
USB20_R_P6 USB20_R_N6USB20_R_P0 USB20_R_N0
USB20_R_N0USB20_R_P0
USB20_R_N6USB20_R_P6USB20_N0
USB20_P0
USB20_N6USB20_P6
SB_PCIE_WAKE#<7,21,29>
USB20_P2<21>USB20_N2<21>
PCIE_CLK_EXP#<14>PCIE_CLK_EXP<14>
PCI_RST#<19,24,26,28,29,31,33>
EXP_CLKREQ# <14>
SYSON<31,40>SUSP#<26,31,40,43,46,47>
PCIE_PTX_C_IRX_N1<20>
PCIE_ITX_C_PRX_N1<20>PCIE_ITX_C_PRX_P1<20>
PCIE_PTX_C_IRX_P1<20>
USB20_N6<21>USB20_P6<21>USB20_N0<21>
USB20_P0<21>
CP_PE#<20>
DDATA<14,29>DCLK<14,29>
USB_OC#06 <21>
USB1_ON#<31>
+3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1
+3VALW_CARD1
+1.5VS
+3VALW
+3VS_CARD1
+1.5VS_CARD1
+3VS
+3VS
+3VALW_CARD1
+3VS_CARD1
+1.5VS_CARD1
+3VS +3VS
+3VS +1.5VS+3VALW
+USB_VCCB
+USB_VCCB+USB_VCCB
+USB_VCCB
+3VALW
+USB_VCCB+5VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
NewCard & USB ConnectorB
30 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
60mils
New Card Power Switch
40mil
40mil
Imax = 1.35A Imax = 0.75AImax = 0.275A
New Card Socket (Left/TOP)
(NEW)
W=80milsW=80mils
USB CONN. 1
SUYIN_020173MR004G533ZR_4PSUYIN_020173MR004G533ZR_4P
Update Footprint
Update Footprint
USB CONN. 2
12/7 Let pin 28 dummy by EMI request12/13 Let pin 27 dummy by layout request12/27 change JP 15 footprint to FOX_1CX41201_26P_LT-S04/17 Symbol Add Pin 29,30
For EMI => Add R532,R533,R534,R535 (SD028000080) ,L56,L57 (SM070000I00)
For EMI => Change D27,D28 from SC300000100 to SC300000P00
7/24 EMI added 7/24 EMI added
7/24 EMI added
7/30 change L56,57 to SM070000K00 by EMI request
G
D
S
Q352N7002_SOT23NEWCARD@
2
13
JP15
FOX_1CX41201_26P_LT-SNEWCARD@
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26
GND27GND28GND29GND30
+ C505
150U_D_6.3VM
1
2
L56
WCM-2012-670T_4P
@
11 2 2
3 344
C667
2200P_0402_25V7K
C462
4.7U_0805_10V4Z
1
2
R533 0_0402_5%
1 2
C591
10U_0805_10V4ZNEWCARD@
1
2
C586
10U_0805_10V4ZNEWCARD@
1
2
U33
NC7SZ32P5X_NL_SC70-5NEWCARD@
B2
A1 Y 4
G3
Vcc
5
L57
WCM-2012-670T_4P
@
11 2 2
3 344
R411
10K_0402_5%
12
D27
PRTR5V0U2X_SOT143@
VCC 4
I/O 3
GND1
I/O2
C593
0.1U_0402_16V4ZNEWCARD@
1
2
R475 100K_0402_5%NEWCARD@
1 2
R532 0_0402_5% 1 2
JP17
SUYIN_020173MR004G565ZRME@
VCC1D-2D+3GND4
GND15GND26GND37GND48
R478
10K_0402_5%NEWCARD@
12
C585
10U_0805_10V4Z@
1
2
C589
0.1U_0402_16V4ZNEWCARD@
1
2
C592
10U_0805_10V4Z@
1
2
JP16
SUYIN_020173MR004G565ZRME@
VCC1D-2D+3GND4
GND15GND26GND37GND48
U27
G528_SO8
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
R474 100K_0402_5%NEWCARD@
1 2
R479
10K_0402_5%NEWCARD@
12
C487
2200P_0402_25V7K
U32
TPS2231PWPR_PWP24NEWCARD@
GN
D11
OC# 23
3.3Vin153.3Vin26
1.5Vin1181.5Vin219
3.3Vaux_in21
3.3Vout1 73.3Vout2 8
Aux_out 20
1.5Vout1 161.5Vout2 17
CPUSB#14CPPE#15STBY#4SHDN#3 RCLKEN 22
PERST# 9
NC
11
NC
210
NC
312
NC
413
NC
524
SYSRST#2
R589
0_0402_5%
1 2
C588
10U_0805_10V4ZNEWCARD@
1
2
C590
0.1U_0402_16V4ZNEWCARD@
1
2
C445
470P_0402_50V7K
1
2
R535 0_0402_5%
1 2R534 0_0402_5% 1 2
C668
2200P_0402_25V7K
C584
10U_0805_10V4Z@
1
2
D28
PRTR5V0U2X_SOT143@
VCC 4
I/O 3
GND1
I/O2
+ C449
150U_D_6.3VM@
1
2
C587
0.1U_0402_16V4ZNEWCARD@
1
2
C508
470P_0402_50V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ECAGND
EC_TX_P80_DATAEC_RX_P80_CLK
XCLKI
TP_CLKTP_DATA
WWW_USER_BTN#
MUTE_BTN#
SMART_CHARGE_BTN#
EC
AG
ND
SB_PWRGD
FRD#SPI_SO
RF_ON#
FWR#SPI_SI
EC_ON
FSEL#SPICS#
ON/OFF#
FSTCHG
USB1_ON#POWER_USB_LED#
CHGSEL
EC_PME#
EC_SMB_DA2
EC_SMB_CK2
KSO17
FRD#SPI_SO
FSEL#SPICS#
XCLKO
KSO3
EC_SCI#
KSI0
EC_RST#
LPC_AD2LPC_AD1
PCI_RST#CLK_PCI_EC
LPC_AD3LPC_FRAME#SERIRQ
LPC_AD0
KSO[0..15]
GATEA20
KSI1
KSO0
KSI4KSI5KSI6
KSI2
KSI7
KSI3
KSO1
KSI[0..7]
KSO2
KSO4KSO5KSO6KSO7KSO8KSO9KSO10KSO11KSO12KSO13KSO14KSO15
FAN_SPEED1USB2_ON#EC_PME#PBTN_OUT#
EC_SMB_DA1
EC_SMB_CK1
TP_DATA
TP_CLK
SYSON
EC_SMI#
AUX_PWRGDPM_SLP_S3#
LID_SW#
EC_LID_OUT#
EC_SMB_DA2
EC_SMB_DA1EC_SMB_CK2
PM_SLP_S5#
EC_SMB_CK1
BKOFF#
CAPS_LED#
EC_TX_P80_DATA
NUM_LED#
EC_RX_P80_CLK
SCROLL_LED#
SPI_CLK
SUSP#
ACINVR_ON
ENBKL_Q
BATT_TEMPECAGND
INVT_PWM
IREF
DAC_BRIG
ACOFF
EN_FAN1
BEEP#
BATT_OVP
MB_ID
MB_ID
CHARGE_LED0#
CHARGE_LED1#
EC_SCI#
SERIRQ
EN_FAN1
BEEP#
SB_PWRGD
AUX_PWRGD
SYSON
PBTN_OUT#
EC_THERM#KSO3
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#SPI_CS#
SPI_SI
SPI_CLK_R
KB_RST#
BT_ON#
POWER_USB_BTN#
WWW_USER_BTN#
EMAIL_BTN#
MUTE_BTN#
SMART_CHARGE_BTN#
EC_MUTE#
PSON#KSO17
S3AUXSW#
SUSP#
ENBKL_Q
VR_ON
ACINXCLKO XCLKI
PWR_LED#
MUTE_LED1#
ADP_I
EC_MUTE#
MUTE_LED#
EMAIL_BTN#POWER_USB_BTN#
KILL_SW#
EAPDEC_THERM#
ENBKL_Q
TP_DATA <33>TP_CLK <33>
WWW_USER_BTN# <32>
MUTE_BTN# <32>
RF_ON# <29>
EC_ON <34>
ON/OFF#<34>
FRD#SPI_SO <33>
FSTCHG <43>
SB_PWRGD <9,20>
USB1_ON# <30>POWER_USB_LED# <32>
CHGSEL <43>
R5_PME#<26>
PCI_PME#<20>
SERIRQ<20,26,33>LPC_FRAME#<20,33>
PCI_RST#<19,24,26,28,29,30,33>
EC_SCI#<20>
LPC_AD2<20,33>LPC_AD1<20,33>
LPC_AD3<20,33>
LPC_AD0<20,33>
KB_RST#<20>GATEA20<20>
USB2_ON#<34>
PBTN_OUT#<20>
FAN_SPEED1<4>
CLK_PCI_EC<14>
EC_SMI#<20>
SYSON <30,40>
BKOFF# <16>
EC_LID_OUT# <20>PM_SLP_S3#<20>PM_SLP_S5#<20>
CHARGE_LED1# <34,37>
EC_SMB_CK2<4>
EC_SMB_CK1<33,42>EC_SMB_DA1<33,42>
EC_SMB_DA2<4>
LID_SW#<34>
CAPS_LED# <32>
AUX_PWRGD <9,20>
NUM_LED#<32>
CHARGE_LED0# <34,37>
EC_TX_P80_DATA<12,13>
SCROLL_LED# <32>
SUSP#<26,30,40,43,46,47>
VR_ON <48>
BATT_OVP <43>BATT_TEMP <42>
DAC_BRIG <16>EN_FAN1 <4>IREF <43>
INVT_PWM <16>BEEP# <35>
SPI_CS#<33>
SPI_CLK_R<33>
SPI_SI<33>
SMART_CHARGE_BTN# <32>
PSON# <20>S3AUXSW# <8>
PM_CLKRUN#<20,26>
MUTE_LED1#<32,35>
ADP_I <43>
EC_MUTE# <36>
MUTE_LED# <32>
PWR_LED# <32,34,37>
EMAIL_BTN# <32>POWER_USB_BTN# <32>
KILL_SW# <29,34>
EAPD <35,36>EC_THERM# <20>
ACOFF <41,43>
ENBKL<18>
BT_ON# <33>
ACIN <41>
EC_RX_P80_CLK<12,13>
KSI[0..7]<32>
KSO[0..15]<32>
+3VALW +EC_AVCC
+EC_AVCC
+3VALW
+3VALW +EC_DVCC
+3VS
+3VALW
+5VALW
+5VS
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
EC_KB926Custom
31 49Thursday, September 06, 2007
2005/03/01 2006/03/01
EC DEBUG PORT
Ra
Rb
KB926 SPI STRAP PIN
ISP MODE SUPPORT
Level Shift Circuit
7/30 modified from 15P to 12P
R349 0_0402_5%1 2
R33147K_0402_5%1 2
C391
0.1U_0402_16V4Z
1
2
C374 100P_0402_50V8J1 2
R325 100K_0402_1%@1 2
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U21
KB926QFA1 LQFP 128P<BOM Structure>
GA20/GPIO001KBRST#/GPIO012SERIRQ#3LFRAME#4LAD35
PM_SLP_S3#/GPIO046
LAD27LAD18
VC
C9
LAD010
GN
D11
PCICLK12PCIRST#/GPIO0513
PM_SLP_S5#/GPIO0714EC_SMI#/GPIO0815LID_SW#/GPIO0A16SUSP#/GPIO0B17PBTN_OUT#/GPIO0C18EC_PME#/GPIO0D19
SCI#/GPIO0E20
INVT_PWM/PWM1/GPIO0F 21
VC
C22
BEEP#/PWM2/GPIO10 23
GN
D24
EC_THERM#/GPIO1125
FANPWM1/GPIO12 26ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO1428FANFB2/GPIO1529EC_TX/GPIO1630EC_RX/GPIO1731ON_OFF/GPIO1832
VC
C33
PWR_LED#/GPIO1934
GN
D35
NUMLED#/GPIO1A36
ECRST#37
CLKRUN#/GPIO1D38
KSO0/GPIO2039KSO1/GPIO2140KSO2/GPIO2241KSO3/GPIO2342KSO4/GPIO2443KSO5/GPIO2544KSO6/GPIO2645KSO7/GPIO2746KSO8/GPIO2847KSO9/GPIO2948KSO10/GPIO2A49KSO11/GPIO2B50KSO12/GPIO2C51KSO13/GPIO2D52KSO14/GPIO2E53KSO15/GPIO2F54
KSI0/GPIO3055KSI1/GPIO3156KSI2/GPIO3257KSI3/GPIO3358KSI4/GPIO3459KSI5/GPIO3560KSI6/GPIO3661KSI7/GPIO3762
BATT_TEMP/AD0/GPIO38 63BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65AD3/GPIO3B 66
AV
CC
67
DAC_BRIG/DA0/GPIO3C 68
AG
ND
69
EN_DFAN1/DA1/GPIO3D 70IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75SELIO2#/AD5/GPIO43 76
SCL1/GPIO4477SDA1/GPIO4578SCL2/GPIO4679SDA2/GPIO4780
KSO16/GPIO4881KSO17/GPIO4982
PSCLK1/GPIO4A 83PSDAT1/GPIO4B 84PSCLK2/GPIO4C 85PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GN
D94
SYSON/GPIO56 95
VC
C96
SDICS#/GPXOA00 97SDICLK/GPXOA01 98SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106GPXO10 107GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VC
C11
1
ENBKL/GPXID2 112
GN
D11
3
GPXID3 114GPXID4 115GPXID5 116GPXID6 117GPXID7 118
SPIDI/RD# 119SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1122XCLK0123 V18R 124
VC
C12
5
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C419
100P
_040
2_50
V8J
1
2
R326 0_0402_5%1 2
R322 10K_0402_5%12
R328
20M_0603_5%@1 2
R317 4.7K_0402_5%@1 2
C361
100P
_040
2_50
V8J
1
2
C380
12P_0402_50V8J
C358
100P_0402_50V8J@
1
2
C372
100P
_040
2_50
V8J
1
2
R341 0_0402_5%1 2
C382 100P_0402_50V8J1 2
R318 10K_0402_5%@1 2
R340 10_0402_5%@ 12
R327 4.7K_0402_5%@ 12
C356
0.1U_0402_16V4Z
1
2
C381
12P_0402_50V8J
C413 100P_0402_50V8J@1 2
R307 10K_0402_5%@1 2
R315 4.7K_0402_5%1 2
C363
1000P_0402_50V7K
1
2
R320 10K_0402_5% 1 2
R312
100K_0402_5%RA@
12
C389 100P_0402_50V8J1 2
L28
FBM-11-160808-601-T_06031 2
C401
100P
_040
2_50
V8J
1
2
R342 0_0402_5%1 2
C418
100P
_040
2_50
V8J
1
2
C417
0.1U_0402_16V
4Z
1
2
R347 10K_0402_5%12
R316 4.7K_0402_5%1 2
C371
100P
_040
2_50
V8J
1
2
R59 10K_0402_5%12
C355
0.1U_0402_16V4Z1
2
C359
1000P_0402_50V
7K
1
2
R546
47K_0402_5%
1 2
C370 0.01U_0402_16V7K 1 2
D26
RB751V_SOD323
@2 1
C386
0.1U_0402_16V
4Z
1
2
C373
1000P_0402_50V
7K
1
2
R335 100K_0402_1%@1 2
C406
0.1U_0402_16V
4Z
1
2
R311
0_0402_5%14_A@
12
C415
100P
_040
2_50
V8J
1
2
R545 15K_0402_5% 1 2
R63 10K_0402_5%12
R64 10K_0402_5%12
EB
CQ40MMBT3904_SOT23
2
31
R309 4.7K_0402_5%1 2
C426
22P_0402_50V8J@
12
R60 10K_0402_5%12
C396
0.1U_0402_16V
4Z
1
2
R332 0_0402_5%1 2
R547 10K_0402_5% 1 2
L27 FBM-11-160808-601-T_06031 2
EB
CQ39MMBT3904_SOT23
2
31
R310 4.7K_0402_5%@1 2
L29 FBM-11-160808-601-T_06031 2
R329 0_0402_5%@1 2
R348 0_0402_5%@1 2
JP61
ACES_85205-0400ME@
11223344
C360
100P
_040
2_50
V8J
1
2
C357
100P_0402_50V8J@
1
2
R308 4.7K_0402_5%1 2
X2
32.768KHZ_12.5PF_Q13MC14610002
OS
C4
OS
C1
NC
3
NC
2
C416
100P
_040
2_50
V8J
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..15]
KSI[0..7]
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
EMAIL_BTN#
51_ON#D_POWER_USB_BTN#
POWER_USB_BTN#
KSO15KSO10KSO11KSO14KSO13KSO12KSO3KSO6KSO8KSO7KSO4KSO2KSI0KSO1KSO5KSI3KSI2KSO0KSI5KSI4KSO9KSI6KSI7KSI1
KSO6KSO8KSO7KSO4KSO2KSI0KSO1KSO5KSI3KSI2KSO0KSI5KSI4KSO9KSI6KSI7KSI1
KSO15KSO10KSO11KSO14KSO13KSO12KSO3
ON/OFFBTN#PWR_LED#
SATA_LED#CAPS_LED#NUM_LED#SCROLL_LED#ON/OFFBTN#
PWR_LED#
SMART_CHARGE_BTN#+VCC_LED
R_MUTE_LED#
WWW_USER_BTN#
R_MUTE_LED#POWER_USB_LED#
D_POWER_USB_BTN#
MUTE_BTN#
PWR_LED#
POWER_USB_LED#
ON/OFFBTN#
PWR_LED#
WWW_USER_BTN#
D_POWER_USB_BTN#
MUTE_BTN#
SMART_CHARGE_BTN#
EMAIL_BTN#
SATA_LED#
KSO[0..15] <31>
KSI[0..7] <31>
51_ON# <34,41>
POWER_USB_BTN# <31>
SATA_LED#<21>CAPS_LED#<31>NUM_LED#<31>
SCROLL_LED#<31>
PWR_LED#<31,34,37>
SMART_CHARGE_BTN#<31>
EMAIL_BTN#<31>WWW_USER_BTN#<31>
ON/OFFBTN#<34>
MUTE_LED1#<31,35>
MUTE_LED#<31>
POWER_USB_LED#<31>
MUTE_BTN#<31>
+5VS
+5VALW
+5VALW
+3VALW
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
KB /SW Conn.B
32 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
INT_KBD Conn.
For JFW91 For JFW01
Switch Board Conn.
12/14 Add for MUTE_LED#
7/30 EMI added
7/30 change D38 pn as SCA000002008/1 Change D38 value PSOT24C_SOT23 from to PJSOT05C_SOT23 , Add D39
C131 100P_0402_50V8J 1 2
R313 0_0402_5% 12
C135 100P_0402_50V8J 1 2
C123 100P_0402_50V8J 1 2
C142 100P_0402_50V8J 1 2
D36
PSOT24C_SOT23@
2
31
C124 100P_0402_50V8J 1 2
D35
PSOT24C_SOT23@
2
31
C137 100P_0402_50V8J 1 2
C125 100P_0402_50V8J 1 2
D37
PSOT24C_SOT23@
2
31
R48 0_0402_5% 1 2
C140 100P_0402_50V8J 1 2
JP44
ACES_88502-2501ME@
1122334455667788991010111112121313141415151616171718181919202021212222232324242525
GND 26GND 27
D39
PSOT24C_SOT23@
2
31
JP48
ACES_85201-2005ME@
11 22 33 44 55 66 77 88 99 1010 1111 1212 1313 1414
1616 1717 1818
1515
20201919
C128 100P_0402_50V8J 1 2
C130 100P_0402_50V8J 1 2
C144 100P_0402_50V8J 1 2
C138 100P_0402_50V8J 1 2
G
D
S Q272N7002_SOT23
2
13
C141 100P_0402_50V8J 1 2
D13
DAN202UT106_SC70-3
2
31
D38
PJSOT05C_SOT23@
2
31
JP43
ACES_88502-2501ME@
1122334455667788991010111112121313141415151616171718181919202021212222232324242525
GND 26GND 27
R62
10K_0402_5%
12
C127 100P_0402_50V8J 1 2
C132 100P_0402_50V8J 1 2
C146 100P_0402_50V8J 1 2
C145 100P_0402_50V8J 1 2
C129 100P_0402_50V8J 1 2
G
D
SQ28
2N7002_SOT23
2
13
C139 100P_0402_50V8J 1 2
R47 0_0402_5%@1 2
C136 100P_0402_50V8J 1 2
C126 100P_0402_50V8J 1 2
R314
0_0402_5%@
12
R304
10K_0402_5%
12
C134 100P_0402_50V8J 1 2
C143 100P_0402_50V8J 1 2
C133 100P_0402_50V8J 1 2
SPI_CS#
SPI_SI SPI_SO
SPI_CLK_RTP_DATA
TP_CLK
USB20_P1_1_R
USB20_P1_2_R
TP_CLKTP_DATA
WLAN_ACTIVE
WLAN_ACTIVELPC_FRAME#
LPC_AD1
LPC_AD3LPC_AD2
LPC_AD0
CLK_PCI_DB
PCI_RST#
PCI_RST#
LPC_AD0
LPC_AD3
LPC_DRQ0#LPC_FRAME#
LPC_AD2LPC_AD1
SERIRQCLK_PCI_DB
BT_ACTIVE
BTON_LED
BT_LED#BT_ACTIVE
BTON_LED
EC_SMB_DA1
EC_SMB_CK1
EEPROM_VCC
SPI_CLK_R
SPI_CS#SPI_SO
SPI_SI
USB20_N1_2_RUSB20_N1_1_R
EC_SMB_CK1<31,42>EC_SMB_DA1<31,42>
SPI_SI<31>
SPI_CS#<31>
SPI_CLK_R<31>
USB20_N1_1<21>USB20_P1_1<21>
BT_ON#<31>
USB20_P1_2<21>USB20_N1_2<21>
BT_ON#<31>
TP_CLK<31>TP_DATA<31>
WLAN_ACTIVE<29>
PCI_RST# <19,24,26,28,29,30,31>
CLK_PCI_DB <14>
LPC_FRAME# <20,31>LPC_AD3 <20,31>LPC_AD2 <20,31>LPC_AD1 <20,31>LPC_AD0 <20,31>
LPC_DRQ0# <20>
CLK_14M_SIO <14>
SERIRQ <20,26,31>
BT_ACTIVE<29>
BT_LED#<34,37>
FRD#SPI_SO <31>
EEPROM_VCC
+3VALW
+5VS
+BT_VCC
+3VALW
+BT_VCC
+BT_VCC_1
+3VALW
+BT_VCC_1
+5VS
+3VS
+3VS
+5VS
+5VS
EEPROM_VCC+5VALW+3VALW
EEPROM_VCC
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
BIOS, I/O Port & K/B ConnectorB
33 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
20mils
Update Footprint
To TP/B Conn.8M SPI ROM
FOR LPC DEBUG PORT Need to check BT pin definition again!Bluetooth Conn.
W=40mils
9/20 modified this block
W=40mils
For 15W BT Conn. located at Right corner For 14W BT Conn. located at Left corner
FOR LPC SIO DEBUG PORT
12/25 change back to SA024160140 ( Samples can not on time )12/19 change pn to SA00001MP00 ( original part EOL )0206 => change PN to SA00001N800
7/20 Swap USB signals
C23
1U_0603_10V4Z14W@
1
2
C34
0.1U_0402_16V4Z15W@
C576
0.1U_0402_16V7K@
1
2
R300
100K_0402_5%
12
C24
0.1U_0402_16V4Z14W@
C37
4.7U_0805_10V4Z@
1
2
JP62
E&T_2941-G08N-00E~DME@
11 2 233 4 455 6 677 8 8
C19
0.1U_0402_16V4Z14W@
R110 0_0402_5% 12
G
D
S
Q6SI2301BDS_SOT2315W@
2
13
R301 0_0603_5% 12
JP54
ACES_85201-2005ME@
1 12 23 34 45 56 67 78 89 9
10 1011 1112 1213 1314 14
16 1617 1718 18
15 15
20 2019 19
R298 4.7K_0402_5% 1 2
G
D
S
Q42N7002_SOT23
2
13
C348 0.1U_0402_16V4Z
1 2
JP42
MOLEX_53780-0870ME@
1122334455667788GND19GND210
R299 4.7K_0402_5% 1 2
C21
4.7U_0805_10V4Z@
1
2
R21 100K_0402_5%15W@1 2
C189
0.1U_0402_16V4Z
G
D
S
Q3SI2301BDS_SOT2314W@
2
13
R14
10K_0402_5%
12
JP57
ACES_85201-1005NME@
1 12 23 34 45 56 67 78 89 9
10 10GND 11GND 12
U19
AT24C16AN-10SU-2-7_SO8
A0 1A1 2
SDA5 SCL6
VCC8
A2 3GND 4
WP7
R579 0_0402_5% 1 2
R11 100K_0402_5%14W@1 2
U5
SST25LF080A_SO8-200mil
S1
VCC8
Q 2
HOLD7
VSS 4
D5
C6
W3
D15
PSOT24C_SOT23@
2 31
R13
10K_0402_5%
12
R5810_0402_5%
1 2
R302 0_0603_5%@ 12
C40
1U_0603_10V4Z15W@
1
2
R468 10K_0402_5% 12
R580 0_0402_5% 1 2
JP56
ACES_87212-0800ME@
12345678
R582
0_0402_5% 1 2
JP12
ACES_85201-06051ME@
GND7GND8
112233445566
C39
0.1U_0402_16V4Z15W@
R297
100K_0402_5%
12
C108
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ON/OFF#
EC_ON
ON/OFFBTN#51_ON#
PWR_LED#CHARGE_LED0#CHARGE_LED1#BT_LED#
WLAN_LED#KILL_SW#LID_SW#
+VCC_LID
+USB_VCCC
USB20_N5 USB20_R_N5USB20_P5 USB20_R_P5
USB20_R_P4USB20_N4USB20_P4
ON/OFFBTN#
USB20_R_P4
USB20_R_N4
USB20_R_N4
USB20_R_P5USB20_R_N5
ON/OFF# <31>ON/OFFBTN#<32>
51_ON# <32,41>
PWR_LED#<31,32,37>CHARGE_LED0#<31,37>CHARGE_LED1#<31,37>
BT_LED#<33,37>
WLAN_LED#<29,37>KILL_SW#<29,31>
LID_SW# <31>
USB_OC#45 <21>
USB20_N4<21>USB20_P4<21>
USB20_N5<21>USB20_P5<21>
EC_ON<31>
USB2_ON#<31>
+3VALW
+5VALW+3VALW +5VS
+3VALW
+USB_VCCC+USB_VCCC
+5VALW
+USB_VCCC+USB_VCCC
+3VALW
+USB_VCCC +USB_VCCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
PWROK/LID/Front/IO BoardB
34 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Power Button
TOP Side
Bottom Side
ON/OFF switch
Front LED Board
Lid Switch
W=80mils
For JFW01 IO Conn.
For EMI => Add R536,R537,R538,R539 (SD028000080) ,L58,L59 (SM070000I00)Swap L58,L59 Pin 1 & Pin 4 , Pin 2 & Pin 3
7/30 add for debug 7/30 change L58,59 to SM070000K00 by EMI request
For JFW91 IO Conn.
JP59
ACES_85201-1205_12PME@
112233445566778899101011111212G113G214
R267 0_0402_5%14W@1 2
L59
WCM-2012-670T_4P
@
11 2 2
3 344
D21
RLZ20A_LL34
12
R169
10K_0402_5%
12
R536 0_0402_5% 1 2
C315
0.1U_0402_16V4Z14W@
1
2
JP51
ACES_87213-1600GME@
1122334455667788991010111112121313141415151616G117G218
R537 0_0402_5% 1 2
C53
470P_0402_50V7K
1
2
JP52
E&T_3703-E12N-03RME@
112233445566778899101011111212G113G214
J2 JOPEN@12
+ C51
150U_D_6.3VM
1
2
R303
100K_0402_5%
12
R538 0_0402_5% 1 2
U20
G528_SO8
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
C349
4.7U_0805_10V4Z
1
2
J3 JOPEN@12
R539 0_0402_5% 1 2
R305
10K_0402_5%
12
C362
0.1U_0402_16V4Z@
1
2
U13A3212ELHLT-T_SOT23W-314W@
VDD
2
OUTPUT 3
GN
D1
C351
1000P_0402_50V7K
1
2
SW3SMT1-05_4P
@3
2
1
4
56
G
D
S
Q29
2N7002_SOT23
2
13
L58
WCM-2012-670T_4P
@
11 2 2
3 344
C314
10P_0402_50V8J14W@
1
2
R266 100K_0402_5%14W@1 2
D22
DAN202UT106_SC70-3
2
31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AMP_RIGHT
AMP_LEFT
ACZ_JDREF
ACZ_VREF
SDIN0
SENSE_A
AMP_LEFT_HP
AMP_RIGHT_HP
MIC1_L MIC1_C_L
MIC1_C_RMIC1_R
MONO_IN
SENSE_A
SENSE_A
MONO_INMONO_IN_1
SENSE_B
SENSE_B
+VDDA+5VS_VDDA
HDA_BITCLK_AUDIO
HDA_BITCLK_AUDIO
MUTE_LED1#
HDA_SYNC_AUDIO<20>
HDA_SDOUT_AUDIO<20>
HDA_RST_AUDIO#<20>
EAPD<31,36>
MIC_SENSE<36>
MIC1_L<36>
MIC1_R<36>
HP_SENSE<36>
SB_SPKR<20>
BEEP#<31>
AMP_LEFT <36>
AMP_RIGHT <36>
AMP_LEFT_HP <36>
AMP_RIGHT_HP <36>
HDA_BITCLK_AUDIO <20>
HDA_SDIN0 <20>
MUTE_LED1#<31,32>
+3VS
+AVDD_AC97
+VDDA
+MIC1_VREFO_R
+MIC1_VREFO_L
+3VS_DVDD
+VDDA
+VDDA+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
LA-3541P 0.1
<Title>
Custom
35 49Thursday, September 06, 2007
2006/08/05 2007/08/05HD Audio Codec ALC268
20mil
40mil
AGND
10mil
10mil
10mil
DGND
HD Audio Codec
PORT-E (PIN 14, 15)
PORT-F (PIN 16, 17)
SENSE A / B
5.1K
10K
20K
39.2K
5.1K
10K
20K
39.2K
SENSE B
PORT-D (PIN 35, 36)
PORT-C (PIN 23, 24)
PORT-B (PIN 21, 22)
PORT-A (PIN 39, 41)
PORT-H (PIN 45, 46)
PORT-G (PIN 43, 44)
Sense Pin Impedance Codec Signals
PCI Beep
EC Beep
CardBus Beep
Moat BridgeSENSE FOR HP
SENSE FOR Ext. Mic.
SENSE FOR Solo Int. Mic.
Need Update Footprint
Regulator for CODECAdjustable Output
Funnction
HP
MIC
LINE IN
LINE Out
HP
MIC
LINE IN
LINE Out
Add bypass schematic.9/19 Realtek suggest
9/22 Update footprint, Need to check
2/01 Let them floating
7/20 modified
R4852.4K_0402_5%
1 2
C607 100P_0402_50V8J@ 1 2
C624
100P_0402_50V8J
1
2
R503 0_0805_5% 1 2
D29RB751V_SOD323
21
C617
100P_0402_50V8J@
1
2
C612
680P_0402_50V7K
R506 0_0805_5% 1 2
R494
10_0402_5%@
12
L54FBMA-L11-160808-800LMT_0603
1 2
C602
1U_0603_10V4Z1 2
C610
680P_0402_50V7K
C632
10U_0805_10V4Z
1
2
C608
100P_0402_50V8J
1
2
C615 100P_0402_50V8J@ 1 2
R519 20K_0402_1% 1 2
C635
10U_0805_10V4Z
1
2
R481
10K_0402_5%
12
U35
ALC268-GR_LQFP48
NC14
NC15
MIC2_R17
MIC2_L16
LINE1_L23
LINE1_R24
CD_L18
CD_R20
CD_GND19
MIC1_L21
MIC1_R22
SENSE A13
PCBEEP12
LINE_OUT_L 35
LINE_OUT_R 36
MONO_OUT 37
RESET#11
SYNC10
BIT_CLK 6
SDATA_OUT5
SDATA_IN 8
GPIO02GPIO33
LINE1_VREFO 29
MIC2_VREFO 30
MIC1_VREFO_L 28
VREF 27
DV
DD
1
DV
DD
_IO
9
AV
DD
125
AV
DD
238
MIC1_VREFO_R 32
DMIC_CLK 46
EAPD47
SPDIFO48
DVSS14DVSS27
GPIO1 31
NC 33
SENSE B34
NC 43
NC 44
NC 45
JDREF 40
AVSS1 26AVSS2 42
HP_OUT_L 39
HP_OUT_R 41C619 100P_0402_50V8J@ 1 2
C606
4.7U
_080
5_10
V4Z
C614
15P_0402_50V8J@
1
2
C623 100P_0402_50V8J@ 1 2
R484
560_0402_5%
1 2
R498 39.2K_0402_1% 12
R502
30K_0402_1%
12
R520 0_0805_5% 1 2
C5971U_0603_10V4Z
1 2
C622
0.1U_0402_16V4Z
C633 2.2U_0603_6.3V6K
R495 20K_0402_1% 1 2
C604
0.1U_0402_16V4Z
C613
4.7U_0805_10V4Z
R521 0_0805_5% 1 2
R480
10K_0402_5%
12
C621
680P_0402_50V7K
R496
10_0402_5%@
12
R482
560_0402_5%
1 2
L53FBMA-L11-160808-800LMT_0603
1 2
R483
10K_0402_5%
12
L55FBMA-L11-160808-800LMT_0603
1 2
C639
0.1U_0402_16V4Z
1
2
R489 33_0402_5% 1 2
C609
0.1U_0402_16V4Z
1
2
C638
10P_0402_50V8J@
1
2
C634
0.1U_0402_16V4Z
1
2
C596
1U_0603_10V4Z
1 2C611
0.1U_0402_16V4Z
1
2
C640 2.2U_0603_6.3V6K
R510
20K_0402_1%
12
C603
10U_0805_10V4Z
1
2
C
BE
Q36
2SC2411K_SOT23
1
2
3
C637
10P_0402_50V8J@
1
2
C627 100P_0402_50V8J@ 1 2
C605
10P_0402_50V8J@
1
2
R507
10K_0402_1%
12
U34
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
C6001U_0603_10V4Z
1 2
C636
100P_0402_50V8J
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AMP_CP+
AMP_BEEP
AMP_EN#
AMP_LHPIN
HP_L
SPKR+
SPKL+SPKL-
SPKR-
AMP_SD#
AMP_RHPIN
AMP_CP-
HP_ENHP_R
HP_R
HP_L
AMP_BIAS
AMPR
INL_HINR_H
CVSS
EAPD
SPKR-SPKR+SPKL-SPKL+
SPK_R1-SPK_R1+SPK_L1-SPK_L1+
MIC1_R
MIC1_L
HP_SENSE
MIC_SENSE
MIC_SENSE
HP_SENSE
AMPL
MIC1_RMIC1_L
HP_RHP_L
AMP_SD#
HP_EN
HP_EN
EC_MUTE#
AMP_SD#
MIC1_R<35>
MIC1_L<35>
MIC_SENSE<35>
AMP_RIGHT<35>
AMP_LEFT<35>
HP_SENSE<35>
AMP_LEFT_HP<35>
AMP_RIGHT_HP<35>
EC_MUTE#<31>
EAPD<31,35>
+MIC1_VREFO_R+MIC1_VREFO_L
+5VS
+5VALW
+3VALW
+5VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3541P 0.1
AMP/VR/Audio Jack/MICCustom
36 49Thursday, September 06, 2007
Compal Electronics, Inc.2007/08/052006/08/05
10mil 10mil
fo=1/(2*3.14*R*C)=106HzR=1.5K / C= 1uF
APA2056 SPK/HP AmplifierW=40mil
IN_A Gain = 10dB (Internal Speaker)IN_H Gain = 0dB (Headphone)
9/5 If implement AMP BEEP, Swap C641 and R524.R524 change from 0 Ohm to 47K
Speaker Conn.20mil
12/1 Modified to X7R12/1 Modified to X7R
12/7 Added for 15w" use
12/13 Modified this symbol for pin 13 and 14.Do not re-copy this symbol for other use
12/27 C46 change PN to SE092105K8012/27 C48 change PN to SE092105K80
1/31 change JP9 following JP50
4/19 Modified this symbol toadd pin29 for thermal pad use.
Do not re-copy this symbol for other use
Gain= 10dB
7/20 Add below circuit for APA2057 gain tunning use
Gain (dB) Low (V) High (V) Recommended (V)
10
11
12
13
15
3.45
3.56
3.68
3.80
4.02
3.51
3.62
3.73
3.85
4.07
3.48
3.59
3.70
3.82
4.05+5VALW assume equal 5.1V10 dB ---> 5.1 x 220 / 320 = 3.5
7/20 Add U37 for APA2057A SA00001QD00
8/1 Change Q41,Q42,R588 from @ to 2057@
8/1 Change D34 from 2057@ to @
8/1 Add R590 & C671 for 2057@ and R592 for 2056@
8/1 Add R591 for @
8/2 Change R585,R586 from 100k,220k to 10k,22k
C647
220P_0402_50V7K
1
2
C629
1U_0603_10V4Z1
2
R527
1K_0402_5%@
12C626 1U_0805_10V7K
1 2
R523 100K_0402_5% 1 2
C646 0.1U_0402_16V4Z 12
JP58
E&T_3703-E12N-03RME@
112233445566778899101011111212G113G214
G
D
S
Q41
SSM3K7002FU_SC70-32057@
2
13
C616 4.7U_0805_10V4Z 1 2
R525
1K_0402_5%@
12
C631
0.1U
_040
2_16
V4Z
1
2
R5240_0402_5%
1 2
C630
680P
_040
2_50
V7K
R590 10K_0402_5%2057@1 2
C649 2.2U_0603_6.3V6K
R220 0_0603_5% 1 2
C643
10P_0402_50V8J
1
2
JP55
ACES_87212-1200ME@
112233445566778899101011111212G113G214
R592 0_0402_5%2056@1 2
R492 0_0402_5% 12
C645
220P_0402_50V7K
1
2
R515 1.5K_0402_1%@1 2
R585
10K_0402_1%2057@
12
C625 4.7U_0805_10V4Z 1 2
R223 0_0603_5% 1 2
C641 0.47U_0603_16V4Z1 2
C618 1U_0603_10V4Z1 2
R514 1.5K_0402_1%@1 2
C648
10U
_080
5_10
V4Z
1
2
U37
APA2057A2057@
R517 39K_0402_5% 1 2
R518 39K_0402_5% 1 2
D30PSOT05C-LF-T7 SOT-23-3
@
2 31
R275
2.2K_0402_5%
12
R488 0_0402_5%@ 12
D17
PSOT24C_SOT23@
2 31
C642
1U_0805_10V7K
1
2
G
D
SQ42
SSM3K7002FU_SC70-32057@
2
13
D31PSOT05C-LF-T7 SOT-23-3
@
2 31
R587 0_0402_5%
2056@12
C644
10P_0402_50V8J
1
2
D16PSOT24C_SOT23@
2 31
R522 0_0402_5% 12
R591 0_0402_5%@1 2
R586
22K_0402_1%2057@
12
C666
0.01U_0402_16V7K2057@
1
2
R588
10K_0402_5%2057@
12
D34
RB751V_SOD323@
21
R226 0_0603_5% 1 2
R526 100K_0402_5%@1 2
JP9
ACES_88231-0400ME@
11223344GND15GND26
R274
2.2K_0402_5%
12
R221 0_0603_5% 1 2
C620 1U_0603_10V4Z1 2
C671
0.1U_0402_16V4Z2057@
1
2
APA2056_TSSOP28
U37
2056@
INR_A3
PVD
D20
BEEP28
HVD
D19
LOUT- 9
PVD
D10
CVD
D11
LOUT+ 8/AMP EN27
HP EN24
VDD
1
CP+12
HP_L 18
ROUT+ 22
INR_H4
CP-14
/SD26
BIAS25
INL_H6
INL_A5
HP_R 17
ROUT- 21
GND 2PGND 23PGND 7CGND 13
CVSS 15
VSS 16
Thermal pad 29
+CAMVDD
USB20_R_N7USB20_R_P7USB20_P7
USB20_N7
USB20_R_P7 USB20_R_N7
BT_LED# <33,34>
WLAN_LED# <29,34>
USB20_N7<21>USB20_P7<21>
PWR_LED# <31,32,34>
HDA_RST_MDC#<20> HDA_BITCLK_MDC <20>HDA_SDIN1<20>
HDA_SDOUT_MDC<20>
HDA_SYNC_MDC<20>
CHARGE_LED0# <31,34>
CHARGE_LED1# <31,34>
+5VALW
+5VALW
+5VS
+5VS
+5VALW
+3VALW
+5VS
+5VALW
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
LED/MDC/CAMERAB
37 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Camera Conn
Blue&Amber
Amber
Blue
Blue
Amber
MDC Conn.
20mil
LED
For EMI => Add L60 (SM070000I00)
For EMI => Change D9 from SC300000100 to SC300000P00
20mil
7/30 change L60 to SM070000K00 by EMI request
9/3 change R531,C30,R191,R201,R578 from CAM@ to mount
JP3
ACES_88266-05001ME@
GND27 GND16
1122334455
D9
PRTR5V0U2X_SOT143@
VCC 4
I/O 3
GND1
I/O2
R19 0_0402_5% 1 2R306 33_0402_5%MDC@1 2
R2703.3K_0402_5%
14W@
1 2
R530 0_0603_5%@1 2
R2694.3K_0402_5%
14W@
1 2
L60
WCM-2012-670T_4P
@
11 2 2
3 344
C30
0.1U_0402_16V4Z
1
2
R272
3.3K_0402_5%
14W@1 2 B
A
LED3
HT-297UD/CB _BLUE/AMB_060314W@
2 1
4 3
C33
4.7U_0805_10V4Z@
1
2
R578
0_0603_5% 1
2
Connector for MDC Rev1.5
JP2
ACES_88018-124GME@
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 43.3V 6
GND3 8GND4 10
IAC_BITCLK 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
C352
22P_0402_50V8J@
1
2
B
A
LED2
HT-297UD/CB _BLUE/AMB_060314W@
2 1
4 3
R2733.3K_0402_5%
14W@
1 2
LED1
HT-191NB_BLUE_060314W@
2 1
R531 0_0603_5% 1 2
R271
3.3K_0402_5%
14W@1 2
R20 0_0402_5% 1 2
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
FAN & Screw HoleB
38 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Pad only on bottom sideHole=4.4mm
Hole=5.6mm
7/24 change H21/H22 from H_3P2 to H_3P25
H11HOLEA
1
H1HOLEA
1
H37HOLEA
H_3P1x5P6N
1
H34HOLEA
1
H2HOLEA
1
FD4
@1
H30HOLEA
1
H31HOLEA
1
FD3
@1
H15HOLEA
1
H36HOLEA
H_3P1x5P6N
1
H16HOLEA
1
H18HOLEA
1H6HOLEA
1
H4HOLEA
1
H3HOLEA
1H8HOLEA
1
H23HOLEA
1
H20HOLEA
1
H12HOLEA
1
H21HOLEA
1
H5HOLEA
1
FD1
@1
H29HOLEA
1
H35HOLEA
H_6P0x7P5N
1
H32HOLEA
1
H28HOLEA
1
H27HOLEA
1H13HOLEA
1
FD2
@1
H22HOLEA
1
H14HOLEA
1
H7HOLEA
1
H9HOLEA
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
JFWXX M/B LA-3961P Schematic 0.1
<Title>
Custom
39 49Thursday, September 06, 2007
2005/03/01 2006/03/01
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP SUSP
SYSON
SUSP
SUSP
1.8VS_GATE
SUSP
5VS_GATE
SUSP SUSP SUSP
SYSON#
SUSP
3VS_GATE
SYSON#
SYSON#
1.8V_GATE
SUSP
SUSP
1.2VS_GATE
SUSP
SYSON<30,31>
SUSP#<26,30,31,43,46,47>
SUSP <47>
+5VALW
+5VALW
+5VALW
+3VALW
+1.8VALW
+3VS
+VSB
+1.8VS
+VSB
+5VS
+1.5VS +1.05VS +0.9VS
+VSB
+1.8VALW +1.8V
+VSB
+1.2VALW +1.2VS
+VSB
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
JFWXX M/B LA-3961P Schematic 0.1
DC InterfaceB
40 49Thursday, September 06, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
+3VALW TO +3VS
+5VALW TO +5VS +1.8VALW to +1.8VS
3/14 Change R16 from 100K to 10K
+1.8VALW TO +1.8V
+1.2VALW TO +1.2VS
7/24 Change R281 from 100K to 10K
G
D
S Q242N7002_SOT23@
2
13
R28747K_0402_5%
1 2
C323
0.1U_0603_25V7K
1
2
G
D
S
Q132N7002_SOT23
2
13 C316
100P_0402_50V8J
1
2
G
D
SQ152N7002_SOT23
2
13
C317
0.1U_0603_25V7K
1
2
C343
1U_0603_10V4Z
1
2
C342
1U_0603_10V4Z
1
2C324
10U_0805_10V4Z@
1
2
G
D
S Q232N7002_SOT23@
2
13
G
D
SQ16
2N7002_SOT23
2
13
C329
1U_0603_10V4Z
1
2
C341
10U_0805_10V4Z@
1
2
C320
0.1U_0603_25V7K
1
2
C334
1U_0603_10V4Z
1
2
G
D
S Q262N7002_SOT23@
2
13
R28347K_0402_5%
1 2
C335
10U_0805_10V4Z@
1
2
G
D
SQ17
2N7002_SOT23
2
13
R282
10K_0402_5%
12
C340
10U_0805_10V4Z@
1
2
R294
470_0603_5%@
12
G
D
SQ18
2N7002_SOT23
2
13
G
D
S Q252N7002_SOT23@
2
13 R284
47K_0402_5%
12
R290
470_0603_5%@
12
U16
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q142N7002_SOT23
2
13
G
D
S Q202N7002_SOT23@
2
13
R289470_0603_5%@
12
G
D
S Q222N7002_SOT23@
2
13
U18
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
C331
10U_0805_10V4Z@
1
2
R28833K_0402_5%
C344
10U_0805_10V4Z@
1
2
R281
10K_0402_5%
12
G
D
S Q212N7002_SOT23@
2
13
C319
0.1U_0603_25V7K
1
2
R295
470_0603_5%@
12
U17
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
C318
0.1U_0603_25V7K
1
2
U14
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
U15
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
R278
100K_0402_5%
12
C336
10U_0805_10V4Z@
1
2
C339
10U_0805_10V4Z@
1
2
C327
10U_0805_10V4Z@
1
2
R28647K_0402_5%
1 2
R293
470_0603_5%@
12
R285
100K_0402_5%
12
R292
470_0603_5%@
12
C337
10U_0805_10V4Z@
1
2
C322
10U_0805_10V4Z@
1
2
R296470_0603_5%@
12
R280470_0603_5%@
12
C338
1U_0603_10V4Z
1
2
C345
10U_0805_10V4Z
@
1
2
C321
10U_0805_10V4Z@
1
2
C330
10U_0805_10V4Z@
1
2
G
D
S Q122N7002_SOT23@
2
13
C325
10U_0805_10V4Z@
1
2
G
D
SQ19
2N7002_SOT23
2
13
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CHGRTCP
PACIN
PR
G++
PACIN <43>
ACIN <31>
51_ON#<32,34>
ACOFF<31,43>
ACON<43>MAINPWON<42,44>
PACIN <43>
+3VALWP
+5VALW
+3VALW
+5VALWP
+1.8VALWP +1.8VALW
+0.9VS+0.9VSP
+1.05VS+1.05VSP
+1.5VS+1.5VSP
+VSBP +VSB+1.2VALWP +1.2VALW
VIN
RTCVREFBATT+
VIN
VIN
RTCVREF
VS
VS
ADPIN
VS
+CHGRTC
VIN
RTCVREF
VL
VS
+5VALWP
B+
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
DCIN/DECTORB
41 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
(16A,800mils ,Via NO.= 24)
(6A,240mils ,Via NO.= 12)
(7A,280mils ,Via NO.=14) (8A,320mils ,Via NO.= 16)
(0.3A,40mils ,Via NO.= 2)
(2A,80mils ,Via NO.= 4)
(6A,240mils ,Via NO.=12)
(6A,240mils ,Via NO.=12)
DC301001Y00
Vin Detector
High 18.764 17.901 17.063Low 17.745 16.9 16.033.3V
3.3V
BATT ONLY
L-->H 7.196V 7.349V 7.505V
Precharge detector Min. typ. Max.
H-->L 6.138V 6.214V 6.359V
Precharge detector Min. typ. Max.
H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V
ACIN
PC
40.
022U
_060
3_50
V7K
12
PQ2DTC115EUA_SC70-3
2
13
PQ4TP0610K-T1-E3_SOT23-3
2
13
PC
610
00P
_060
3_50
V7K
12
PC
120.
01U
_040
2_25
V7K
12
PU2
G920AT24U_SOT89-3
IN 2
GND
1
OUT3
PR1710K_0402_1%
12
PR21K_1206_5%
1 2
PR
2719
1K_0
402_
1%
12
PR
3266
.5K
_040
2_1%
@
12
PR
2610
0K_0
402_
5%
12
G
D
S
PQ5RHU002N06_SOT323-3
2
13
PR91M_0402_1%
1 2
PJ17 PAD-OPEN 3x3m1 2
PU1BLM393DG_SO8
+ 5
- 6O7
P8
G4
PR
1184
.5K
_040
2_1%
12
PJ15PAD-OPEN 3x3m
21PR3034K_0402_1%
12
PC
130.
1U_0
603_
25V
7K
12 P
C14
1000
P_0
402_
50V
7K
12
PC
10.
01U
_040
2_50
V7K
12
PJ22
PAD-OPEN 3x3m1 2
PR2922K_0402_1%
1 2
PL1HCB4532KF-800T90_1812
<BOM Structure>
1 2
PC
94.
7U_0
805_
6.3V
6K
12
PJ16 PAD-OPEN 3x3m1 2
PC
20.
01U
_040
2_50
V7K
12
PD6
RB715F_SOT323-3
2
31
PJ21PAD-OPEN 3x3m
1 2
PD
3R
LZ4.
3B_L
L34
12
PU1ALM393DG_SO8
+3
-2 O 1
P8
G4
PR
1310
0K_0
402_
5%
12
PD2
RLS4148_LL34-2
12
PR24560_0603_5%
1 2PR23560_0603_5%
1 2
PJP1
SINGA_2DW-0268-B16@
1 1
3 34 4
2 2
PR
1010
K_0
402_
1%
12
PR
110
_120
6_5%
12
PJ19PAD-OPEN 3x3m
1 2
PC
100.
22U
_120
6_25
V7K
12
PC
30.
022U
_060
3_50
V7K
12
PR
1520
K_0
402_
1%
12
PD4
RLS4148_LL34-2
12
PR
2210
0K_0
402_
1%
12
PR
1610
K_0
402_
1%
12 PQ3
DTC115EUA_SC70-3
2
13
PR182.2M_0402_5%
12
PR41K_1206_5%
1 2
PR1422K_0402_1%
1 2
PR81K_1206_5%
1 2
PQ1TP0610K-T1-E3_SOT23-3
2
13
PC
110.
1U_0
603_
25V
7K
12
PJ18PAD-OPEN 3x3m
1 2
PR
2068
_120
6_5%
12
PQ6DTC115EUA_SC70-3
2
13
PC
81U
_080
5_25
V4Z
12
PD
1R
LZ24
B_L
L34
12
PR3147K_0402_1%
12
PR
2168
_120
6_5%
12
PR
610
0K_0
402_
5%
12
PD5
RLS4148_LL34-2
12
PR510K_0402_1% @1 2
PR
2849
9K_0
402_
1%
12
PR25200_0805_5%
12
PC50.01U_0402_25V7K@1 2
PR31K_1206_5%
1 2
PJ20PAD-OPEN 3x3m
1 2
PR
1949
9K_0
402_
1%
12
PC
70.
1U_0
402_
16V
7K
12
PR1210K_0402_1%
1 2
PR
710
0K_0
402_
5%
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CNT2
TS_A
EC_SMCAEC_SMDA
CNT1
TM_REF1
GND
BATT++
MAINPWON <41,44>
BATT_TEMP <31>
EC_SMB_CK1 <31,33>
EC_SMB_DA1 <31,33>
SPOK<44,45>
B+ +VSBP
VL
VL
VL
VS
VL
+3VALWP
BATT++
BATT+
+3VALWP
+3VALWP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
BATTERY CONN. / OTPB
42 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
Recovery at 70 degree CCPU thermal protection at 85 degree CPH1 under CPU botten side :
2/16 Change to 89 degree C for thermal requestDC040003600
PR4822K_0402_1%
1 2
PR361K_0402_1% 1
2
PR
4110
0_04
02_1
%
12
PR34
100K_0402_5%@
1 2
PR
3810
K_0
402_
1%
12
PR
4515
0K_0
402_
1%
12
PC
210.
22U
_120
6_25
V7K
12
PR4278.7K_0603_1%
1 2
PR
4010
0_04
02_1
%
12
PC
1910
00P
_040
2_50
V7K
12
PR
4910
K_0
402_
1%
12
PR39442K_0603_1%
1 2
PR
4710
0K_0
402_
5%
12
PC
201U
_060
3_6.
3V6M
12
PJP2
SUYIN_200275MR009G180ZR
1 1
3 34 45 56 6
9 9
2 2
7 78 8
G1 10G2 11
PR33100K_0402_5%@
1 2
G
D
S
PQ8RHU002N06_SOT323-3
2
13
PC
230.
1U_0
402_
16V
7K
12
PJ23PAD-OPEN 3x3m
1 2
PC
220.
1U_0
603_
25V
7K
12
PC
180.
1U_0
603_
25V
7K
12
PH
110
0K_0
603_
1%_T
H11
-4H
104F
T
12
PD8
1SS355TE-17_SOD323-2
1 2
PR
461K
_040
2_1%
12
PR500_0402_5%
1 2
PC
1610
00P
_060
3_50
V7K
12P
C15
1000
P_0
603_
50V
7K
12
PR446.49K_0402_1%
1 2
PR
3715
0K_0
402_
1%
12
PQ7TP0610K-T1-E3_SOT23-3
2
13
PU3A
LM358ADR_SO8
+3
-2 0 1
P8
G4
PR
351K
_040
2_1%
1
2
PR43150K_0402_1%
12
PC
170.
01U
_060
3_50
V7K
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CSIN
CSON
CSON
6251_EN
LX_CHG
6251VDD
6251DC_IN
6251VDD
6251VREF
CSOP
PACIN
ACONBST_CHG
6251VREF
DH_CHG
CSIP
DL_CHG
6251DC_IN
FSTCHG
CHG
6251VREF
6251VDDP
BST_CHGA
IREF<31>ACON<41>
PACIN<41>
FSTCHG<31>
ADP_I<31>
ACOFF<31,41>
ACOFF <31,41>
BATT_OVP<31>
PACIN <41>
CHGSEL<31>
SUSP#<26,30,31,40,46,47>
VIN
VIN
BATT+
P2 P3
B+
CHG_B+
P3
BATT+VS
VIN
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
CHARGER
43 49Thursday, September 06, 2007
Compal Electronics, Inc.2007/05/182006/05/18
CHARGER
ADP_I = 19.9*Iadapter*Rsense65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR74=39.2K, CP=3.079A
VCHLM=0.24V~1.36V
LI-3S :13.50V--BATT-OVP=1.5V
BATT-OVP=0.111*BATT+
CC=0.6~3.4A
IREF=0.5832V~3.3VIREF=0.972*Icharge
If this area float, Charge voltage is 4.2V/cell
If charge current is small, you can change to 16uH choke.
Be careful the IREF voltage!!
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)where Vaclm=0.5535V, Iinput=3.079Awhere Vaclm=0.6667V, Iinput=4.263A
CP mode
BATT Type Charging Voltage (0x15) CHGSEL
2800mAH 3S pack 13050mV
Normal 3S LI-ON Cells 12600mV
CV mode
HIGH
LOW 12.90V
12.60V
OVP voltage :
PQ11
S TR AO4407 1P SO8 W/D
S1S2S3G4
D 8D 7D 6D 5
PD17
RB715F_SOT323-3
2
31PR210
100K_0402_1%
1 2
PR6310K_0402_1%
1 2
PC
2956
00P
_040
2_25
V7K
12
PD9
1SS355TE-17_SOD323-2
1 2
PR74100K_0402_1%@
12
PQ13DTC115EUA_SC70-3
2
13
PR214 20_0603_5%
1 2
PR5710K_0402_1%
12
PR5510K_0402_1%
12
PC
330.
1U_0
603_
25V
7K
12
PC454.7U_0805_6.3V6K
12
PC35680P_0402_50V7K@
1 2
PQ19SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR7710K_0402_1%
1 2
G
D
S
PQ16RHU002N06_SOT323-3
2
13
PQ14DTC115EUA_SC70-3
2
13
PR56
200K_0402_1%
1 2
PR6622K_0402_1% 1 2
PC
470.
01U
_040
2_25
V7K
@
12
PC
2722
00P
_040
2_50
V7K
12
PU4
ISL6251AHAZ-TR5283_QSOP24
EN3
CELLS4
VDD1
ACSET2
ICOMP5
VCOMP6
CHLIM9
ACPRN 23
CSIP 19
UGATE 17
PHASE 18
BOOT 16
PGND 13GND12
ICM7
VREF8
VADJ11
DCIN 24
CSIN 20
ACLIM10
LGATE 14
VDDP 15
CSOP 21
CSON 22
PC
260.
1U_0
603_
25V
7K
12PR53
47K_0402_1%
12
PR73274K_0402_1%@
1 2
PC38
0.01U_0402_25V7K
1 2
PR5247K_0402_1%
1 2
PC
4310
U_1
206_
25V
AK
12
PR60150K_0402_1%
12
PQ10
S TR AO4407 1P SO8 W/D
S 1S 2S 3G 4
D8D7D6D5
PQ42TP0610K-T1-E3_SOT23-3
2
13
PL3
10UH_SIL1045RA-100PF_4.5A_30%
1 2
PR62 20_0603_5%
12
PC34 0.047U_0603_16V7K
12
PR76499K_0402_1%
12
PR78105K_0402_1%
12
PC30680P_0603_50V7K@
12
PC40
0.1U_0402_16V7K
1 2
PC
4210
U_1
206_
25V
AK
12
PC
460.
01U
_040
2_25
V7K
12
PC41
0.1U_0603_25V7K
12
PC480.01U_0402_25V7K
12
PR794.7_1206_5%@
12
PJ14
JUMP_43X11811 2 2
PQ20
DTC115EUA_SC70-3
2
13
PR68143K_0402_1%
12
PR69
39.2K_0402_1%
1 2
PR714.7_0603_5%
1 2
PC36 6800P_0402_25V7K
1 2
PC
280.
1U_0
603_
25V
7K
12
PQ21
SI2301BDS-T1-E3_SOT23-3 @2
13
PD10
1SS355TE-17_SOD323-2
12
PQ12DTA144EUA_SC70-3 2
13
PR61 2.2_0603_5%
1 2
PR650.02_2512_1%
1
3
4
2
PR75340K_0402_1%
12
PC37 0.1U_0603_25V7K
12
G
D
S
PQ18RHU002N06_SOT323-3<BOM Structure>
2
13
PC
2510
U_1
206_
25V
AK
12
PD7
1SS355TE-17_SOD323-2
1 2
PU3B
LM358ADR_SO8
+ 5
- 607
P8
G4
PQ43DTC115EUA_SC70-3
2
13
PQ9
S TR AO4407 1P SO8 W/D
S1S2S3G4
D 8D 7D 6D 5
PR54200K_0402_1%
12
PC39100P_0402_50V8J
1 2
PC
2410
U_1
206_
25V
AK
12
PR
209
100K
_040
2_1%
12
PR1410_0603_5%
1 2
PC
31
2.2U
_060
3_6.
3V6K
12
PC
44
0.01
U_0
402_
25V
7K
12
PC56
0.1U_0402_16V7K
1 2
PR510.02_2512_1%
1
3
4
2
PR7210K_0402_1%
12
PD161SS355TE-17_SOD323-2
1 2
PR64100_0402_1%
1 2
PR580_0402_5%
1 2
PR70100K_0402_1%
12
PC970.1U_0603_25V7K
12
G
D
S
PQ15RHU002N06_SOT323-3
2
13
PR
59
100K
_040
2_1%
12
PR67
2.2_0603_5%
1 2
PQ17SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR21320_0603_5%
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
2VR
EF_
ISL6
237
BST3A
2VR
EF_
ISL6
237
BST5A
FB5
LX3
DH3
ILIM2
ILM1
LX5
DH5
DL5DL3
FB3
MAINPWON<41,42>
SPOK <42,45>
VL
ISL6237_B+
VS
+3VALWP
+5VALWP
B+
VL
2VREF_ISL6237
ISL6237_B+
VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+5VALWP/+3VALWPCustom
44 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
Rds(on) = 20m ohm(max) ; Rds(on) = 16m ohm(typical)
Rds(on) = 20m ohm(max) ; Rds(on) = 16m ohm(typical)
3.3VALWP Ipeak=6.6A~10A
5VALWP Ipeak=6.6A~10A
VFB=0.7V
PR2290_0402_5%@
12
PL6
4.7UH_SIL104R-4R7PF_5.7A_30%
1 2
PJ28 PAD-OPEN 3x3m1 2
PC132 0.22U_0603_10V7K
1 2
PR224 0_0402_5%
1 2
PR
219
0_04
02_5
% 1
2
PC
122
4.7U
_120
6_25
V6K
12
PQ
27S
I481
0BD
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC
126
4.7U
_080
5_6.
3V6K
12P
C12
5
1U_0
603_
10V
6K
12
PR228
330K_0402_1%
12
PC1280.1U_0603_25V7K
12
PR
221
10K
_040
2_1%
@12
+
PC
5922
0U_6
.3V
_M
1
2
PR
222
10K
_040
2_1%
12
PR227
330K_0402_1%12
PC
131
680P
_060
3_50
V8J
@
12
PR2310_0402_5%
12
PR80
0_0402_5%
1 2
PC1241U_1206_25V7K
12
PR218
0_0603_5%
12
PC1341U_0603_6.3V6M
12
PC1330.22U_0603_25V7K
12
PC1271U_0603_10V6K
1 2
PR
230
0_04
02_5
%
12
PR225100K_0402_5%
1 2
PR
220
61.9
K_0
402_
1%
12
PQ25SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
123
2200
P_0
402_
50V
7K
12
PC
120
4.7U
_120
6_25
V6K
12
PR23247K_0402_1%@
1 2
PR217
0_0603_5%
12
PC129
0.1U_0603_25V7K
12
PU5
ISL6237IRZ-T_QFN32_5X5
UGATE226
BOOT224
PHASE225
LGATE223
OUT230
REFIN232
TON
2
LDOREFIN8
NC20
EN_LDO4
EN227
EN114
POK1 13
POK2 28
PVCC 19VC
C3
SKIP 29
LDO
7
ILIM2 31
BYP 9
OUT1 10
GN
D21
PGND 22
LGATE1 18
PHASE1 16
BOOT1 17
UGATE1 15
VIN
6N
C5
REF1
FB1 11
ILIM1 12
TP33
PR
215
2.2_
1206
_5%
@
12
PR
226
200K
_040
2_5%
12
PQ
26
SI4
800B
DY
-T1-
E3_
SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PC
121
4.7U
_120
6_25
V6K
12
PR81
0_0603_5%
1 2
PR223 0_0402_5%@12
+
PC
6422
0U_6
.3V
_M
1
2
PC
130
680P
_060
3_50
V8J
@
12
PL5
4.7UH_SIL104R-4R7PF_5.7A_30%
12
PZD1RLZ5.1B_LL34
1 2
PC
135
0.04
7U_0
402_
16V
7K
@
12
PR
216
2.2_
1206
_5%
@
12
PC
119
2200
P_0
402_
50V
7K
12
PQ
28S
I481
0BD
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DH_1.8-2
DL_1.8
BST_1.8
LX_1.8
VO_1.8
DH_1.8-1
OCSET_1.8
FB_1.8
DH_1.2-2
DH_1.2-1
DL_1.2
LX_1.2
BST_1.2
OCSET_1.2
VO_1.2
FB_1.2
1.2V_EN
1.2V_ENSPOK<42,44>
SPOK <42,44>
+1.8VALWP
ISL6228_B+
+5VALW
+1.2VALWP
+5VALW
B+
ISL6228_B+
ISL6228_B+ISL6228_B+ ISL6228_B+
+5VALW +5VALW
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
1.2VALWP/1.8VP
Custom
45 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
DCR 10 mOHM
DCR 10 mOHM
1.8VALWP Ipeak=6.6A~10A
1.2VALWP Ipeak=6.6A~10A
VFB=0.6V
PC151
0.1U_0402_16V7K
12
PR23933.2K_0402_1%
12
PQ32SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR245
34K_0402_1%
1 2
PR241
34K_0402_1%
12
PC1401000P_0402_50V7K
12
PC
150
4.7U
_120
6_25
V6K
12
PC142
1000P_0402_50V7K
12
PC1431000P_0402_50V7K
1 2
PQ30SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR2490_0402_5%
1 2
PR23722K_0402_1%
12
PC1361U_0402_6.3V6K
12
PQ46SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR253
0_0603_5%
1 2
PC1411000P_0402_50V7K
12
PC
148
4.7U
_120
6_25
V6K
12
PC
144
4.7U
_120
6_25
V6K
12
PC152
0.1U_0402_16V7K
1 2
PQ45SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PL7
1.8UH_SIL104R-1R8PF_9.5A_30%
1 2
PR243
8.2K_0402_1%
1 2
PR252
0_0603_5%
1 2
PR2403.3K_0402_5%
1 2
PC149
0.022U_0402_16V7K
1 2
PR324
0_0402_5%@
1 2
PR323
0_0402_5%@
1 2
PR233
10_0603_1%
12
PC1380.1U_0603_25V7K
12
PJ24
JUMP_43X1181 122
PR251
0_0603_5%
12
PR25010K_0402_1%
12
PL8
1.8UH_SIL104R-1R8PF_9.5A_30%
1 2
PC1371U_0402_6.3V6K
12
PR24216.5K_0402_1%
12
PR2478.2K_0402_1%
12
+ PC86220U_6.3V_M
1
2
PR236
10_0603_1%
12
PC
145
4.7U
_120
6_25
V6K
12
PC1531U_0402_6.3V6K
12
PR234
2.2_0603_1%
1 2
PC1390.1U_0603_25V7K
12
PR248
0_0603_5%
1 2
PR2443.3K_0402_5%
12
PC1541U_0402_6.3V6K
12
PC147
0.01U_0402_25V7K@
1 2
PR235
10_0603_1%
12
PU6
ISL6228HRTZ-T_QFN28_4X4
FSET
21
VIN
22
VCC
23
VCC
14
VIN
15
FSET
16
PGO
OD
17
FB18
VO19
OCSET110
EN111
PHASE112
UGATE113
BOOT114
PVC
C1
15
LGAT
E116
PGN
D1
17
PGN
D2
18
LGAT
E219
PVC
C2
20
BOO
T221
UGATE2 22
PHASE2 23
EN2 24
OCSET2 25
VO2 26
FB2 27
PGOOD2 28
GND_T 29
PR246
10K_0402_1%
1 2
PR23818.2K_0402_1%
12
PC
155
0.01
U_0
402_
25V7
K
@
12
+
PC84220U_6.3V_M
1
2
PC1460.022U_0402_16V7K
1 2
PR2540_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6269_1.05VDH_1.05-2
6269_1.05V
LG_1.05V
ISEN_1.05V
PHASE_1.05V
DH_1.05-1
FB_1
.05V
6269_B+
BOOT_1.05V
6269_1.05V
SUSP#<26,30,31,40,43,47>
B+
+1.05VSP
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
1.05VSP/1.5VSP
Custom
46 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
+1.05VSPOCP==>7A~~8.5A
Vripple==>40mV
VFB=0.6V
+ PC161220U_6.3V_M
1
2
PC1602.2U_0603_6.3V6K
12
PR2634.42K_0402_1%
<BOM Structure>
1 2PR262
0_0402_5%
1 2
PR26657.6K_0402_1%
12
PC16422P_0402_50V8J
12
PR2580_0603_5%
12
PR260
0_0402_5%
1 2
PC163680P_0603_50V7K@
12
PC1666800P_0402_25V7K
1
2
PQ48SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR2674.02K_0402_1%
12
PR26549.9K_0402_1%
12
PR256
0_0603_5%
1 2
PU7
ISL6269ACRZ-T_QFN16_4X4
FCCM3
EN4
BOO
T13
PVCC 12VIN1
VCC2
PGO
OD
16
PHAS
E15
UG
14
LG 11
PGND 10
VO8
CO
MP
5
FB6
FSET
7
ISEN 9
GN
D17
PR2614.7_1206_5%@
12
PL101.8UH_SIL104R-1R8PF_9.5A_30%
1 2
PC158
0.1U_0402_16V7K
1 2
PR2594.7_0603_5%
1 2
PR257
10K_0402_1%
12
PC156
4.7U_1206_25V6K
12
PR2643K_0402_1%
12
PJ25
JUMP_43X118@ 1 122
PR255 0_0603_5%
1 2
PC1620.1U_0402_16V7K @
12
PC1574.7U_1206_25V6K
12
PC1650.01U_0402_25V7K
12
PC159 2.2U_0603_6.3V6K
1 2
PQ47SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUSP<40>
SUSP#<26,30,31,40,43,46>
+3VALW
+0.9VSP
+1.8V
+5VS
+1.8VS
+1.5VSP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+1.5VSP/0.9VSP
Custom
47 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
VFB=0.8V
PC170
0.01U_0402_25V7K
12
PC17210U_0805_6.3V6M
12
PC167
1U_0603_6.3V6M
12
PC16810U_0805_6.3V6M
12
PR269
3K_0402_1%
12
PR2711K_0402_1%
12
PC
169
22U
_120
6_6.
3V6M
12
PJ27JUMP_43X118
11
22
PC1760.1U_0402_16V7K@
12
PC1740.1U_0402_16V7K
12
PC1731U_0603_6.3V6M
12
PU8
APL5913-KAC-TRL_SO8
VIN9
EN8
VCNTL6VIN5
POK7
GN
D1
FB 2
VOUT 4VOUT 3
PC1710.1U_0402_16V7K@
12
PR2703.4K_0402_1%
12
PJ26JUMP_43X79
11
22
G
D
S
PQ49
RHU002N06_SOT323-3
2
13
PR272
0_0402_5%
1 2
PU9
APL5331KAC-TRL_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC17522U_1206_6.3V6M
12
PR2680_0402_5%
1 2
PR273
1K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UGATE_CPU2-2
VSUM
VSUM
+CPU_CORE
BOOT_CPU1
UGATE_CPU1-1
UGATE_CPU1-2
BOOT_CPU2
UGATE_CPU2-1
LGATE_CPU2
PHASE_CPU2
VR_TT#
ISEN1
VCC_PRM
VCC_PRM
VCC_PRM
PHASE_CPU1
ISEN1ISEN2
VSUM
ISEN2
LGATE_CPU1
CP
U_V
ID4
<5>
CP
U_V
ID3
<5>
CP
U_V
ID5
<5>
CP
U_V
ID2
<5>
CP
U_V
ID1
<5>
CP
U_V
ID0
<5>
CP
U_V
ID6
<5>
VR
_ON
<31>
PM_DPRSLPVR_D<25>
H_DPRSTP#<5,25>
CLK_EN#
VGATE<14>
H_PSI#<5>
VCCSENSE<5>
VSSSENSE<5>
PGD_IN
+3VS+3VS
+5VS
+CPU_B+
+5VS
+CPU_CORE
B+
+CPU_B+
+CPU_B+
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+CPU_CORECustom
48 49Thursday, September 06, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
PR300 13K_0402_1%
1 2
PR
292
3.65
K_0
805_
1%
12
PR295 0_0603_5%@1 2
PC186
0.22U_0603_10V7K
1 2
PR
304
10K
_040
2_1%
12
PR2870_0603_5%
1 2
PC199 1000P_0402_50V7K
1 2
PC1900.022U_0603_50V7K
1 2
PR31310_0603_5%
1 2
PR308 1_0603_5%
1 2
PR286 0_0402_5%
1 2
PR
279
0_04
02_5
%
12
PC
178
10U
_120
6_25
VA
K
12
PC2030.018U_0603_50V7J
12
PC195 470P_0402_50V7K
12
PL13
0.36UH_MPC1040LR36_24A_20%
12
PR277 0_0402_5%
1 2
PC
183
1U_0
603_
6.3V
6M
12
PR311
1K_0402_1%
12
PR
285
0_04
02_5
%
12
PR
281
0_04
02_5
%
12
PR316 20_0402_5%
1 2
PR315 0_0402_5%
1 2
PC
188
10U
_120
6_25
VA
K
12
PR299
2.2_0603_5%
1 2P
R28
00_
0402
_5%
12
PC2020.018U_0603_50V7J
12
PC196
0.22U_0603_10V7K
1 2PC1971U_0402_6.3V6K
12
PC1910.22U_0603_10V7K
1 2
PC198 220P_0402_50V7K
1 2
PR
305
3.65
K_0
805_
1%
12
PR2902.2_0603_5%
1 2
PR312
255_0402_1%
1 2
PC1921000P_0402_50V7K
1 2
PR3024.7_1206_5%
12
PR
320
11K
_040
2_1%
12
PR3100_0402_5%@
12
PR2941_0402_5%
12
PR
283
0_04
02_5
%12
PC205 0.1U_0402_16V7K
1 2
PQ52SI4856DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR297 147K_0402_1%
1 2
PQ55SI4856DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC2060.22U_0603_10V7K
12
+
PC
177
220U
_25V
_M
1
2
PC1890.015U_0402_16V7K@1 2
PR321 1K_0402_1%
1 2
PC
181
0.02
2U_0
402_
16V
7K
12
PR2741_0603_5%
12
PR314 1K_0402_1%
1 2
PC1840.22U_0603_10V7K
1 2PR289
499_0402_1%
12
PR
293
10K
_040
2_1%
12
PC
180
10U
_120
6_25
VA
K
12
PR296 0_0402_5%@
1 2
ISL6262ACRZ-T_QFN48_7X7
PU10
PGOOD1
PSI#2
PMON3
RBIAS4
VR_TT#5
NTC6
SOFT7
OCSET8
VW9
COMP10
FB11
FB212
VD
IFF
13
VS
EN
14
RTN
15
DR
OO
P16
DFB
17
VO
18
VS
UM
19
VIN
20
GN
D21
VD
D22
ISE
N2
23
ISE
N1
24
NC 25
BOOT2 26
UGATE2 27
PHASE2 28
PGND2 29
LGATE2 30
PVCC 31
LGATE1 32
PGND1 33
PHASE1 34
UGATE1 35
BOOT1 36VID
037
VID
138
VID
239
VID
340
VID
441
VID
542
VID
643
VR
_ON
44
DP
RS
LPV
R45
DP
RS
TP#
46
CLK
_EN
#47
3V3
48
GN
D49
PC204 180P_0402_50V8J
1 2
PR303 6.81K_0402_1%
1 2
PR275 499_0402_1%
1 2
PR
291
4.7_
1206
_5%
12
PC201 0.018U_0603_50V7J
1 2
PQ53SI7686DP-T1-E3_SO8
35
2
4
1
PH310KB_0603_5%_ERTJ1VR103J
12
PR
284
0_04
02_5
%
12
PC
182
2.2U
_060
3_6.
3V6K
12PR276 0_0402_5%
1 2
PC193 1000P_0402_50V7K
1 2
PR322 4.02K_0402_1%
1 2
PR307 0_0603_5%@1 2
PR319
20_0402_5%
12
PC2000.1U_0603_25V7K
12
PR3010_0603_5%
1 2
PR
278
0_04
02_5
%
12
PC
179
10U
_120
6_25
VA
K
12
PQ51SI4856DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC207 0.22U_0402_6.3V6K
12
PQ54SI4856DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR298 4.22K_0402_1%@1 2
PC
187
10U
_120
6_25
VA
K
12
PQ50SI7686DP-T1-E3_SO8
35
2
4
1
PL12
0.36UH_MPC1040LR36_24A_20%
12
PR309 97.6K_0402_1%
1 2
PR318 0_0402_5%
1 2
PC194680P_0603_50V8J
12
PC
185
680P
_060
3_50
V8J
12
PL11HCB4532KF-800T90_1812
1 2
PR
288
1.91
K_0
402_
1%
12
PR
282
0_04
02_5
%
12
PR
317
2.61
K_0
402_
1%
12
PR306
1_0402_5%
12
PH2
100K_0603_1%_TH11-4H104FT@
1 2