Intel 8086 Architecture class presentation
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Intel 8086 Architecture Srinivasa Ramanujan Centre SASTRA University
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8086
Transcript of Intel 8086 Architecture class presentation
Intel 8086 Architecture
Srinivasa Ramanujan Centre
SASTRA University
BHE – Bus High Enable signal from 8086
A0 – LSB of Address Bus – toggles for even / odd access
8-bit memory chips were only available on market, 8086 is a 16bit processor
BHE A00 0 Whole word (16 bits – 2 bytes)0 1 Upper byte from an odd address1 0 Lower byte from an even address1 1 None
2 Banks - 512k each – called odd bank and even bank
Reserved memory address – FFFF0h – FFFFFh(Init), 00000h – 3FFFFh (IVT)