INTEGRATION AND TEST OF HIGH-SPEED TRANSMITTER ELECTRONICS FOR

FREE-SPACE LASER COMMUNICATIONS

Nitin J. Soul

National Aeronautics and Space Administration

Lewis Research Center

Cleveland, Ohio 44135

and

Paul J. Lizanich

Analex Corporation

3001 Aerospace ParkwayBrook Park, Ohio 44142

Abstract

The NASA Lewis Research Center in Cleveland, Ohio, has

developed the electronics for a free-space, direct-detection

laser communications system demonstration. Under the High°

Speed Laser Integrated Terminal Electronics (Hi-LITE) Project,NASA Lewis has built a prototype full-duplex, dual-channel

electronics transmitter and receiver operating at 325

megabits per second (Mbps) per channel and using quaternarypulse-position modulation (QPPM). This paper describes the

integration and testing of the transmitter portion for future

application in free-space, direct-detection laser communica-tions. A companion paper | reviews the receiver portion of the

prototype electronics. Minor modifications to the transmitterwere made since the initial report on the entire system, 2 and this

paper addresses them. The digital electronics are implemented

in gallium arsenide integrated circuits mounted on prototypeboards. The fabrication and implementation issues related to

these high-speed devices are discussed. The transmitter's testresults are documented, and its functionality is verified by

exercising all modes of operation. Various testing issues

pertaining to high-speed circuits are addressed. A descriptionof the transmitter electronics packaging concludes the paper.

I. Introduction

The High-Speed Laser Integrated Terminal Electronics (Hi-

LITE) Project at the NASA Lewis Research Center in Cleve-

land, Ohio, has undertaken the development of the communi-

cations electronics portion of a free-space, direct-detection

laser communications system. The transmitter outputs two

channels of quaternary pulse-position-modulated (QPPM) data

at 325 megabits per second (Mbps) per channel, requiring

QPPM symbol slot periods of 1.54 nanoseconds (nsec).

The package described in this paper is a prototype, to be

followed by a demonstration model. The prototype communi-cations electronics (PCE) has been constructed at NASA

Lewis from discrete high-speed integrated circuits and analog

Copyright © 1993 by the American Institute of Aeronautics

and Astronautics, Inc. No copyright is asserted in the

United States under Title 17, U.S. Codc. The U.S. Government

has a royalty-free license to exercise all rights under

the copyright claimed herein for Government purposes.

All other rights are reserved by the copyright owner.

components with SMA connectors on 20 individual circuitboards housed in three chassis. The PCE transmitter chassis

contains five boards. The demonstration communications elec-

tronics (DCE), currently under development, will collapse the

10 boards of digital electronics into a single application-

specific integrated circuit (ASIC).The PCE transmitter has been fully integrated and tested.

The functionality of the transmitter is briefly summarized here,and its recent modifications are described in detail. The unique-

ness of the board fabrication process, issues related to integra-tion of various boards, testing and debugging concepts, pack-

aging, and thermal stability concerns for high-speed circuitsare described for the transmitter electronics in the sections that

follow.

Section II briefly outlines the operation of the PCE transmit-

ter, noting modifications since the previous report. 2 Transmit-

ter board fabrication and simulation issues are discussed in

Section III. Section IV includes testing and debugging con-

cepts of the PCE transmitter and documents appropriate re-

sults. Packaging and thermal stability practices for high-speed

circuits are given in Section V. Finally, the Appendix presents

computer-aided design (CAD) schematics and interface con-trol documents and includes a glossary.

II. PCE Transmitter Operation

Source Data Multiplexer/Channel Data Demultiplexer

Figure 1 shows the functional elements of the Hi-LITE PCEtransmitter, each of which is under computer control. The data

sources feed the digital data router, where they are processed

for output to the optical transmitter, whose output is the QPPMdual-channel laser link. In an operational intersatellite link the

transmitted beams pass through optics and a telescope. For

laboratory testing of the transmitter the optical transmitter

outputs are connected to a bit-error-rate (BER) test set receiver

through the PCE receiver electronics. 1 The source data multi-

plexing allows the option of selecting dual 325-Mbps sources

: Telescope : "2

)ATA $OURCE_ : : OPTICAL :DIGITAL DATA ROUTER TRANSMITTER OPTICS

Figure 1.--Block diagramof HI-LITEdual-channelQPPM transmitter.

or single 650-Mbps source and their accompanying clocks.The source data multiplexer accepts pseudorandom bit se-

quences (PRBS) and digitized nonreturn-to-zero (NRZ) video

data as its primary inputs and provides two serial 325-Mbps

signals to the demultiplexer. The demultiplexer converts these

signals into two 2-bit parallel signals per channel, for a total of

four 162.5-Mbps binary data streams. The parallel signals are

used to construct QPPM symbols for their respective channels.

Bit Interleaver/QPPM Encoders

The bit interleaver provides the options to route the four

162.5-Mbps binary data streams directly to the QPPM encod-

ers or to interleave them bit by bit. The purpose of interleaving

is to be able to infer the BER performance of the opticalchannel that carries the video data from that of the channel that

carries the PRBS data. The PRBS data format lends itself to

BER measurement (unlike the video data format), and the

assumption is that the interleaved video data undergo the same

path degradations and interference. Each QPPM symbol en-

coder accepts the two 162.5-Mbps parallel data streams per

channel and converts them into a 325-Mbps QPPM encoded

data stream. The QPPM encoders finally pass two 325-Mbps

QPPM encoded data streams to the output translator, a featureadded to the PCE transmitter since the last report. 2

QPPM Output Translator

The purpose of the output translator is to create dc-coupledand ac-coupled outputs, through different terminations, for

each 325-Mbps data stream. These outputs are used to drive

other electronics within the Hi-LITE system. Data streamsfrom both encoders are used to modulate the two lasers. A

computer-controlled signal disables either channel by trans-

mitting zeros in each of the four slots so that the laser power is

conserved. This helps distinguish whether the channel is

turned off intentionally or not.

A clock generation and distribution board, located in the

same chassis, provides precisely aligned clock signals at the bit

clock rate or submultiples to ensure synchronous operation.

III. Simulation and Fabrication

A Dazix digital CAD system (version 6.3) was used to

design and simulate the electronics circuitry. Once the logic

design of a high-speed circuit is finalized, simulation and

board layout becomes an iterative process. First, a logic simu-

lation is performed to verify circuit functionality. During

simulation of these 650-Mbps (1.54-nsec period) signals, a

delay of 50 picoseconds per centimeter (psec/cm) for themicrocoaxial interconnections must be considered.

Commercial four-layer prototype boards were used for fab-

rication, providing the option of mounting up to eight GaAs

chips per board, each in any of four orientations to optimize

interconnection routing. The iterative process of layout, simu-

Figure2.--Typical bottomof a GaAschip site depictingsurface-mountcapacitors, resistors,and dc wldng.

lation, and testing is repeated until the designer is satisfied that

the hardware will be viable.

The resulting layout is transferred to a specific fabrication

document (see Appendix) to aid in assembly. The fabrication

of these prototype transmitter boards requires special attention

to signal terminations and decoupling power planes. A micro-

scope workstation is used because dimensions as small asseveral thousandths of an inch are common in surface-mount

resistors, capacitors, and dc wiring (Fig. 2). A base socket with

gold foils that makes contact with the integrated-circuit (IC)

footprints on the board is installed at each chip site. The GaAs

IC with a predefined orientation is inserted into the base socketand secured with a heat sink. SMA connectors for interboard

and chassis front panel signal routing and a power connectorare mounted on each board.

IV. Integration and Testing

The transmitter was integrated and tested in three phases.

During Phase I the source data multiplexer alone was tested,and the results were documented. In Phase II the channel data

demultiplexer and the bit interleaver were added and tested for

validity. Last, in Phase III, QPPM encoders and QPPM outputtranslators were integrated, and their performance was veri-

fied.

Phase I

Commercial equipment consisting of a BER test data gen-erator and a video camera or a video cassette recorder (VCR)

was used as dual 325-Mbps sources, and a test data source from

in-house-built special test equipment was used as a single 650-

Mbps source. All data sources and their accompanying clockswere fed into the source data multiplexer. The operation of the

source data multiplexer was verified by simply changing the

mode select line while observing the signals on a sampling

oscilloscope. Figures 3 and 4 show representative signals

expected for dual 325-Mbps sources and a single 650-Mbps

source, respectively, where T b and T s are bit and slot time

durations, respectively. For the dual 325-Mbps source mode,

Channel A (carrying the 325-Mbps PRBS) and Channel B

(carrying the 325-Mbps real-time video data) were passed

325-Mbps PRBS

0 1 I i i II II I

Bit 1 _ 1

Channel A [

olt a I i tl i

C]_enc°ded chl_ j_ "I

Ts

i ol o oli Oil oloI , I 1

rb =13. o8 ns-_ I"- I I

I 1 I!I, l o [ 11=I I I

t o I o I o I o tI I I I

= 6.15 ns (a) Di'rect routing of

I I I II __I I I L

1 I 1 ] o I o !I II I I

I I I I i I I

I I t I

, 1channel A

oI , °I

I

1 I 1 lI

\L o I II o [

',I I

III

325-MDpS ¢J deol/

Bit 1]

Channel B

B,'t 21(I

OPPM encoded ch IB

I

i o

(o) Direct routing of channel B

Figure &--Timing diagram for dual 325-Mbps sources with direct routing option.

o o o

o o

o o

0 0 0

0 0

0 0

I

i j i ' 1 o '

I r$=:.54n_--t _- I ] I I

_o-M_ps ross I I I I I

I I I I I I I

325-1_'Dps PRBS ch B

I

B_t :1I

Channel A

Bit 31 1

IoppM_n_odeaOhlA__/_

I

1 o

I

1

0

I i Iz z l zl

t 1 I 1 1 o I ot

olo.1 1 1II t

I .r ttI 1 I

t I l l I lI i o I o I o I o I o II I _ I _ ]_ I

I t I I

\1

I I

I

1Bit 2

Channe2 B

Bit 4

OPPM encoded ch B

Ts

I I I

l l l

11°I°IIIo I o II l I

I 'II

= 6.15 ns

I I I I

l l l 1

l o I o II _ II I1 t .z I 1 I 1 t

I I 1 I 1

I /-_ I I /-_I

Figure 4.--Timing diagram for single 650-Mbps source mode.

directly through the source data multiplexer to the channel data

demultiplexer. There, alternate bits of each channel were split,

forming four channels at 162.5 Mbps each. In the single 650-Mbps source mode alternate bits of the PRBS were first split

into two 325-Mbps channels prior to passing to the channel

data demultiplexer as before. As with any high-speed electron-

ics system minor length adjustments for the microcoaxial

interconnects were necessary to optimize timing. Moreover, inorder to observe GaAs level signals on the oscilloscope, a

signal termination of 50 f_ to ground was required. In order toachieve this, a signal termination board was built and includedin the transmit chassis.

Phase II

In Phase II the four 162.5-Mbps signals from the channel

data demultiplexer (using both modes described in Phase I)were fed to the bit interleaver and tested under two additional

modes, straight or interleaved, using different PRBS patterns.

Direct routing is depicted in Fig. 3, which shows each 162.5-

Mbps 2-bit pair passing directly to the QPPM encoders. Figure5 shows the interleaving option. The bit-by-bit interleaving of

both channels was accomplished by exchanging the least

significant bits only (i.e., bit 2 of Channel A was exchanged

with bit 2 of Channel B). The final two 2-bit pairs were passedto the QPPM encoders for QPPM symbol creation. Test points

built into the design enabled observation of critical signals.

Phase III

Phase III added the QPPM symbol encoders and QPPM

translators. Initially, 16-bit and 32-bit binary data patterns

were input to the transmitter for a quick check of the QPPM

symbols on the sampling scope. Encoding of information bits

into QPPM symbols is described in a previous paper 2 and is

summarized in Fig. 6. QPPM encoded signals are shown for all

transmitter operating modes in Figs. 3 to 5. More robust testingwas then performed using PRBS patterns as long as 223-1,

along with the video data. On a commercial BER test setreceiver the bit-error rate observed was zero.

Testing Issues

Special attention to details and a well-thought-out test plan

were required for testing the high-speed circuits. The GaAs

IC' s used were electrostatic-sensitive devices; therefore ground-

4

iI

325-MDps PRBS

IBit 11 o

Channe] A J

Bit 2/ 1

lOo/:_i encoded oh A

TS=6.

I.

325-MDBS vi deoll[ I

Channel 8 _/Bit 2/ 1

I IOPf_i encoded ch B

i 1

I

1 1

I1

oi

I

IIt

0 0 0 0

I

I

0 0

0 0I

(a) Inter]

1 0

0 0

g of channel A wi th B

oioI

00

I

(b) Interleaving of channel B with A

Figure 5.--llmlng diagram for dual 325-Mbps sources with interleaving option.

0 0 0

0 0

0 0

Informationbits

b 1 b 0i m

0 0

0 1

1 0

1 1

QPPM symbols

, t

/

1 I

Figure 6.--Encoding of information bits into QPPM symbols.

Figure7.--Top view of a typical prototypeboard.

ing straps for the operator and properly grounded electrostatic-insensitive surfaces are recommended. Because GaAs IC' s are

also very sensitive to certain power levels and the order in

which they are applied, it is advisable to check them before

powering up a board. In order to observe high-speed signals, aTektronix P6156 probe (3.5-GHz bandwidth) was used, al-

though not without some difficulty because of the high density

of components and cables and the very small dimensions. A

much better method for observing signals is to predetermine

test points and bring them out in the design.

V. Packaging and Front Panel Layout

For ease of debugging the prototype electronics of the Hi-

LITE project, the boards are all mounted on slides, allowing

probe access. The prototype boards, as shown in Fig. 7, are 4

in. wide and 5 in. high. One edge has a power connector, and

the other three have SMA connectors for input/output and test

signals. Because the cooling fans are installed on the back

panel, the circuit boards are oriented perpendicular to it for free

airflow. The front panel is depicted in Fig. 8, and the chassis

layout is shown in Fig. 9. Inputs to the source data multiplexer

are on the left side of the panel. A reference signal (VBBre f =

- 1.2 V) is supplied in case the data source is single ended rather

than differential. In the middle of the panel the QPPM outputs

for both channels are available in either ac-coupled or dc-coupled format. On the right is the input/output for the clock

generation and distribution board. Differential clock signals

such as 650 and 325 MHz are provided for the transmitter andother Hi-LITE electronics.

The transmitter has been tested and integrated in the Hi-

LITE system. A future paper will describe the capabilities of

the automated test equipment and present system test results

for a wide range of operating parameters.

E_3 E3 _3

SOURCE DATA MI/X

INPUTS

QPPM ENCOOEll

outPuTs

Figure8.--PCE transmitter chassisfront panel layout.

CLOCK

QENEIIATION / DISrltllllrloN

BOARD XI

6

C-93-012981

Figure9.--PCE transmitterchassisassemblylayout.

VI. Appendix--Glossary, CAD Schematics, andInterface Control Documents

Glossar_

ASIC

BER

DCE

CAD

PCE

GaAs

application-specific integrated circuitbit error rate

demonstration communications electronics

computer-aided design

prototype communications electronics

gallium arsenide

Hi-LITE

IC

MbpsNRZ

PRB

QPPMSTE

SMAVCR

High-Speed Laser Integrated TerminalElectronics

integrated circuit

megabits per secondnonreturn to zero

pseudorandom bit sequencequaternary pulse-position modulation

special test equipment

subminiature amphenolvideo cassette recorder

,°,,.2l[tJ m

=e (Um=" 1;

I_ CLW2 1E J

I_ 3_5C, LK1- ,

I__ 650CLK-

325CLK

I_ 325_LK-

8 DATAI,,T~

8DATA2T __

SDATA1 IPT-

SOUT_T C:>

--_ BOUTChB

_> MODESEL

vtt I_ O -2.0v

vdd I_ O OVG_AIHk_h

vbb$ _ O C_=AsThres

Figure A-1 .m CAD schematic for source data multiplexer of PCE transmitter.

SfNChA

_)._ SiNChB

PRLD

CLK/4 1A

CLK/4 1A-

imp. MI_TRGHT

BITOChAT-

BITI_T- I_

BITOChBT- _),

BITlChBT-

bltOChA

b_lChAbaOChe E_

bitlChe

Figure A-2.--CAD schematic for channel data demultiplexer of PCE transmitter.

bit 1ChA

bit0ChB

CLK 1A,

CLK 1A-

vtt

DIV4P IA

DIV4P 1A-

IOG044-2

m

0e OI _ ,D

O2 O2D3 O_ la ,

17 .04 04 -

tl

06 OE 14 .

0? 07 1]

DIeLK

p/'g 0"/!1

OEPl.Oe

10G022-2

QOUTChaT- 6

QOUTCHs

<>

Ol 0a

04 04 le

De 0e 14 .

IOG002-2 P7 07 |.I, -

ai eLK

'vdd P/_ ¢t 11,_ 10 OE

- PL0e

10G002-2 10G(_2-2

Figure A-3.---CAD schematic for QPPM symbol encoder of PCE transmitter.

QOUTChBT-

QOUTChB

10

vtt -2._ ___vdd OVC._A_

D vbbs GaAllThre_.

_) QOUTC_

QOUTChB

OUI_SBL

I

sm_r QChA1AC

Q_RM _

Figure A-4.--CAD schematic for QPPM output translator of PCE transmitter.

]!

S_al Nam9

325DJkT1 &325DA2'1 o

325DAT2 &325DAT2"

6S ODA'Z& &6SODA_"

325CL][1 &325CLKI"

32 SCZ.K2 &325c]r,Jq2"

650CI_ &6SOCLX"

32SCLX_ &325C_KA"

325CL!_ &325CLFJ_"

NODESBX,

Signal l)_pti0-._

ConnectorS£gnaZTw_ Source Descr£nt£on

mNA4 &8NA5

!_8 &M(A9

814A2 S &SI(A26

!_7 &8_6

8NA21 &SNA10

8NA28 &BMA2?

SNA3Z &SS4A32

8MA29 &SMA30

SMAIS

P£coLOg£c DKl_or QPPNor B _. Tost Data 8ounce (TDa)

PLcoLogic Vidoo or QPPNor RCL Teat Data Source

PicoLog£c BmrJ_ oror ECL Test Data 8ourco

P£coLogl© BI;RT or

PLcoLogic Video or 21)|

P£coLog£c BERT or TDS

PlcoXxxjic CI_ O]_i/DZST;¢1k/2 & Clk/2-

P_co][,og£c C/JC GI=N/DZr_;clk/2 & clk/2"

]CGSC

SourcoPls32Sl_s Dataand Data- f_ IJlSi_or

8ourca12s32SXhs Dataand Data" _rol VZDKO or 8TE

8ouwcot3 ! 6SOl(ha Dataand Data* 2rum BER2 or

325Nhs Clock tO dr_ve dataIJour©all.

32SlOas Clock to drive dataSomrca/2.

650Nhs Clock to drive dataSource#3.

325l(hs Clock to dr£ve(:haul A ]r_ttcb at the Output.

325Nhs Clock to drive

thermal S Latch at the Output.

Select L£no to select e_thertwo 32514_s sou¢cas oR one6SONhs source.

Figure A-5.MTyplcal Interface and control document page for PCE transmitter.

12

GBL 90GUPB-40 PROTOTYPE BOARD BOTTOM SIDE COMPONENT LAYOUT

BOARD NAME:

SITE: __

CI41P 'fYPE: 10GOOI

ORIENTATION: EAST

HILITE

PAGE __ OF.____

DATE:

ENG°R:

@ NIO

[]

[]

MAINTNN NORTH _l! THRU NIO) PADS UP REGARDLESS OF

CHiP ORIENTATION,

50 OHM CHIP RESISTOR

1OOOpF CHIP CAP - CHOOSE PHYSICAL,[5]_ SIZE AS REQUIRED FOR BEST FIT.

tO.O00pF CHIP CAP

INDICATES OC WIRING (30 AWG JUMPER)

1_OOl[.Q_l..11-.to,-N

FigureA-6.mTypical fabricationdocumentfor GaAs IC's bottom side.

VII. Acknowledgments

The authors wish to acknowledge Mr. Larry Nagy and Mr.

Dale Mortensen for their important contributions to editing

this paper and to integrating the transmitter, respectively. Mr.Norm Melnyk and Mr. James Williams were very instrumental

during fabrication, testing, and integration of the transmitterelectronics.

VIII. References

l.Budinger, J.M., et al., "QPPM Receiver For Free-SpaceLaser Communications," AIAA 15th International Communi-

cations Satellite Systems Conference, San Diego, CA, Feb.

28-Mar. 3, 1994.

2.Budinger, J.M., et al., "Quaternary Pulse Position Modula-tion Electronics for Free- Space Laser Communications," AIAA/

NASA/OAI Conference on Advanced SEI Technologies, Cleve-

land, OH, Sept. 4-45, 1991.

13

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February 1994 Technical Memorandum4. TITLE AND SUBTITLE 5. FUNDING NUMBERS

Integration and Test of High-Speed Transmitter Electronics for Free-SpaceLaser Communications

6. AUTHOR(S)

Nitin J. Soni and Paul J. Lizanich

7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES)

National Aeronautics and Space AdministrationLewis Research Center

Cleveland, Ohio 44135-3191

9. SPONSORING/MONITORING AGENCY NAME(S) AND ADDRESS(ES)

National Aeronautics and Space Administration

Washington, D.C. 20546-4)001

WU-506-72-21

8. PERFORMING ORGANIZATION

REPORT NUMBER

E-8033

10. SPONSORING/MONITORING

AGENCY REPORT NUMBER

NASA TM- 106295

AIAA-94-1158

11. SUPPLEMENTARY NOTES

Prepared for the 15th International Communications Satellite Systems Conference sponsored by the American Institute of Aeronau-tics and Astronautics, San Diego, California, February 28-March 3, 1994. Nitin J. Soni, NASA Lewis Research Center and Paul J.Lizanich, Analex Corporation, 3001 Aerospace Parkway, Brook Park, Ohio 44142. Responsible person, Nitin J. Soni, (216)433-6591.

12a. DISTRIBUTION/AVAILABILITY STATEMENT 12b. DISTRIBUTION CODE

Unclassified - Unlimited

Subject Categories 32, 33

13. ABSTRACT (Maximum 200 words)

The NASA Lewis Research Center in Cleveland, Ohio, has developed the electronics for a free-space, direct-detectionlaser communications system demonstration. Under the High-Speed Laser Integrated Terminal Electronics (Hi-LITE)

Project, NASA Lewis has built a prototype full-duplex, dual-channel electronics transmitter and receiver operating at

325 megabits per second (Mbps) per channel and using quaternary pulse-position modulation (QPPM). This paper

describes the integration and testing of the transmitter portion for future application in free-space, direct-detection laser

communications. A companion pape r! reviews the receiver portion of the prototype electronics. Minor modifications to

the transmitter were made since the initial report on the entire system,'- and this paper addresses them. The digital

electronics are implemented in gallium arsenide integrated circuits mounted on prototype boards. The fabrication and

implementation issues related to these high-speed devices are discussed. The transmitter's test results are documented,

and its functionality is verified by exercising all modes of operation. Various testing issues pertaining to high-speed

circuits are addressed. A description of the transmitter electronics packaging concludes the paper.

14. SUBJECTTERMS

QPPM (Quanternary Pulse Position Modulation); Direct detection laser

communications; Transmitter

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