Instruction, interrupts & io processing

Unit 5 -INSTRUCTION, INTERRUPTS and IOPROCESSING

Abhineet Anand

Computer Science and Engg. DepartmentUniversity of Petroleum and Energy Studies, Dehradun

December 9, 2012

Abhineet Anand (UPES, Dehradun) INSTn , INTERRUPTS, IO PROCESSING December 9, 2012 1 / 23

Outline

1 Instruction CodesIntroductionOperation CodeOperands

2 Instruction FormatsSingle accumulator organizationGeneral register organizationStack organizationEvaluation of Arithmetic Statement

3 Addressing ModesType of Addressing Modes

4 Program InterruptTypes of Interrupts


Instruction Codes

A Computer instruction is binary code that specifies a sequence ofmicro operation for the Computer.

The Computer reads each instruction from memory and places it in acontrol register.

The control then interprets the binary code of the instruction andproceeds to execute it by issuing a sequence of micro operations.


Instruction Codes

An instruction code is a group of bits that instruct the computer toperform a specific task.

It is usually divided into parts, each having its own particularinterpretation.They are:

I Operation Code, andI Operands.

The most basic part of an instruction code is its operation part.


Operation Code

The Operation Code (OpCode) of an instruction is a group of bits thatdefine each operation such add, subtract, multiply, shift, andcomplement.

It must consist of at least n bits for a given 2n distinct operations.

Suppose we are having 64 (26) operation then the length of OpCodewill be 6.

The control unit decode the OpCode and do the required operation.


Operands

The Operation must be performed on some data stored in processorregister or in memory.

Every Computer has its own particular instruction code format.

The Simplest way to organize a computer is to have an instructioncode format with two parts.

The first part specifies the operation to be performed and the secondspecifies an address.


Instruction Formats

The bits of the instruction are divided into groups called fields. Themost common fields found in instruction formats are:

I An Operation Code field that specifies the operation to be performed.I An Address field that designates a memory address or a processor

register.I A mode field that specifies the way the operand or the effective

address is determined.


Instruction Formats

Computer may have instruction of several different lengths containingvarying numbers of addresses.

The number of address fields in the instruction format of a computerdepends on the internal organization of its registers.Most computers fall into one of three types of CPU organization:

1 Single accumulator organization.2 General register organization.3 Stack organization.


Single accumulator organization

All Operation are performed with an implied accumulator register. Theinstruction format in this type of computers uses one address field.

Example:

ADD Xwhere, X is the address of the operand.

The ADD instruction in this case results in the operationAC < − AC + M[X].


General register organization

The instruction format in this type of computer needs three registeraddress fields.

Thus the instruction for an arithmetic addition may be written in anassembly language as

ADD R1, R2, R3to denote the operation R1 < − R2 + R3.

The number of address fields in the instruction can be reduced fromthree to two if the destination register is the same as one of thesource registers.

ADD R1, R2would denote the operation R1 < − R1 + R2.


Stack organization

The stack-organized CPU would have PUSH and POP instructionwhich requires an address filed.

Example:

PUSH Xwill push the word at address X to the top of the stack. The stackpointer is updated automatically.

The operation is performed on the two items that are on top of thestack.


Evaluation of Arithmetic Statement

X = ( A + B ) ∗ ( C + D )

Three - Address InstructionADD R1, A, B R1 < − M[A] + M[B]ADD R2, C, D R2 < − M[C] + M[D]MUL X, R1, R2 M[X] < − R1 ∗ R2.

Two - Address InstructionMOV R1, A R1 < − M[A]ADD R1, B R1 < − R1 + M[B]MOV R2, C R2 < − M[C]ADD R2, D R2 < − R2 + M[D]MUL R1, R2 R1 < − R1 ∗ R2MOV X, R1 M[X] < − R1


Evaluation of Arithmetic StatementOne - Address InstructionLOAD A AC< − M[A]ADD B AC < − AC + M[B]STORE T M[T] < − ACLOAD C AC < − M[C]ADD D AC< − AC + M[D]MUL T AC < − AC ∗ M[T]STORE X M[X] < − ACZero - Address InstructionPUSH A TOS < − APUSH B TOS < − BADD TOS < − (A + B)PUSH C TOS < − CPUSH D TOS < − DADD TOS < −(C + D)MUL TOS < − (C + D) * (A+ B)POP X M[X] < − TOS


Addressing Modes

The way the operands are chosen during program execution isdependent on the addressing mode of the instruction.The addressing mode specifies a rule for interpreting or modifying theaddress field of the instruction before the operand is actuallyreferenced.

I An Operation Code field that specifies the operation to be performed.I An Address field that designates a memory address or a processor

register.I A mode field that specifies the way the operand or the effective

address is determined.


Addressing Modes

Computer use addressing mode techniques for the purpose ofaccommodating one or both of the following provisions:

I To give programming versatility to the user by providing such facilitiesas pointers to memory, counters for loop control, indexing of data, andprogram relocation.

I To reduce the number of bits in the addressing field of the instruction.


Type of Addressing Modes

Although most addressing mode modify the address field of theinstruction, there are two modes that need no address field at all.These are:

I Implied Mode: Operands are specified implicitly in the definition of theinstruction. Like ”Complement Accumulator”.Zero-Address instruction in a stack-organized computer areimplied-mode instruction since the operands are implied to be on top ofthe stack.

I Immediate Mode: In this mode the operand is specified in theinstruction itself.Immediate-mode instruction are useful for initializing registers to aconstant value.



Register Mode: In this mode the operands are in register that residewithin the CPU.The particular register is selected from a register filed in theinstruction.

Register Indirect Mode: In this mode the instruction specifies aregister in the CPU whose content give the address of the operand inmemory.The advantage is that the address field of the instruction uses a fewerbits to select a register than would have been required to specify amemory address directly.



Auto-increment Mode or Auto-decrement Mode

Direct Address Mode

Indirect Address Mode

Relative Address Mode

Indexed Addressing Mode

Base Register Addressing Mode


Program Interrupt

The concept of program interrupt is used to handle a variety ofproblems that arise out of normal program sequence.

Program interrupt refers to the transfer of program control from acurrently running program to another service program as a result ofan external or internal generated request.

Control returns to the original program after the service program isexecuted.


Program Interrupt

The interrupt procedure is, in principal, quite similar, to subroutine callexcept for three variation:

1 The interrupt is usually initiated by an internal or external signal ratherthan from the execution of an instruction;

2 The address of the interrupt service program is determined by thehardware rather than from the address field of instruction; and

3 an interrupt procedure usually stores all the information necessary todefine the state of the CPU rather than storing only the programcounter.


Program Interrupt

These three procedure concept are clarified further as:1 The content of the program counter2 The content of all processor register3 The content of certain status conditions

The collection of all status bit conditions in the CPU is sometimescalled a Program Status Word or PSW.


Types of Interrupts

There are three major types of interrupts that cause a break in thenormal execution of a program. They are:

1 External Interrupts - come from input-output (I/O) devices, from atiming devices, from a circuit monitoring the power supply, or from anyother external source.Example: I/O devices requesting for transfer of data, I/O devicesfinished transfer of data, elapsed time of an event, or power failure.

2 Internal Interrupts - arise from illegal or erroneous use of an instructionor date, also known as trap.Example: register overflow, divide by zero, invalid operation code, stackoverflow, protection violation.

3 Software Interrupts - initiated by executing an instruction. It is a specialcall instruction that behaves like an interrupt rather than a subroutinecall.


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Instruction, interrupts & io processing

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