From Real Mode to From Real Mode to Protected ModeProtected Mode

04/09 – 2009

INF[34]151 – Operating Systems

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Topics Today

Basic Execution Environment (Brief description)

Protected Mode (Setup)

Code Example (Next week!)

Next Weeks (What lies ahead?)

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Basic Execution Environment

Address space Basic program execution registers x87 FPU registers Stack MMX registers XMM registers

I/O ports, Control registers, Memory management registers, Debug registers, memory type range registers, Machine specific registers, Machine check registers, Performance monitoring counters.

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Three Memory Models

Real-Address Mode Model Segmented Model Flat Model

Much more on memory organizationlater in the course.

Protected Mode

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Control Registers CR0 - CR3

CR0 Used to enable protected mode and paging

(PM enabled by writing 1 to bit 0 after setup.)

CR1 Not implemented on any x86 processors ->

Pentium

CR2 (more later) Page fault linear address

CR3 (more later) Page Directory Base Address Register

31 0PEPG

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Segment Registers in Real Mode

Contains only the upper 16 bits of a segment's base address.

The lower nibble is asumed to be 0000, giving a 20 bit base address.

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Segment Registers in Protected Mode

The segment registers contains the visible part of a segment selector.

An invisible part is stored in memory in a Global Descriptor Table (GDT) or Local Descriptor Table (LDT).

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Privilege Levels

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

What does the OS need to know?

Wich task? Start address. Length. Access attribute.

Read only, Execute only, Read/Write

Privilege level (minimum level to access.) Code, data or special segment? Present in memory?

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

GDTR -> GDT [-> LDT] -> Segments

The Descriptor Tables GDT and LDT

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Local Descriptor Table Descriptor

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Local Descriptor Table

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

General Format of Segment Descriptor

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Global Descriptor Table

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

GDT and LDT

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

Switching to Protected Modeclilgdt gdtrsmsw %axorw $1,%axlmsw %ax

gdtr:.word bla bla bla # limit.long bla bla bla # base address

.align 8gdt:

# the first entry of the GDT is not used by the processor.long 0.long 0

# kernel code segment descriptor (same for bootblock).word bla bla bla # limit.word bla bla bla # base 15:00.byte bla bla bla # base 23:16.word bla bla bla # flags.byte bla bla bla # base 31:24

# kernel data segment descriptor.word bla bla bla # limit.word bla bla bla # base 15:00.byte bla bla bla # base 23:16.word bla bla bla # flags.byte bla bla bla # base 31:24

2007 Jørn Uno Myrvoll & Jon Anders SkorpenINF[34]151 – Operating Systems

What lies ahead?

Next week: Project 2 Precode Discussion Read and understand the precode No preparation = No discussion

Week after next: Interrupts PIC PIT

Q&A

Questions?