Incremental Signoff Metal Fill Flow using Encounter®, PVS & QRC Extraction

Takeyoshi, IKEDA (AE Director @Cadence Japan)SSV Signoff Summit21st, Nov 2013

Incremental Signoff Metal Fill Flow using Encounter®, PVS & QRC Extraction

2 © 2013 Cadence Design Systems, Inc. All rights reserved.

Physical Implementation (Encounter Implementation System (EDIS)) Post route timing optimization with virtual metal fill based RC extraction Invoking Incremental RC extraction & metal fill Trim metal fill after ECO routing Trim metal fill around timing critical nets

Cadence Tools in the Flow

RC Extraction (QRC Extraction) Virtual Metal Fill(VMF) based TQRC/IQRC Incremental TQRC/IQRC Extraction

Metal Fill (PVS) Incremental Metal Fill


Agenda

1. Metal Fill Technical Issue

2. Timing Aware Metal Fill Flow

3. Summary

4. Japanese Customer Story


1. Metal Fill Technical Issue


1-1. What’s Metal Fill

Large thickness variation

Without Metal Fill

With Metal Fill

*CCP--- Cadence® Chemical Mechanical Polishing Predictor

Small Thickness variation

M2

M1

M1

M2

DFM -> CMP -> Verify CMP

Metal Fill RC impact -> worse timing

CCP* thickness map


MF Insertion TAT

1-2. 40nm Fill vs. 28nm Fill40nm

wire

Regular Fill Regular Fill

OPC* Fill

X 5.6 X 5.9Memory X 5.7

28nm

*OPC: Optical Proximity Correction

28nm 20M Instance7.5hrs@16cpuMemory 50G


1-3. Metal Fill impact to Timing

Without MF

SPEF (Capacitance) comparison

sign-off MF vs. without MF

X 1.6

Sign

-off

MF

QRC: RC extraction

Tempus: Timing analysis

Capacitance increase by Metal Fill

Increase Violation

0.110 pF

0.175 pF


Sign-offyes

1-4. Existing Flow

P&R

Sign-off MFgeneration

without MF

RC extractionDelay Calc

RC extractionDelay Calc

TimingECOno

correlation

Increase # of design iteration causes an increase of total TAT time

In 28nm and below, RC correlation is not good between initial P&R phase and sign-off phase due to complicated metal fill rule.

Metal fill generation and RC extraction time increase with large scale and complicated design.

Chip performance becomes worse with large design margin

7.5hrs

30hrs

28nm 20M Inst@16cpu

10~15iterations

Non-Physical Aware Timing ECO causes more # of iteration.


2. Timing Aware Metal Fill Flow


EDIS

no

no

EDIS &Tempus

EDISDesign optimize

2-1. Production Proven by Renesas

EDIS

timing

timing

OK?

OK?yes

trim MF

Tempus:Timing ECO

timing

yes

Sign-off

timing

Sign-off MF

PVS&QRC:Incremental

Incremental Metal Fill and RC Extraction

PVS: Sign-off MF

the command to generate Sign-off Metal Fill by PVS.

QRC:VMF

RC extraction with virtual metal fill

trim MFNN

trimMFNearNet to remove metal fill around critical nets

Physical Aware ECO


SPEF (Capacitance) Comparison

VMF vs. sign-off MF

Sign-off MF

VMF

2-2. QRC Extraction: Virtual Metal Fill Virtual Metal Fill Capability

CUSTOMER DATA

Non-Confidential - Can be Disclosed publicly. However, modification, copying or distribution may be restricted nd require prior written permission of owner.

Good correlation between VMF and sign-off MF

11

Fast run time compared to Sign-off MF

Timing Analysis


2-3. 　 EDIS: To generate Sign-off Fill by PVS

Sign-off Metal Fill generation

PVS -> Run Metal FillSign-off MF rule

Metal FillFill generated by PVS is loaded into EDIS automatically.


2-4. 　 PVS: Incremental Metal Fill

Incremental Metal Fill CapabilityFillwire

Design change

Incremental MF

Trim MF

WithoutIncr-MF With Incremental

55%

93%

large design change

Small design change


2-5. 　 EDIS: To remove fill around critical nets

Fill

trimMetalFillNearNet capability

TimingPass

20.00%

minTrimDensity

Option to keep minimum Density

Critical Net

TrimMFNN

wire High performance

Run Time

3min

reference

Fail

Pass


2-6. 　 QRC Extraction: Incremental RC Extraction (IQRC)

RC Extraction

Trim Metal Fill+

Incremental Metal Fill

ECO

Timing

Incremental RC Extraction

Timing

86%

Incremental Extraction

RC Extractor checks for design changes, runs RC extraction on the modified areas only.


3. Summary


RC extraction Timing analysis

MF generation

trimMF

3. 　 Summary1 iteration TAT comparison

No FillEDIS

RC extraction

timing

EDIS

RC extraction

timing

VMF

VMF

EDIS

RC extraction

Sign-off MF

timing

real Fill

notrim MF

Incremental MF

EDIS

Incremental extraction

timing

Incr-MFIncr-Extract

70% TAT reduction

70% TAT reduction is possible with incremental MF insertion and incremental RC extraction.


4. Japanese Customer Story

© 2013 Renesas Electronics Corporation. All rights reserved.19

Renesas improved timing closure using EDI-PVS Metal Fill

19

Place ＆Route

Metal Fill

SignOffCheck

Time

Sign-off check

Metal fill

layout

ECO

Big TimingImpact ！

Fix timing violations in EDI

Density violationsTiming violations

GDS

Place ＆Route

SignOffMetal FillIn DesignMetal Fill

Place & Route

Layout tool

iteration

SignOffCheck

Fix timing violations 　 with Metal Fill in EDI

Trim Metal Fill withDensity and Timing Aware

Deleted metal fill of upper and lower layer of critical path.

Reduced TNS of Setup and Hold to 10%~75%.

Design term1/3

Timing Analysis(Layout tool)

10 Iterations 1 iteration

ManyIterations

Time

Previous flow Our flow

Metal Fill to only ECO area

CUSTOMER DATA

Non-Confidential - Can be Disclosed publicly. However, modification, copying or distribution may be restricted nd require prior written permission of owner.


Thank You!

Incremental Signoff Metal Fill Flow using Encounter®, PVS & QRC Extraction

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