Improved Regrowth of Self-Aligned Ohmic Contacts for III-V FETs North American Molecular Beam...
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Transcript of Improved Regrowth of Self-Aligned Ohmic Contacts for III-V FETs North American Molecular Beam...
Improved Regrowth of Self-Aligned Ohmic Contacts for III-V FETs
North American Molecular Beam Epitaxy Conference (NAMBE),8-11-2009
Mark A. Wistey
Now at University of Notre [email protected]
A.K. Baraskar, U. Singisetti, G.J. Burek, M.J.W. Rodwell, A.C. GossardUniversity of California Santa Barbara
P. McIntyre, B. Shin, E. KimStanford University
Funding: SRC
2Wistey, NAMBE 2009
Outline: Regrown III-V FET Contacts
•Motivation for Self-Aligned Regrowth
•Facets, Gaps, Arsenic Flux and MEE
•MOSFET Results•Conclusion
3Wistey, NAMBE 2009
Motivation for Regrowth: Scalable III-V FETs
Classic III-V FET (details vary):
ChannelBottom BarrierInAlAs Barrier
Top Barrier or Oxide
Gate
Low doping
GapSource Drain
Large Rc {
Large Area Contacts{III-V FET with Self-Aligned Regrowth:
ChannelIn(Ga)P Etch Stop
Bottom Barrier
High-k
Gate
n+ Regrowth
High Velocity Channel
Implant: straggle,short channel effects
• Advantages of III-V’s
• Disadvantages of III-V’s
Small Raccess
Small RcSelf-aligned, no gaps
High doping: 1013 cm-2 avoids source exhaustion
2D injection avoids source starvation
Dopants active as-grown
High mobilityaccess regions
High barrier
Ultrathin 5nm doping layer}
4Wistey, NAMBE 2009
MBE Regrowth: Bad at any Temperature?
• Low growth temperature (<400°C):
–Smooth in far field–Gap near gate (“shadowing”)–No contact to channel (bad)
Gate
200nm Gap
Source-DrainRegrowth
SEMs: Uttam Singisetti
Metals
Channel
SiO2
high-k Gate
Source-DrainRegrowth
Regrowth: 50nm InGaAs:Si, 5nm InAs:Si. Si=8E19/cm3, 20nm Mo, V/III=35, 0.5 µm/hr.
•High growth temperature (>490°C):– Selective/preferential epi on InGaAs– No gaps near gate
– Rough far field – High resistance
5Wistey, NAMBE 2009
560C
490C460C
SiO2 dummy
gate
SiO2 dummy
gate
540C
No gaps, but
faceting next to gates
Gap
High Temperature MEE: Smooth & No Gaps
Smooth
regrowth
Note faceting: surface kinetics, not shadowing.
In=9.7E-8, Ga=5.1E-8 Torr
Wistey NAMBE 2009 6
Shadowing and Facet Competition
[111]
[100]
Fast surface diffusion = slow facet
growth
Slow diffusion = rapid facet growth
Shen & Nishinaga, JCG 1995
[111] faster[100] faster
• Shen JCG 1995 says:Increased As favors [111] growth
SiO
2
[111]
[100]
Slow diffusion =fast growth
Fast surface diffusion =
slow facet growth
SiO
2
Good fill next to gate.
• But gap persists
Wistey NAMBE 2009 7
Gate Changes Local Kinetics
[100]
2. Local enrichment of III/V ratio
4. Low-angle planes grow insteadsidew
all
1. Excess In & Ga don’t stick to SiO2
• Diffusion of Group III’s away from gate
3. Increased surface mobility
Gate
SiO2 or SiNx
8Wistey, NAMBE 2009
Change of Faceting by Arsenic Flux
SiO2WCr
Increasing As flux
Original Interface
InAlAsmarkers
InGaAs
0.5x10-6
1x10-6
2x10-6
5x10-6
• Lowest arsenic flux → “rising tide fill”
• No gaps near gate or SiO2/SiNx
• Tunable facet competition
(Torr)
Growth conditions: MEE, 540*C, Ga+In BEP=1.5x10-7 Torr, InAlAs 500-540°C MBE.
• InGaAs layers with increasing As fluxes, separated by InAlAs.
9Wistey, NAMBE 2009
Control of Facets by Arsenic Flux
SiO2WCr
Increasing As flux
Original Interface
InAlAsmarkers
InGaAs
0.5x10-6
1x10-6
2x10-6
5x10-6
• Lowest arsenic flux → “rising tide fill”
• No gaps near gate or SiO2/SiNx
• Tunable facet competition
(Torr)
Growth conditions: MEE, 540*C, Ga+In BEP=1.5x10-7 Torr, InAlAs 500-540°C MBE.
• InGaAs:Si layers with increasing As fluxes, separated by InAlAs.
[111]
[100]
SiO
2
Filling[11
1]
[100]
SiO
2
[111]
[100]
SiO
2
Conformal
Faceting
10Wistey, NAMBE 2009
Low-As Regrowth of InGaAs and InAs
4.7 nm Al203, 5×1012 cm-2 pulse dopingIn=9.7E-8, Ga=5.1E-8 Torr
SEMs: Uttam Singisetti
InGaAs regrowth (top view)
• Low As flux good for InAs too.
• InAs native defects are donors. Bhargava et al , APL 1997
• Reduces surface depletion.
InAsregrowth
InGaAs InAs
• No faceting near gate• Smooth far-field too
11Wistey, NAMBE 2009
InAs Source-Drain Access Resistance4.7 nm Al203, InAs S/D E-FET.
• Upper limit: Rs,max = Rd,max = 370 Ω−μm.• Intrinsic gmi = 0.53 mS/μm• gm << 1/Rs ~ 3.3 mS/μm (source-limited case)
➡ Ohmic contacts no longer limit MOSFET performance.
740 Ω-µm
12Wistey, NAMBE 2009
Conclusions
• Reducing As flux improves filling near gate• Self-aligned regrowth: a roadmap for scalable III-V FETs
–Provides III-V’s with a salicide equivalent• InGaAs and relaxed InAs regrown contacts
–Not limited by source resistance @ 1 mA/µm–Results comparable to other III-V FETs... but now scalable
13Wistey, NAMBE 2009
Acknowledgements
• Rodwell & Gossard Groups (UCSB): Uttam Singisetti, Greg Burek, Ashish Baraskar, Vibhor Jain...
• McIntyre Group (Stanford): Eunji Kim, Byungha Shin, Paul McIntyre
• Stemmer Group (UCSB): Joël Cagnon, Susanne Stemmer
• Palmstrøm Group (UCSB): Erdem Arkun, Chris Palmstrøm
• SRC/GRC funding• UCSB Nanofab: Brian Thibeault, NSF