Implementing the Controller. Outline Implementing the Controller With JK Flip-flops Decoder + D...

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Implementing the Controller

Transcript of Implementing the Controller. Outline Implementing the Controller With JK Flip-flops Decoder + D...

Page 1: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing the Controller

Page 2: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 3: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 4: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing the Controller

Once the state table is obtained, the controller can be implemented using one of these techniques.

1. Traditional method: With JK flip-flops design done at gate level. suitable for small controllers. procedure: prepare state table, use K-maps to obtain next-

state/output functions.

2. Decoder + D flip-flops suitable for moderately large controllers. procedure: use decoder to obtain individual states; from

the state table, obtain the next-state functions by inspection.

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Implementing the Controller

3. Multiplexers a more structured approach to implement controller. suitable for moderately large controllers. three level structure:

• first level consists of multiplexers that determine the next state of the register;

• second level is a register that holds the present state;

• third level has a decoder to provide separate output for each controller state.

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Implementing the Controller

4. One flip-flop per state also known as One-Hot Spot Method of ASM synthesis. procedure: allocate one flip-flop per state; from state table,

determine the formulae to set each flip-flop; must ensure that controller is properly initialized.

5. PLA/ROM highly regular approach. ROM approach uses a very simple table lookup technique

but suffers from large number of don’t care states. PLA can handle don’t care states well but design method is

still at gate-level.

Page 7: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 8: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: With JK Flip-flops

State table obtained from ASM chart:

Presentstate inputs

Nextstate outputs

G1 G0 S A2 A3 G1+ G0

+ T0 T1 T2

0 0 0 X X 0 0 1 0 00 0 1 X X 0 1 1 0 00 1 X 0 X 0 1 0 1 00 1 X 1 0 0 1 0 1 00 1 X 1 1 1 1 0 1 01 1 X X X 0 0 0 0 1

Present state

inputs Next state

Flip-flop inputs

G1 G0 S A2 A3 G1+ G0

+ JG1 KG1 JG0 KG0

0 0 0 X X 0 0 0 X 0 X

0 0 1 X X 0 1 0 X 1 X

0 1 X 0 X 0 1 0 X X 0

0 1 X 1 0 0 1 0 X X 0

0 1 X 1 1 1 1 1 X X 0

1 1 X X X 0 0 X 1 X 1

Corresponding state table using JK flip-flops:

Page 9: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 10: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: Decoder + D Flip-flops

The flip-flop input functions can be obtained directly from the state table by inspection.

This is because for the D flip-flops, the next state = flip-flop D input.

Decoder is then used to provide signals to represent different states.

D Q

D Q

2x4 decoder

T0

T1

T2

unused

G1

G0

?

?

clock

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Implementing Controller: Decoder + D Flip-flops

Given the state table:

Presentstate inputs

Nextstate outputs

G1 G0 S A2 A3 G1+ G0

+ T0 T1 T2

0 0 0 X X 0 0 1 0 0

0 0 1 X X 0 1 1 0 00 1 X 0 X 0 1 0 1 0

0 1 X 1 0 0 1 0 1 0

0 1 X 1 1 1 1 0 1 0

1 1 X X X 0 0 0 0 1

We can directly determine the inputs of the D flip-flops for G1 and G0.

DG1 = T1.A2.A3

DG0 = T0.S + T1

Page 12: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: Decoder + D Flip-flops

Flip-flop input functions:

DG1 = T1.A2.A3 DG0 = T0.S + T1

Circuit:

D Q

D Q

2x4 decoder

T0

T1

T2

unused

G1

G0

clock

A2

A3

S

Page 13: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 14: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: One Flip-flop per State

Require n flip-flops for n states; each flip-flop represents one state. (Other methods: n flip-flops for up to 2n states.)

D Q

D Q T1

T0?

?

clock

::

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Implementing Controller: One Flip-flop per State

Formulae for next state can be obtained directly from state table:

1. If there is only one line going into the state, then formula = input condition ANDed with the previous state.

2. If there are more than one line, then

formula = Ored of all the conditions found in (1).

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Implementing Controller: One Flip-flop per State

State table:

Presentstate inputs

Nextstate

S A2 A3

T0 0 X X T0

T0 1 X X T1

T1 X 0 X T1

T1 X 1 0 T1

T1 X 1 1 T2

T2 X X X T0

State diagram:

T0

S=0 A2=0

T1

S=1

A2=1, A3=0

T2

A2=1, A3=1

Flip-flop input functions:

DT0 = T2 + S'.T0

DT1 = S.T0 + A2'.T1 + A2.A3'.T1 = S.T0 + (A2.A3)'.T1

DT2 = A2.A3.T1

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Implementing Controller: One Flip-flop per State

Circuit diagram below. To initialize to state T0, set flip-flop of T0 to 1 and clear the rest to zero.

DT0 = T2 + S'.T0

DT1 = S.T0 + (A2.A3)'.T1

DT2 = A2.A3.T1

D Q

T1

T0S

clock

D Q

D Q T2A2

A3

clear

preset

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Implementing Controller: One Flip-flop per State

Alternative: Use Q' output for T0, and input function for T0 is complemented. To initialize, clear all flip-flops to zero.

DT0 = (T2 + S'.T0)'

DT1 = S.T0 + (A2.A3)'.T1

DT2 = A2.A3.T1

D Q

T1

T0

S

clock

D Q

D Q T2A2

A3

clear

Q'

Page 19: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 20: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: Multiplexers

Purpose of multiplexer is to produce an input to its corresponding flip-flop equals to the value of the next state.

The inputs of multiplexers are determined from the decision boxes and state transitions in the ASM chart.

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Implementing Controller: Multiplexers

Example 1:

Given the state table.

Presentstate inputs

Nextstate

G1 G0 S A2 A3 G1+ G0

+

0 0 0 X X 0 00 0 1 X X 0 10 1 X 0 X 0 10 1 X 1 0 0 10 1 X 1 1 1 11 1 X X X 0 0

Reformat the state table.

Presentstate

Nextstate

Multiplexerinputs

G1 G0 G1+ G0

+Input

conditions MUX1 MUX0

0 0 0 0 S'

0 0 0 1 S ? ?

0 1 0 1 A2'

0 1 0 1 A2. A3'

0 1 1 1 A2. A3

? ?

1 1 0 0 1 ? ?

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Implementing Controller: Multiplexers

Obtain multiplexer inputs:

Presentstate

Nextstate

Multiplexerinputs

G1 G0 G1+ G0

+Input

conditions MUX1 MUX0

0 0 0 0 S'

0 0 0 1 S 0 S

0 1 0 1 A2'

0 1 0 1 A2. A3'

0 1 1 1 A2. A3

A2. A3A2' + A2. A3' + A2. A3

= 1

1 1 0 0 1 0 0

Page 23: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: Multiplexers

Draw the circuit: Presentstate

Multiplexerinputs

G1 G0 MUX1 MUX0

T0 0 0 0 S

T1 0 1 A2. A3 1

T2 1 1 0 0

T1

T0

S

clock

D Q

D Q T2

A2

A3

2x4 decoder

G1

G0

MUX10123 S1 S0

MUX00123

S1 S0

0

0

0

1

Determine next state of register

Hold present state

Page 24: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: Multiplexers

Example 2:

w 0

1

T0 00

T1 01

x 10

T3 11 T2 10

y 10 y 01

z 10 z 01

Presentstate

Nextstate

G1 G0 G1+ G0

+Input

conditions

0 0 0 0 w'0 0 0 1 w0 1 1 0 x0 1 1 1 x'

1 0 0 0 y'1 0 1 0 y.z'1 0 1 1 y.z

1 1 0 1 y'.z1 1 1 0 y1 1 1 1 y'.z'

Presentstate

Multiplexerinputs

G1 G0 MUX1 MUX0

T0 0 0 0 w

T1 0 1 x+x'=1 x'

T2 1 0 y.z' + y.z= y

y.z

T3 1 1 y + y'.z'= y + z'

y'.z +y'.z' = y'

Page 25: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: Multiplexers

Presentstate

Multiplexerinputs

G1 G0 MUX1 MUX0

T0 0 0 0 wT1 0 1 1 x'T2 1 0 y y.zT3 1 1 y + z' y'

T1

T0

w

clock

D Q

D Q T3

yz

2x4 decoder

G1

G0

MUX10123 S1 S0

MUX00123

S1 S0

y'

y

0

x'

1

yz'

T2

Page 26: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Outline

Implementing the Controller With JK Flip-flops Decoder + D flip-flops One Flip-flop per State Multiplexers PLA/ROM

Page 27: Implementing the Controller. Outline  Implementing the Controller  With JK Flip-flops  Decoder + D flip-flops  One Flip-flop per State  Multiplexers.

Implementing Controller: PLA/ROM

Similar to the design using D flip-flops and a decoder.

The only difference is PLA essentially replaces the decoder and all the gates in the inputs of the flip-flops.

PLA/ROMExternal command

Commands to architecture

Present state

Next state

Register to represent states