Software Defined Radio

This chapter is an introduction to Software Defined Radio (SDR) in general.

Introduction

The conventional way of implementing waveforms and radio functions is based on

hardware based systems that do all the work. Generation, modulation,filter

functions,up conversion,down conversion of frequencies ,demodulation everything is

done with electronics in some way. Therefore, there are some limitations on what a

specific machine can perform. For example, a normal AM radio knows how to

perform its functions , convert the AM radio waves into sound that we can listen.

Now if we can see a radio technology that can turn our radio into a GSM telephone, a

WIMAX radio or a CDMA receiver or even a satellite terminal. That’s exactly the

benefit we get with software radios.

Waveforms

A waveform can be explained in the form of a radio function. Everything used to

describe a specific radio signal is included in the waveform. For example GSM is one

of the amin technologies for the implementation of 2G cellular systems . WiMAX or

CDMA would be other examples of waveforms.

Idea behind SDR

The idea behind the software defined radio is to bring the software source code as

close to the antenna as possible. Waveforms are

generated.,encoded.modulated,filtered and processed in computer software. The main

advantages of SDR are :

The ability to change waveform and functions on demand.

Quick and easy upgrading with new and enhanced features.

Cost effective solutions.

Receive and broadcast multiple channels at the same time.

Portability

Parameters of SDR

The parameters of software defined radio are antenna,wideband antenna,RF front

end,ADC,DAC,IF to baseband downconverter,baseband processing etc.

Receiving Software Radio

Transmitting Software Radio

Software Radio Block Diagram

RF FRONT END

Software

SoftwareA/D Converter

D/A ConveterRF Front End

Antenna

Antenna

Software Communications Architecture (SCA)

The Software Communications Architecture (SCA) is an open architecture defined by

the Joint Tactical Radio System (JTRS) Joint Program Office (JPO). The SCA has

been published to provide a common open architecture that can be used to build a

family of radios across multiple domains. The radios built upon SCA are

interoperable, can use a wide range of frequencies, and enable technology insertion.

The SCA also supports software reusability. The SCA is used as the underlying

architecture in our radio implementation.[1]

When the JTRS JPO was established to acquire a family of affordable, high capacity,

tactical radio systems which could provide interoperable network services, the need

for an open architecture emerged. By building upon a common open architecture,

JTRS can improve interoperability by providing the ability to share waveform

software between radios and reduce development and deployment costs. In view of its

potential applicability across a wide range of communications domains, JTRS JPO

named this architecture the Software Communications Architecture [2, 3, 4].

The JTRS JPO states that the SCA has been published to meet the following goals

[36]:

Common Open Architecture

The use of an open architecture has the advantages of promoting competition,

interoperability, technology insertion, quick upgrades, software reusability, and

scalability.

Multiple Domains

The SCA complaint radios must be able to support operations in a wide variety of

domains.

Multiple Bands:

The SCA compliant radio can replace a number of radios that use a wide range of

frequencies, and it can interoperate with them.

Compatibility:

The SCA compliant radio must be able to communicate with legacy systems to

minimize the impact of platform integration.

Upgrades:

The SCA architecture must enable technology insertion, so that new technologies can

be incorporated to improve performance, and to build future-proof radios.

Security:

Security is a very important aspect of military radios. The architecture should provide

the foundation to solve issues like programmable cryptographic capability, certificate

management, user identification and authentication, key management, and multiple

independent levels of classification.

Networking:

The SCA compliant radios should support legacy network protocols, for the purpose

of seamless integration. The architecture should also support wideband networking

capabilities for voice, data and video.

Software Reusability:

As with any other software architecture, the SCA architecture should allow for the

maximum possible reuse of software components. The components should support

plug-n-play behavior with waveforms being portable from one implementation to the

next.

The SCA defines an Operating Environment (OE) that will be used by radios. It also

specifies the services and interfaces that the applications use from the OE. The

interfaces are defined by using the CORBA IDL, and graphical representations are

made by using UML & XML [1].

The OE consists of a Core Framework (CF), a CORBA middleware and a POSIX-

based Operating System (OS). The OS running the SCA must provide services and

interfaces that are defined as mandatory in the Application Environment Profile

(AEP) of the SCA. The CF describes the interfaces, their purposes and their

operations. It provides an abstraction of the underlying software and hardware layers

for software application developers. An SCA compatible system must implement

these interfaces. The interfaces are grouped as Base Application Interfaces,

Framework Control Interfaces and Framework Services Interfaces.

The Base Application Interfaces are used by the application layer. They provide the

basic building blocks of an application.

The Framework Control Interfaces provide the control of the system. The application

layer can reach the OS through these control interfaces.

OPERATING ENVIORNMENT (OE)

CORE FRAMEWORKCORBA

MIDDLEWARE POSIX BASED OS

The Framework Services Interfaces provide the system services. These interfaces

support both core and none-core applications.

The CF uses a Domain Profile to describe the components in the system. The Domain

Profile is a set of XML files that describe the identity, capabilities, properties, inter-

dependencies, and location of the hardware devices and software components that

make up the system [2].

Relationship between SCA components

Although the SCA uses the CORBA middleware for its software bus, the application

layer can reach the OS by other means. CORBA adapters can be used to wrap the

legacy software components. Figure shows the relationship between the AEP, the

application and the OE.

Middleware

Middleware is a layer of software between the applications and the underlying

network. This layer provides services like identification, authentication, naming,

trading, security and directories. The middleware also aims to provide hardware and

location transparency to software entities. It functions as a conversion and translation

layer. With the help of middleware, software applications running on different

platforms can communicate transparently.

`

Relationship between the SCA and CORBA

Our project uses CORBA as the underlying middleware. CORBA has been chosen as

the middleware layer of the Software Communications Architecture, because of the

wide commercial availability of CORBA products and its industry acceptance.

CORBA is used to provide a cross-platform middleware service that simplifies

standardized client/server operations in this distributed environment by hiding the

actual communication mechanisms under an Object Request Broker software bus [24,

25].

POSIX Based Operating System

POSIX (Portable Operating System Interface for UNIX): A set of programming

interface standards governing how to write application source code so that the

applications are portable between operating systems. POSIX is the Portable Operating

System Interface, the open operating interface standard accepted world-wide. It is

produced by IEEE and recognized by ISO and ANSI.[5,6]

Here are a few POSIX compatible operating systems

A/UX

INTEGRITY

IRIX

LynxOS

Mac OS X

MINIX

OpenVMS

RTEMS

Solaris

UnixWare

Linux (most distributions — see LSB)

NetBSD

BeOS

OpenBSD

SkyOS [7]

We are using Fedora Core 7 as our operating system which is an RPM-based, general

purpose Linux distribution, developed by the community-supported Fedora Project

and sponsored by Red Hat.

Global System for Mobile Communication (GSM)

The GSM standard is employed worldwide for mobile communication which has

utilized itself in the world of communication for over 15 years. The standard of GSM

still remains as one of the most practical methods for quality communication over the

globe. The features in GSM which enable its quality of communication over the

channel involve its physical layer which corresponds to the following blocks as

shown.

Transmitter

RPE-LTP Speech Coding

Convolution Coder

Interleaving

Encryption

Modulation

Receiver

De Modulation

Decryption

De Interleaving

Viterbi Decoding

RPE-LTP Speech Decoding

GSM Speech Codec RPE-LTP

Introduction

The "Global System for Mobile communications" (GSM) is a digital mobile radio

system which is extensively used throughout Europe, and also in many other parts of

the world. The GSM full rate speech codec as the name implies corresponds to

Regular Pulse Excitation Long Term Prediction which operates at data rate of 13 kbps

and uses a Regular Pulse Excited (RPE) codec which is an example of hybrid coders.

Digitized Voice and Data Rates

The analog input speech coming from the microphone is digitized by passing it

through the ADC which samples at sampling frequency of 8K with 13 bit resolution

to achieve the ADC output data rate of 104kbps.According to GSM specifications the

input speech is split up into frames with 160 samples per frame out of 8000 samples

per second to make the frame time equal to 20 ms.

Output of RPE-LTP

The output of RPE-LTP codec is 260 bits for 160 samples i.e. 20 ms frame. That

makes the output data rate 260 bits/20 ms =13kbps.

Compression Factor

The GSM speech codec compresses the speech from 104 kbps to 13 kbps thus

achieving compression ratio of 8:1.

RPE-LTP Encoder

The RPE-LTP encoder is explained as follows.

Stages of RPE-LTP Encoder

The encoder has three major parts:

1) Linear Prediction analysis (short-term prediction)

2) Long-Term Prediction

3) Excitation analysis

1) Linear Prediction Analysis (Short Term Prediction)

The Linear Prediction Analysis includes LPC (Linear Predictive Coding). The LPC

stage involves the autocorrelation of the 160 samples to find the strength of the signal

with its time separated version. The resulting signal is taken from its end half and then

Levinson Durbin Recursion is performed on this auto correlated signal to yield the

prediction coefficients of the voice. Levinson Durbin Recursion is performed in linear

algebra for recursively calculating the solution to any equation involving Toeplitz

Matrix. The speech encoder is shown in the figure as follows.

Figure 1 Speech Encoder RPE-LTP

Mathematical Representation

Given a speech signal x (n), its linear prediction coefficients ak and order K of the

filter, we can predict the speech x^ (n) using the relation given as follows.

_______ (1)

We know that z-transform of a signal x (n) is given by:

_______ (2)

The residual error would be given as:

_______ (3)

_______ (4)

Rearranging the equation (4) we get,

_______ (5)

ZT

Where the R.H.S of equation (5) represents an Infinite Impulse Response (IIR) filter

or Autoregressive (AR) Filter

To calculate ak we use Levinson Durbin Recursion which operates on the auto

correlated segment of the speech signal.

The autocorrelation of a signal x (m) is defined by:

_______ (6)

The relationship which exists between the auto correlation sequence R (n) and

prediction coefficients is given by:

_______ (7)

In Matrix form the equation (7) can be expressed as:

_____ (8)

where the first matrix corresponds to Toeplitz Matrix.

Equation (8) can be solved to produce linear prediction coefficients ak by the use of

Levinson Durbin Recursion which utilizes the Toeplitz nature of the matrix to

recursively obtain LPC as follows.

Loop of variable i to go from 1, 2… k

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Here variable alpha corresponds to Linear Prediction Coefficients and k refers to

lattice filter coefficients .According to GSM specifications we get 8 prediction

coefficients for 160 auto correlated samples and then we also find lattice filter

coefficients using the above mentioned algorithm. The next step involves the

calculation of Log Area Ratios (LAR). The LAR’s are calculated from the lattice filter

coefficients using the formula.

LAR (i) =log ((1-k (i))/ (1+k (i))) _______ (9)

According to the GSM specifications, we get 8 LAR’s for 8 lattice filter coefficients

and they are coded in the following order. The first two LAR’s are coded with 6 bits,

the next two LAR’s with 5 bits, the next two LAR’s with 4 bits and the last two bits

with 3 bits. This gives a total of 36 bits for LAR’s.

After performing these operations, the residual or the excitation signal is obtained by

subtracting the predicted speech signal from the original speech signal thus giving 160

samples of the residual signal for the next stage. The coefficients of the linear

combination of the previous samples, plus an encoded form of the residual, the

difference between the predicted and actual sample, represent the signal.

2) Long term Prediction

The long-term predictor divides the residual signal into 4 windows each containing 40

samples and estimates pitch and gain for every 5 ms window of residual signal using

Long Term Prediction. The 160 samples are split into 4 sub-windows of 40 samples

each. The long-term predictor produces two parameters for each sub window: the lag

and the gain. The lag is determined as the peak of the cross-correlation between the

current frame and the last two frames, and the gain is the found by normalizing the

cross correlation coefficients. ………………………………………….. 2

The lag and gain parameters are applied to a long-term filter, and a prediction of the

current short-term residual signal is made. Each estimate provides a lag coefficient

and gain coefficient of 7 bits and 2 bits, respectively. Together these four estimates

require 4*(7+2) bits = 36 bits. The gain factor in the predicted speech sample ensures

that the synthesized speech has the same energy level as the original speech signal.

………… 3a

This residual signal is exposed to short term filtering and using short term filtering,

long term residual is obtained. This long term residual is filtered using weighted filter

coefficients and the filtered long term residual is sent to the next stage of RPE

(Regular Pulse Excitation).

3) Excitation Analysis

The excitation analysis involves the sections of RPE decimation, RPE Interpolation

and grid position. The 40 samples of filtered long term residual obtained are given

input to the RPE decimation section where 40 samples are converted into 4 sequences

each of 13 samples. The energy of these four sequences is computed and the sequence

with the largest energy is chosen. Its grid position i.e. its position out of the 4

sequences is coded with 2 bits, then the maximum of that 13 samples is determined

and it is coded with 6 bits and the 13 samples are additionally coded with 3 bits to

produce (2+6+13*3)=47 bits for 40 samples of the filtered long term residual. These

47 bits are produced for every cycle so after 160 samples of the residual signal have

been processed we get 47*4=188 bits. Now we have got the 76 parameters comprising

of total 260 bits for frame of 160 samples which are summarized as follows.

………………………………………………………..3b

The last step involves updating of the short term residual for its use in the loop. This

is achieved by the use of RPE Interpolation which involves interpolating the selected

residual sequence of 13 samples to a sequence of 40 samples to update the short term

residual.

Channel Coding

Introduction

Every transmitted waveform has to go through a channel or medium for its

transmission. The channel in real world scenarios is always non-ideal and imparts

various kinds of impairments to the waveform like noise, interference, fading etc

depending upon the channel characteristics. In order to make the waveform withstand

these effects Channel Coding is employed so that the transmitted symbols can be

accurately recovered at the receiver.

Block Diagram:

Channel Coding is of two main types:

1. Error Detection Coding

2. Error Correction Coding

As the name indicates Error Detection Coding has the capability to only detect if

error has occurred in the received symbol, whereas Error Correction Coding has the

power to detect and correct the errors occurred during transmission.

Channel Coding in GSM

Since GSM is for wireless communication, in which the accuracy and reliability of

data is the top most priority, the Channel Coding used is a combination of Error

Detection Coding and Error Correction Coding.

Channel CodingSpeech Coding Interleaving

Error Detection Coding

(Ref CN Andrew S Tanenbaum, 4th Ed, Pg198)

The Error Detection Coding employed is Cyclic Redundancy Check (CRC) or

polynomial codes.

Error Detection- Cyclic Redundancy Check

Cyclic Redundancy Check

In CRC, the data bit string is treated as representation of polynomials with

coefficients of 0 and 1 only. A k-bit frame is regarded as the coefficient list for a

50 bits(Class Ia)

Data FrameM(x)

CHANNEL CODER

260 bitsof

Speech Coder

456 bitsof

Channel Coder

Generator Polynomial G(x)

53 bit Output

50 bits

132 bits

ErrorCorrection

78 bits

ZeroPadding

Remainder

Modulo 2 Division

RemainderPadding

Error Detection

polynomial with k term, ranging from x0 to xk-1. Such a polynomial is said to be of

degree k-1.

The sender and receiver must agree upon a generator polynomial, G(x) in advance.

Using the Message polynomial M(x) and the generator polynomial G(x) a checksum

is calculated. The checksum is appended to the end of the frame so that the

polynomial represented by the check summed frame is divisible by G(x). When the

receiver gets the check summed frame it divides it by G(x). If there has been a

remainder there has been a transmission error.

The algorithm for computing the checksum is as follows:

1. If ‘r’ is the degree of G(x), append r zero bits to low order end of M(x) having

initially ‘m’ bits, so that it now has m + r bits and corresponds to polynomial

xrM(x).

2. Divide the m + r bit string corresponding to G(x) into the bit string

corresponding to xrM(x), using modulo 2 division.

3. Subtract the remainder from the bit string corresponding to xrM(x) using

modulo 2 subtraction. The result is the check summed frame to be transmitted

called T(x).

In short, the data polynomial M(x) is appended with zeros equal to the degree of

generator polynomial G(x), the resultant is modulo-2 divided by G(x) and the

remainder obtained from division is appended with the original data as LSBs resulting

in T(x).

It should be clear that T(x) is modulo 2 divisible by G(x). The receiver divides it by

G(x); that is it computes [T(x) + E(x)]/G(x) where E(x) is the error polynomial

incurred due to channel effects. T(x)/G(x) is 0, so the result of the computation is

simply E(x)/G(x). Those errors that happen to correspond to polynomials containing

G(x) as a factor will slip by; all others will be caught.

In GSM, the output frame of 260 bits of Speech Coding is categorized into three types

and encoded accordingly. The first 50 bits called as Class Ia, most sensitive to bit

errors are protected by a 3-bit CRC. If an error is detected the entire sample is

discarded and is replaced by a modified version of the preceding block. The generator

polynomial used in GSM Speech Traffic Channel is:

G(x) = x3+x+1

This polynomial is of degree 3, so three bits are appended to the data after remainder

calculation resulting in total of 53 bits.

Error Correction Coding

In GSM error correction is of much more significance than error detection. As data

has to be communicated in real time and without errors, so error correction coding

becomes very important for accuracy. In addition to the error detection process, error

correction is ensured by using the Error Correction coding called the Convolution

Coding.

Convolution Coding

Background

Convolution code is a very powerful type of error-correcting code used in channel

coding to counter the random errors that occur during the signal transmission. The

idea of channel coding is to improve the capacity of a channel by adding some

carefully designed redundant information to the data being transmitted through the

channel. In the process the data can be recovered with more certainty at the receiver.

Convolutional codes are applied in applications that require good performance with

low implementation cost.

Error Correction- Convolution Coder

Applications

Convolution codes are used to improve the performance of digital radio, mobile

phones, satellite links, and Bluetooth implementations. Convolutional coding and one

decoding algorithm, the Viterbi Algorithm, are currently used in about one billion cell

phones, which is probably the largest number in any application. However, the largest

current consumer of Viterbi algorithm processor cycles is probably digital video

broadcasting. A recent estimate at Qualcomm is that approximately 1015 bits per

second are now being decoded by the Viterbi algorithm in digital TV sets around the

world, every second of every day.

53 bits from CRC Convolution Coder

132 bitsClass Ib

185 bits+

4 zeros

Constraint Length K=5Rate = 1/2

Generator Polynomials:G1=1+X+X3+X4

G2=1+X3+X4

378 bit Output

Difference between Block Code & Convolution Code

The major difference of block coding and the convolutional coding is that block

coding is memory less. Given a string of data bits, a block coder outputs a unique

code block. Convolutional codes do not map individual blocks of bits into blocks of

codeword. Instead they accept a continuous stream of bits and map them into an

output stream introducing redundancies in the process. Convolutional codes have

memory that uses previous bits to encode or decode following bits. Convolutional

encoder is a finite state machine (FSM); processing information bits in a serial

manner Thus the generated code is a function of input and the states of the FSM.

[2]

Encoding Process

In the encoding process, each m-bit information symbol (each m-bit string) to be

encoded is transformed into an n-bit symbol, where m/n is the code rate (n ≥ m). The

number of the symbols or bits involved in the encoding process is called the

constraint length K (that is similar to the memory in the system). The transformation

is a function of the last L = K-1 information symbols or bits called the memory

depth.

To convolutionally encode data, start with K memory registers, each holding 1 input

bit. All memory registers start with a value of 0, unless otherwise specified. The

encoder has n modulo-2 adders, and n generator polynomials — one for each adder.

The generator polynomials dictate which of the memory register will be modulo-2

added. In other words they are the impulse responses of each coder output branch.

The generator polynomials are represented collectively as a generator matrix.

Generator polynomials specify convolutional code completely by the associated

generator matrix. Encoded convolutional code is produced by matrix multiplication of

input and the generator matrix.

It is important to mention here that we append K-1 extra zeros with the input data bits

and convolutionally encode the resulting stream. The extra zeros are added for the

purpose of flushing the memory registers in order to return its state back to 0 for all

units.

Convolution Coding in GSM

After going through some theoretical perspective of the convolution coding, we

will now discuss the Convolution Coding as it happens in GSM.

In GSM the constraint length of K=5 is used i.e. 5 memory units each capable of

storing one bit. The following generator polynomials are utilized for coding the input

data bits:

G1 = 1+X+X3+X4 = (1,1,0,1,1) and

G2 = 1+X3+X4 = (1,0,0,1,1)

Therefore, output bits are calculated (modulo 2) as follows:

n1 = m1 + m0 + m-2 + m-3 = 1+X+X3+X4

n2 = m1 + m-2 + m-3 = 1+X3+X4

The above generator polynomials result in n=2 encoded bits for each input bit. An

input bit m1 is fed into the leftmost register. Using the generator polynomials and the

existing values in the remaining registers, the encoder outputs n=2 bits. The register

moves the values to the right (m1 moves to m0, m0 moves to m-1 and so on) and waits

for the next input bit. If there are no remaining input bits, the encoder continues

output until all registers have returned to the zero state.

The 53 bits from CRC and 132 bits of Class Ib of the Speech Coder output are

combined to form 185 bits. These are padded with 4 zeros (No. of zeros = K-1 = 5-1)

which are used for flushing the memory cells and bring them to their initial state. The

output of Convolution coder is 378 bits. These bits are padded with the remaining

uncoded 78 bits classified as Class II bits to form the final 456 bit output which is fed

into the interleaver.

State Diagram

Before explaining the state diagram, the states of the memory system (i.e.

registers) require attention. Present state is the content of all the registers excluding

the first register where the input is held. Next State is the state of all the registers

excluding the last register. The arrow line moving away from a state shows the

present state and where it is entering it depicts the next state. The dotted line shows

that input is 1whereas the solid line shows that input is 0. The state diagrams are

important because they make the output and state prediction very easy.

1 X X2 X3

X3X4

X4

+

+

Input Bit

1st Output Bit

2nd

Output Bit2nd

0000

1000

11000100

0010

1010 11100110

1101 0101

1001 0001

01111111

0011

1011

Figure: Encoder State Diagram (K=5, r=1/2)Figure: Encoder State Diagram (K=5, r=1/2)Figure: Encoder State Diagram (K=5, r=1/2)

Figure: Encoder State Diagram (K=5, r=1/2)Figure: Encoder State Diagram (K=5, r=1/2)

Free distance and error distribution

A free distance (d) is a minimal Hamming distance between different encoded

sequences. A correcting capability (t) of a convolutional code is a number of errors

that can be corrected by the code. It can be calculated as:

t = (d-1) / 2

Since a convolutional code doesn't use blocks, processing instead a continuous bit

stream, the value of t applies to a quantity of errors located relatively near to each

other. That is, multiple groups of t errors can usually be fixed when they are relatively

far.

Since GSM Convolution encoder is non-systematic i.e. the input does not appear

in output so it has a free distance of d = 7. This value of d results in t = (7-1)/2 = 3.

Thus the encoder can correct any 3 channel errors.

Coding Gain

“It is the reduction, expressed in decibels, in the required Eb/No to achieve a specified

error probability of the coded system over an uncoded system with the same

modulation and channel characteristics.” The upper bound of the Coding Gain

provided by Convolution Coding with constraint length K=5 and rate=1/2 is 5.43dB.

Interleaving

Interleaving is used to cater for burst errors by shuffling the bits. In GSM the

interleaving is done in the following manner. The 456 bits by the convolution encoder

are divided into 57 bit blocks by selecting the 0th, 8th, 16th through 448th bits in the

first block, the 1st, 9th 17th through 448th bits in the 2nd block and so on to have 8

blocks.. Then the bits in the first 4 blocks are placed in the even bit positions for the

total block of 456 bits, and the bits in the second set of 4 blocks are placed in the odd

positions. These 57 bit blocks are the sent for the encryption.

Encryption

We have used Data Encryption Standard (DES) for ciphering our information. It is the

most widely used block cipher algorithm.

Data Encryption Standard (DES) Algorithm

01101101

2 10 18 26 ..

5 13 21 29 ..

4 12 20 28 ..

3 11 19 27 ..

7 15 23 31 ..

6 14 22 30 ..

0 8 16 24 ..

1 9 17 25 .. 2 10 18 26 ..

5 13 21 29 ..

4 12 20 28 ..

3 11 19 27 ..

7 15 23 31 ..

6 14 22 30 ..

0 8 16 24 ..

1 9 17 25 ..

11010011

456 Shuffled bits456 bits

It was adopted in 1977 by the National Bureau of Standards, now the National

Institute of Standards and Technology (NIST), as Federal Information Processing

Standard 46 (FIPS PUB 46). The algorithm itself is referred to as the Data Encryption

Algorithm (DEA). For DES, data are encrypted in 64-bit blocks using a 56-bit key.

The algorithm transforms 64-bit input in a series of steps into a 64-bit output. The

same steps, with the same key, are used to reverse the encryption.

DES Encryption

The overall scheme for DES encryption is illustrated in Figure. As with any

encryption scheme, there are two inputs to the encryption function: the plaintext to be

encrypted and the key. In this case, the plaintext must be 64 bits in length and the key

is 56 bits in length. Actually, the function expects a 64-bit key as input. However,

only 56 of these bits are ever used; the other 8 bits can be used as parity bits or simply

set arbitrarily.

Figure 3.4. General Depiction of DES Encryption Algorithm

Looking at the left-hand side of the figure, we can see that the processing of the

plaintext proceeds in three phases. First, the 64-bit plaintext passes through an initial

permutation (IP) that rearranges the bits to produce the permuted input. This is

followed by a phase consisting of 16 rounds of the same function, which involves

both permutation and substitution functions. The output of the last (sixteenth) round

consists of 64 bits that are a function of the input plaintext and the key. The left and

right halves of the output are swapped to produce the preoutput. Finally, the

preoutput is passed through a permutation (IP-1) that is the inverse of the initial

permutation function, to produce the 64-bit ciphertext. With the exception of the

initial and final permutations, DES has the exact structure of a Feistel cipher, as

shown in Figure 3.2.

The right-hand portion of Figure 3.4 shows the way in which the 56-bit key is used.

Initially, the key is passed through a permutation function. Then, for each of the 16

rounds, a subkey (Ki) is produced by the combination of a left circular shift and a

permutation. The permutation function is the same for each round, but a different

subkey is produced because of the repeated shifts of the key bits.

Initial Permutation

The initial permutation and its inverse are defined by tables, as shown in Tables 3.2a

and 3.2b, respectively. The tables are to be interpreted as follows. The input to a table

consists of 64 bits numbered from 1 to 64. The 64 entries in the permutation table

contain a permutation of the numbers from 1 to 64. Each entry in the permutation

table indicates the position of a numbered input bit in the output, which also consists

of 64 bits.

Table 3.2. Permutation Tables for DES

(a) Initial Permutation (IP)

58 50 42 34 26 18 10 2

60 52 44 36 28 20 12 4

62 54 46 38 30 22 14 6

64 56 48 40 32 24 16 8

57 49 41 33 25 17 9 1

59 51 43 35 27 19 11 3

61 53 45 37 29 21 13 5

63 55 47 39 31 23 15 7

(b) Inverse Initial Permutation (IP1)

40 8 48 16 56 24 64 32

39 7 47 15 55 23 63 31

38 6 46 14 54 22 62 30

37 5 45 13 53 21 61 29

36 4 44 12 52 20 60 28

35 3 43 11 51 19 59 27

34 2 42 10 50 18 58 26

33 1 41 9 49 17 57 25

(c) Expansion Permutation (E)

32 1 2 3 4 5

4 5 6 7 8 9

8 9 10 11 12 13

12 13 14 15 16 17

Details of Single Round

Figure 3.5 shows the internal structure of a single round. Again, begin by focusing on

the left-hand side of the diagram. The left and right halves of each 64-bit intermediate

value are treated as separate 32-bit quantities, labeled L (left) and R (right). As in any

classic Feistel cipher, the overall processing at each round can be summarized in the

following formulas:

Li = Ri-1

Ri = Li-1 x F(Ri-1, Ki)

Figure 3.5. Single Round of DES Algorithm

The round key Ki is 48 bits. The R input is 32 bits. This R input is first expanded to 48

bits by using a table that defines a permutation plus an expansion that involves

duplication of 16 of the R bits (Table 3.2c). The resulting 48 bits are XORed with Ki.

This 48-bit result passes through a substitution function that produces a 32-bit output,

which is permuted as defined by Table 3.2d.

The role of the S-boxes in the function F is illustrated in Figure 3.6. The substitution

consists of a set of eight S-boxes, each of which accepts 6 bits as input and produces 4

bits as output. These transformations are defined in Table 3.3, which is interpreted as

follows: The first and last bits of the input to box S i form a 2-bit binary number to

select one of four substitutions defined by the four rows in the table for S i. The middle

four bits select one of the sixteen columns. The decimal value in the cell selected by

the row and column is then converted to its 4-bit representation to produce the output.

For example, in S1 for input 011001, the row is 01 (row 1) and the column is 1100

(column 12). The value in row 1, column 12 is 9, so the output is 1001.

Figure 3.6. Calculation of F(R, K)

Table 3.3. Definition of DES S-Boxes

Each row of an S-box defines a general reversible substitution. Figure 3.1 may be

useful in understanding the mapping. The figure shows the substitution for row 0 of

box S1.

The operation of the S-boxes is worth further comment. Ignore for the moment the

contribution of the key (Ki). If you examine the expansion table, you see that the 32

bits of input are split into groups of 4 bits, and then become groups of 6 bits by taking

the outer bits from the two adjacent groups. For example, if part of the input word is...

efgh ijkl mnop ...

this becomes

... defghi hijklm lmnopq ...

The outer two bits of each group select one of four possible substitutions (one row of

an S-box). Then a 4-bit output value is substituted for the particular 4-bit input (the

middle four input bits). The 32-bit output from the eight S-boxes is then permuted, so

that on the next round the output from each S-box immediately affects as many others

as possible.

Key Generation

Returning to Figures 3.4 and 3.5, we see that a 64-bit key is used as input to the

algorithm. The bits of the key are numbered from 1 through 64; every eighth bit is

ignored, as indicated by the lack of shading in Table 3.4a. The key is first subjected to

a permutation governed by a table labeled Permuted Choice One (Table 3.4b). The

resulting 56-bit key is then treated as two 28-bit quantities, labeled C0 and D0. At each

round, Ci-1 and Di-1 are separately subjected to a circular left shift, or rotation, of 1 or 2

bits, as governed by Table 3.4d. These shifted values serve as input to the next round.

They also serve as input to Permuted Choice Two (Table 3.4c), which produces a 48-

bit output that serves as input to the function F(Ri-1, Ki).

Table 3.4. DES Key Schedule Calculation

(a) Input Key

  1   2   3   4   5   6   7   8  

  9   10   11   12   13   14   15   16  

  17   18   19   20   21   22   23   24  

  25   26   27   28   29   30   31   32  

  33   34   35   36   37   38   39   40  

  41   42   43   44   45   46   47   48  

  49   50   51   52   53   54   55   56  

  57   58   59   60   61   62   63   64  

(b) Permuted Choice One (PC-1)

    57   49   41   33   25   17   9    

    1   58   50   42   34   26   18    

    10   2   59   51   43   35   27    

    19   11   3   60   52   44   36    

    63   55   47   39   31   23   15    

    7   62   54   46   38   30   22    

    14   6   61   53   45   37   29    

    21   13   5   28   20   12   4    

(c) Permuted Choice Two (PC-2)

  14   17   11   24   1   5   3   28  

  15   6   21   10   23   19   12   4  

  26   8   16   7   27   20   13   2  

  41   52   31   37   47   55   30   40  

  51   45   33   48   44   49   39   56  

  34   53   46   42   50   36   29   32  

(d) Schedule of Left Shifts

Round

number

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Bits

rotated

1 1 2 2 2 2 2 2 1 2 2 2 2 2 2 1

GSM Physical Layer Modulation

GSM uses Gaussian Minimum Shift Keying as its modulation scheme. In digital

communication, Gaussian minimum shift keying or GMSK is a continuous-phase

frequency-shift keying modulation scheme.

CPFSK

A continuous phase frequency shift keying is Continuous-phase frequency-shift

keying (CPFSK) is a commonly-used variation of frequency-shift keying (FSK),

which is itself a special case of analog frequency modulation. FSK is a method of

modulating digital data onto a sinusoidal carrier wave, encoding the information

present in the data to variations in the carrier's instantaneous frequency between one

of two frequencies (referred to as the space frequency and mark frequency). In

general, a standard FSK signal does not have continuous phase, as the modulated

waveform switches instantaneously between two sinusoids with different frequencies.

The phase of a CPFSK is in fact continuous; this characteristic is desirable for signals

that are to be transmitted over a band limited channel, as discontinuities in a signal

introduce wideband frequency components. In addition, some classes of amplifiers

exhibit nonlinear behavior when driven with nearly-discontinuous signals; this could

have undesired effects on the shape of the transmitted signal.

If a finitely-valued digital signal to be transmitted (the message) is m(t), then the

corresponding CPFSK signal is

where Ac represents the amplitude of the CPFSK signal, fc is the base carrier

frequency, and Df is a parameter that controls the frequency deviation of the

modulated signal. The integral located inside the cosine is what gives the CPFSK

signal its continuous phase; an integral over any finitely-valued function (which m(t)

is assumed to be) will not contain any discontinuities. If the message signal is

assumed to be causal, then the limits on the integral change to a lower bound of zero

and a higher bound of t..

Note that this does not mean that m(t) must be continuous; in fact, most ideal digital

data waveforms contain discontinuities. However, even a discontinuous message

signal will generate a proper CPFSK signal.

GMSK derived from MSK

GMSK is a form of MSK which is Minimum Shift Keying. It is called Minimum Shift

Keying. First we would explain MSK so that GMSK can be understood in a better

fashion.

MSK uses changes in phase to represent 0's and 1's, but unlike most other keying

schemes we have seen in class, the pulse sent to represent a 0 or a 1, not only depends

on what information is being sent, but what was previously sent..

The pulse used in MSK is the following

where

If a ‘1’ was sent and

If a ‘0’ was sent

We can understand this case with the help of an example of data bits say 111010000

If it assumed that h = 1/2, then the figure simplifies. The phase can now go up or

down by increments of pi/2, and the values at which the phase can be (at integer

intervals of Tb) are {-pi/2, 0, pi/2, pi}. Ther above figure takes the following form.

The figure illustrates one feature of MSK that may not be obvious, when a large

number of the same symbol is transmitted, the phase does not go to infinity, but

rotates around 0 phase.

Signal Constellation of MSK

Taking the equation for the pulse and using the trigonometric identity for a sum in a

cosine we get.

The above function can be simplified in the following manner.

where

and

and

These equations only depend on theta(0) and theta(tb) so the 4 different possibilities

we have are

Now the signal constellation can be drawn.

MSK as a form of FSK

Even though the derivation of MSK was produced by analyzing the changes in phase,

MSK is actually a form of frequency-shift-keying (FSK) with

where f1 and f2 are the frequencies used for the pulses. MSK produces an FSK with

the minimum difference between the frequencies of the two FSK signals such that the

signals do not interfere with each other.

Advantages of MSK

MSK produces a power spectrum density that falls off much faster compared to the

spectrum of QPSK. While QPSK falls off at the inverse square of the frequency, MSK

falls off at the inverse fourth power of the frequency. Thus MSK can operate in a

smaller bandwidth as compared to QPSK.

Gaussian Minimum Shift Keying

GSM specific GMSK is similar to standard minimum-shift keying (MSK), however

the digital data stream is first shaped with a Gaussian filter before being applied to a

frequency modulator. This has the advantage of reducing sideband power, which in

turn reduces out-of-band interference between signal carriers in adjacent frequency

channels. However, the Gaussian filter increases the modulation memory in the

system and causes intersymbol interference, making it more difficult to discriminate

between different transmitted data values and requiring more complex channel

equalization algorithms such as an adaptive equalizer at the receiver.

GMSK Modulation

In GMSK modulation the incoming sequence of bits is converted to NRZ sequence

with 4 samples per symbol corresponding to four 1’s for bit ‘1’ and four -1’s for ‘0’ .

Then this NRZ sequence is filtered with a Guassian filter which provides spectral

efficiency. This Gaussian Filter is mathematically described as.

alpha=(log10(2)).^(1/2)/((2).^(1/2)*B);

h=sqrt(pi)/alpha.*exp(-pi^2.*t^2./alpha^2); %impulse response

where B is the 3 dB bandwidth of the Gaussian Filter. h is the impulse response of

the Gaussian Filter which is described as follows.

Gaussian Filter Time Domain Response

The filtered NRZ sequence is integrated to produce the phase information that is the

inherent characteristic of a FM modulation. The phase is scaled for pi/2 change for

every bit. The sine and cosine of this phase are taken to produce I and Q channel

information. The GMSK complex signal consists of I as the real part and Q as the

imaginary part.

Figure In phase, Quadrature phase and GMSK signal

Spectral Efficiency and Inter Symbol Interference

In GSM we use 3 dB Bandwidth and Symbol Time Period T product of 0.3 as it is a

tradeoff between better spectral efficiency and Inter symbol interference. The more

the BT product, less will be the spectral efficiency and less ISI. We take 0.3 as

standard in GSM.

GMSK Demodulation

In GMSK Demodulation we have adopted non coherent detection. We have employed

one bit differential detector which delays the incoming sequence of GMSK complex

signal by one bit that is 4 to 5 samples delay. The resulting complex signal is

multiplied with the original GMSK signal to produce the phase information that is

stored in the imaginary part of the complex signal. The imaginary part is given to the

symbol timing recovery which efficiently decides the symbols that were sent from the

transmitter side.

Figure Real and Imaginary part of Multiplied GMSK Signal

and One Bit Delayed GMSK Signal

Synchronization

Synchronization plays the most crucial role in correct data reception at the receiver.

No matter how strong the channel coding is employed, how efficient the modulation

technique is used, if the transmitter and receiver is not synchronized with each other

the entire communication ceases.

GSM actually uses Equalization in which a block of 26 bits is incorporated between

two 57 data bit blocks.

In our model of GSM we have used synchronization for detecting the timing phase

errors. Since we have used non-coherent detection for demodulation so we did not

face the issue of carrier frequency synchronization in our implementation.

The synchronization we used in our GSM model was Symbol Timing Recovery

proposed by Floyd M. Gardener in his paper. In order to get a clear picture we studied

the paper presented by Muhammad Azam, Ezaz Akram, Dr. Jamil Ahmed and Dr.

Ismail Shah who implemented the Gardener algorithm.

Symbol Timing Recovery

The Symbol Timing Recovery is used to approximate the best instant at which if the

symbol is sampled will result in a correct decision regarding the symbol. The symbol

in case of GMSK is defined as bit 1 or bit 0. We have represented one symbol by 4

samples at transmitter end i.e. for every one bit there were corresponding four

samples transmitted. These samples become helpful in providing the symbol timing

from which we can make correct symbol decisions.

Symbol Timing is required because the clocks of any two devices are running at

different speeds. Though roughly they can be at the same frequency but in reality

there is always some minute difference in the phase of the clock signals they generate.

The difference between the clock frequencies of the two devices is called as

Sampling Frequency Error and the difference between the clock signals between

them is called as Sampling Phase Error. These two factors contribute in the

incorrect sampling of the received analog signal. Thus symbol timing becomes a great

concern.

One solution to this problem is to transmit a special sequence after every frame or a

number of frames which can tell the receiver that this is the starting point of new

frame. This technique though is efficient but it consumes bandwidth because

additional data has to be transmitted along with the original data.

Second method is the non-data aided technique in which an all digital timing recovery

loop is used. The main advantage of this loop is that the sampling is allowed to be

unsynchronized and timing adjustment is done after the unsynchronized sampling.

The sampling rate at A/D is kept at two times or more of the maximum frequency

component in the incoming signal. The block diagram of this loop is shown below:

Clock 2Sampling Phase Error

Clock 1

Interpolator

The purpose of the interpolator is to compute the intermediate best sample which

would have occurred if the signal was continuous. This interpolated value is then used

to make the decision for detection. The interpolator filter we have employed is the

first order linear filter. This linear filter serves the purpose well and is

computationally efficient. The equation of linear filter is:

Interpolated_output[k] = (1-mu)*sampled_GMSK [m] + mu*sampled_GMSK [m+1]

Where m is the basepoint index for the kth symbol and mu is the fractional delay.

These are the inputs to the interpolator by which the interpolated value is calculated.

The diagram below will show a clear idea of these two parameters:mu

Integrator Loop Filter

y(kMTi)

M

m(k)

mu(k)

Gardener

TED

x(kTi)

x(kMTi)

v(kTi)Interpolator

r(mTs)Sampling

r(t)

Sampled symbol

mWe earlier transmitted four samples per symbol. The base point index m

represents one of the received samples which serves as the integer part of the

interpolated sample. The fractional index mu is the fractional part in the interpolation

process. With the help of these two parameters and the corresponding inputs we

interpolate the best value by using the above equation.

Gardener Timing Error Detector

It is the most important part in the timing recovery process. It estimates the fractional

delay (fractional index) that must be adjusted to get the samples at the maximum

opening of eye diagram. The timing error detector we have used was originally

proposed by Floyd Gardener. It is also known as zero crossing detector and follows

the principle of Maximum Likelihood estimation. At minimum it requires only two

samples per symbol for error estimation. It locates the mid point between interpolated

samples and uses it to find the timing difference. The Gardener equation is given

below:

e(n)=y(n-1/2)*[ y(n)-y(n-1)]

Where e(n) represents the error signal, y(n) is the present interpolated sample and y(n-

1) is the previous interpolated sample. y(n-1/2) is the interpolated sample between the

two interpolations. If the value of y(n-1/2) is zero this means that timing is correct.

Negative value of y(n-1/2) indicates late timing while positive value indicates early

timing. The error thus calculated helps in locating the exact interpolation point in the

next sample.

Correct TimingCorrect Timing Late TimingLate Timing Early TimingEarly Timing

m+1

Decimator

Gardener timing error detector requires any even number of samples per symbol but

its output only needs to be processed at symbol rate. Decimator produces the output at

the symbol rate after discarding the extra samples. For our case the number of

incoming samples was 4, we discarded the extra 3 samples per symbol.

Loop Filter

The loop filter is used to track frequency and phase error steps in the input signal. It is

designed from the classical theory of phase locked loops. The Gardener TED output

signal is fed to the loop filter. Zero order loop filter is required to track the phase steps

which only contains a scaling constant Kp (proportional constant) in its transfer

function. In order to track the frequency steps 1st order loop filter is required. In

parallel with the proportional path the filter contains an integrating path to convert

frequency steps into phase steps. This helps in rectifying the sampling frequency

errors. The block diagram of the loop filter is shown below:

Ki

Kp

+

+

z-1

x(n)y(n)

The proportional path is used for correcting the sampling phase errors and the integral

path is used for correcting the sampling frequency clock errors. The values of Kp and

Ki are found using the following expressions:

Kp = (4*BTs)/(1+1/(4*zeta2))

Ki = [ (2*BTs)/(zeta+1/(4*zeta)) ]2

Where zeta is the damping ratio and its value is taken as 0.707 for making the system

under damped.

B=Single Sided Loop Bandwidth

Ts=Sampling Interval

BTs=Normalized Loop Bandwidth, typical values between 10-4 and 10-1. The output

of loop filter is given by the following equation:

LFop[k] = Kp * Gardener_output[k] + (Ki-Kp)*Gardener_output [k-1] + LFop[k-1]

Integrator

It provides the interpolator with the required estimates of the fractional delay mu and

basepoint index m. Basepoint index is the required information fed to the interpolator

to adjust the position of its symbol window over the input signal. The integrator

(NCO) is updated according to the following equations:

NCO_op[k] =NCO_op[k-1] + LFop[k]

m[k+1] =m[k] + int ( NCO_op[k]+ mu[k] )

mu[k+1] =m[k] -(mu[k]+ NCO_op[k])

m is the integer part of the calculations and mu is the decimal part. These updated

values are used by interpolator to calculate the intermediate samples.

Eye Diagrams

Without Symbol Timing Recovery With Symbol Timing Recovery

DES Decryption

As with any Feistel cipher, decryption uses the same algorithm as encryption, except

that the application of the subkeys is reversed.

De Interleaving

De-interleaving consists in performing the reverse operation. The major drawback of

interleaving is the corresponding delay: transmission time from the first burst to the

last one in a block is equal to 8 TDMA frames (i.e. about 37 ms).

In the de interleaving section we apply the reverse procedure. The rows are arranged

in the order so that the original order is restored. Then the bits are read column wise

so the original order of the 456 bits is restored and the data is correspondingly fed to

the Viterbi decoder for further processing.

Viterbi Decoding

01101101

2 10 18 26 ..

5 13 21 29 ..

4 12 20 28 ..

3 11 19 27 ..

7 15 23 31 ..

6 14 22 30 ..

0 8 16 24 ..

1 9 17 25 ..2 10 18 26 ..

5 13 21 29 ..

4 12 20 28 ..

3 11 19 27 ..

7 15 23 31 ..

6 14 22 30 ..

0 8 16 24 ..

1 9 17 25 ..

11010011

456 bits

456 Shuffled bits

The waveform is channel coded at transmitter in order to withstand the effects of

channel and hold the digital information accurately. In order to retrieve this data back

with out errors the decoding process is done at the receiver so that pure data stream

can be obtained back. This process is called Channel Decoding. In GSM, like channel

coding both Error Detection and Error Correction Decoding is performed but this

time, the Error Correction takes precedence.

Error Correction Decoding

The error correction decoding employs the Maximum Likelihood Estimation method

for recovering back the original data stream. Maximum likelihood decoding means

finding the sequence of code branch in the code trellis that was most likely

transmitted. Therefore maximum likelihood decoding is based on calculating the

hamming distances for each branch forming encode word. Thus in order to understand

the decoding process, it becomes fundamental to understand the trellis diagram.

Trellis diagram

A convolutional encoder is a finite state machine. An encoder with n binary cells

will have 2n states. These states keep on changing with the advent of new bits. The

states are important because they play a key role in decoding the bit stream. These

states alter themselves like the formation of a tree. As a result of which they form a

tree-like diagram called “Trellis”.

We explain the trellis as it is formed in Convolution Coding in GSM. We assume

that the initial state of the memory register is all zeros. Then if a 0 comes as the input

the state will be retained the same with output 00, however, if input is 1 then the state

will change into 1000 with output 11. Next we have 2 states to cater. First will be the

state 0000, it will give the state transactions and outputs as discussed. Second state is

1000. If a 0 is input at this stage then the new state will be 0100 with output as 10, if

the input is 1 the next state will be 1100 with output 00. This process continues at the

next stage and the tree formed in this way keeps on growing.

Maximum Likelihood and Viterbi Decoding

Now we will look how trellis helps in decoding the incoming data stream. We shall

explain through the trellis formed in our particular case. From encoding process we

know that there were 2 output bits generated for each 1 bit. This implies that 2 input

bits at decoder should be treated together for estimating that 1 input bit. The decoding

process happens exactly on these grounds. The input to decoder is the coded stream,

which are operated 2 bits at a time. Suppose at decoder the initial state is 0000. The

decoder receives 11 as input. It compares the received input with the two possible

outputs which could be produced at this state. First possible output is 00 and the other

is 11. The decoder measures the Hamming distance between the input bits and the

possible output bits. The Hamming distance is computed by Xoring the Input with the

possible output and then measuring the number of ones in the result. Hamming

distance in case of 00 as possible output is 2 and that in case of 11 is 0 with the input

as 11. Now the decoder saves this Hamming distance in memory and then moves onto

the next state. Now it has 2 states to check; one is 0000 and the next is 1000. Suppose

the new input bits are 10. Again the same procedure is repeated for the 4 possible

outputs that can occur at the two states. The new Hamming distance calculated is

added up to the previous Hamming distance. This process continues until all the data

bits are passed through the decoder. The decoder then searches for the path with the

minimum Hamming distance in the trellis and the input bits that correspond to that

minimum distance path is taken as the decoded sequence.

In Maximum Likelihood, this process is end to end, i.e. the decoder checks all the

paths from the first input bits till the last bits. In Viterbi algorithm Maximum

Likelihood decoding is performed by reducing its complexity. Viterbi algorithm

eliminates the least likely trellis paths at each transmission stage. It reduces decoding

complexity with early rejection of unlike paths. Viterbi algorithm gets its efficiency

via concentrating on

suvival paths of the trellis. The Viterbi decoding algorithm uses the trellis diagram to

perform the decoding.

The basic cycle repeated by the algorithm at each stage into the trellis is

1. Add: At each cycle of decoding, the branch metrics enumerating from the nodes

(states) of the previous stage are computed. These branch metrics are added to the

previously accumulated and saved path metrics.

2. Compare: The path metrics leading to each of the encoder’s states are compared.

3. Select: The highest-likelihood path (survivor) leading to each of the encoder’s

states is selected, and the lower-likelihood paths are discarded.

A metric is a measure of the “distance” between what is received and all of the

possible channel symbols that could have been received. The metrics for the soft

decision and the basic Viterbi decoding techniques are computed using different

methods. For basic Viterbi decoding, the metric used is the Hamming distance, which

specifies the number of bits by which two symbols differ. For the soft decision

technique, the metric used is the Euclidean distance between the signal points in a

signal.

The trellis diagram for K=5 used in GSM is shown on the next page.

Error Detection Decoding

The first 53 bits of Viterbi decoded sequence are fed into Error Detection block. In

this stage the 53 data bits T(x) are divided by the Generator polynomial G(x) =

x3+x+1 that is [T(x) + E(x)]/G(x) is computed where E(x) is the error polynomial

incurred due to channel effects. T(x)/G(x) is 0, so the result of the computation is

simply E(x)/G(x).

If the result of this modulo 2 division is not zero then an error is detected.

Those errors that happen to correspond to polynomials containing G(x) as a factor

will slip by; all others will be caught.

RPE-LTP Decoder

The RPE LTP decoder works in the sense that the incoming 260 bits are separated on

the basis of the 76 parameters. The bits are decoded back to the parameters and the

speech is synthesized using the decoder scheme as shown below.

Figure 2 RPE LTP Decoder …………..4

Using the scheme shown above, we proceed by decoding the bits and obtaining the

speech parameters. Then we obtain the long term residual from the quantized residual

sequences and then estimate the short term residual from the long term residual.

Finally the speech is synthesized from the filtering of the short term residual with the

recovered prediction coefficients. The recovered speech is processed to improve its

quality and then it is passed to the D/A converter to be played back via speaker.

Implementation of the OSSIE: GSM Waveform

In this chapter the implementation of GSM waveform on OSSIE is described.

Introduction

After simulating the GSM transceiver on matlab, we were in a position to implement

the waveform on principles of SCA. So first of all we studied and understood

Software Communication Architecture through different articles and research papers

available on net.

Open Source SCA Implementatio::Embedded

For the purpose of implementing the GSM waveform on SCA, we searched for such

environment which could integrate CORBA, IDL, XML and UML together. We

found OSSIE (Open Source SCA Implementatio::Embedded) which is an open source

Software Defined Radio (SDR) development effort based at Virginia Tech. OSSIE is

primarily intended to enable research and education in SDR and wireless

communications. The software package includes an SDR core framework based on

the JTRS Software Communications Architecture, tools for rapid development of

SDR components and waveforms applications. The current version of OSSIE (0.6.2)

is based on version 2.2.1 of the SCA specification.

The next step was to get familiar with OSSIE. OSSIE is a complex software with a lot

of source files and it is extremely difficult to handle and comprehend the whole

source code of it. Its user guide and few labs give you an introduction to waveform

development, component connection and application installation provided by OSSIE

by default.

There is no help for custom component development so it took us few weeks to debug

the default components and able o make our own components.

A detailed presentation of OSSIE can be found in Jacob A. DePriest’s thesis entitled

“A Practical Approach to Rapid Prototyping of SCA Waveforms” at Virginia Tech

[8].

This thesis is written with assumption that reader has certain prior knowledge about

C++ programming. Here are two important C++ files generated for eah new

component; <component name>.h, <component name>.cpp. These are where the

functionalities are defined for the components.

Strategy of implementing waveform

The strategy of implementing waveform in OSSIE is explained in this secion. The

main steps are

a) Component Development

b) Node Development

c) Waveform Development

d) Connecting Components

e) Generating Waveform

Component Development

To develop a component the developer must know the functionality of the component

and its input and output. This will enable him to determine its uses and provides port,

the type of interfaces for the input and output.

OSSIE Component Developer

The figure shows the OSSIE component editor. Here you can

a) Declare the name of component

b) Describe its functionality

c) Define its uses and provides port

d) Define component properties

e) Deployment settings

Port Assignment

The figure shows the port developer. Here you must specify the

a) Port name

b) The interface it inherits

c) The type of port (uses or provides)

After providing this information in the component editor you can generate the

component which generates the associated header and .cpp files.

The next step in component development is to define the functionality of the

component in the generated files. This is the main step in component development.

Once the component implementation is provided the last step is to compile and make

this component. This step generates the binaries and xml profiles for the component.

Once the component development is finished, this component can be used in any

waveform even for multiple times.

Components

Transmitter

1. speechcoder_GSM

2. convolutioncoder_GSM

3. interleaver_GSM

4. enrypt_GSM

5. modulation_GSM

Receiver

1. demodulation_GSM

2. decipher_GSM

3. deinterleaver_GSM

4. viterbidecoder_GSM

5. speechdecoder_GSM

6. GSM_test_receiver

Node Development

Node means a collection of devices. The device can be a GPP, DSP, USRP, FPGA

etc. In our case we are using the processor of the PC to run the waveform. Every

component must be deployed on a device of the node.

Waveform Development

First of all u divide your waveform into components. These components are

individually developed and registered into the OWD. When all the components have

been developed, waveform development is carried out.

The

figure shows the OSSIE waveform developer. The developd components and the

default components are listed in the left hand panel from where the components are

added in the waveform.the main steps are

1. name the waveform

2. develop the nodes

3. add the required components

4. set the assembly controller

5. connect the components

When the waveform is complete it is then generated. The generated waveform is then

compiled to generate XML profiles for the waveform. All you have to do is to load

the waveform onto your device and run. The steps to run the waveform is given in

OSSIE’s user guide.

Results

Output of GSM Transmitter

Output of Receiver

INPUT SAMPLES

{0.0,0.0,0.0001,0.0002,-0.0005,0.0008,-0.0013,0.0020,-0.0032,0.0051,-0.0085,

0.2109,0.3538,0.5551,0.7486,0.9836,0.9837,0.6619,0.3567,0.6763,0.5267,-0.1016,-0.2907,-

0.0623,0.4734,0.6047,0.5845,0.7224,0.7421,0.7660,0.7112,0.6597,0.5804,

0.2815,0.0574,0.3686,0.6001,0.1246,0.0390,0.1517,0.4890,0.2700,0.1086,0.1205,0.2301,0.4895,0.561

9,0.7420,0.9990,0.9967,0.9985,0.9999,0.9843,0.9999,0.8190,0.2994,0.5211,0.8611,0.2154,0.2734,0.67

72,0.5230,0.8183,0.9721,0.9999,0.4040,0.2139,0.5266,0.5467,0.2103,0.0153,0.0357,0.3807,0.6439,0.6

446,0.6494,0.7378,0.9143,0.8513,0.6048,0.5660,0.3560,0.0209,0.3198,0.6508,0.2555,0.0164,0.4418,0.

7404,0.5937,0.3002,0.4607,0.4169,0.4464,0.4468,0.4429,0.6620,0.9501,0.9999,0.9845,0.9999,0.9717,

0.9999,0.5594,0.3477,0.5418,0.4845,0.0789,0.3130,0.3865,0.4528,0.9999,0.9717,

0.9949,0.3908,0.5019,0.7090,0.4178,-0.0840,-0.2050,0.1068,0.3683,0.6308,0.6954,

0.8308,0.8020,0.6241,0.5684,0.4762,0.3248,0.1923,0.0215,0.3762,0.3617,0.0253,0.3321,0.6989,0.501

7,0.2098,0.1705,0.5382,0.4262,0.6884,0.4939,0.8208,0.9997,0.9999,0.9880,0.9999,0.8690,0.2495,0.29

45,0.7194,0.7893,-0.2933,0.1242,0.7300,0.8754,

0.7885,0.9504}

@@@@@ OUTPUT OF SPEECH CODER @@@@@

01110100000111001000010001100110110111111011110100110110111111111110001111111100100

11000000011111101001110111111100000101010110111101001111110001101111010101001010111

01101100011111010110101101110011000101111111010101011111110001101101101111011011100

11101100101

@@@@@ OUTPUT OF CONVOLUTION CODER @@@@@

00110101011110111111001101010100110100111111100011000110111110100001010001101001011

01101101010111011001010000101000110100101010101010110000000010110010101011000110100

00101011001100000011010110010110111011001001011101101001010110000011001110110100010

01001000110101011101100100110010110000000011000011010101110000100011100011101001010

01110101000101110000010110011011100010010010000110101101110011000101111111010101011

11111000110110110111101101110011101100101

@@@@@ OUTPUT OF INTERLEAVER @@@@@

11100011010111111000110010000001101001111011100011010000000000010111000100001011000

01100001101001001100000011100111111011101101101011101001111110010011100111101001100

01100000111100111111100100101010111011110000000001000011111111101111110011000101001

10100110101101000011100111000010000110001011100101100011011110110010000001110011100

00001010011010001101110110101111110111011000001110011001010100100010101000111101111

01110111101101000110100000100011011000011000000000000000000000000000000000000000000

00000000000000

@@@@@ MODULATION @@@@@

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0.3112710.8917610.4525070.8105890.5856160.7097140.704490.5915880.8062410.4590820.8883940.

3154180.9489530.1647670.9863330.01618650.999869-0.1045070.994524-0.1528920.988243-

0.1038210.9945960.01756630.9998460.1668080.9859890.3180360.9480790.4615320.8871230.59381

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0.9889960.1479440.9804670.1966840.9493770.314140.8917610.4525070.8105890.5856160.71020.70

40.5975540.8018290.49650.8680370.4535690.8912210.49650.8680370.59270.8054240.6810910.7321

990.7159950.6981060.6810910.7321990.59270.8054240.49650.8680370.4535690.8912210.49650.868

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0.435390.900242-0.4787830.877933-0.5762340.817285-0.6660930.745869-0.7016810.712491-

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0.184070.982913-

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0.314140.891761-0.4525070.810589-0.5856160.709714-0.704490.591588-0.8062410.459082-

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0.883690.468073-0.9457040.32503-0.984730.174087-0.9998210.0189126-0.990704-0.136038-

0.959438-0.281921-0.918439-0.395563-0.898051-0.439891-0.918439-0.395563-0.957717-0.287711-

0.984378-0.176068-0.991794-0.127844-0.984256-0.176748-0.955556-0.29481-0.90076-0.434318-

0.822305-0.569047-0.724339-0.689444-0.613702-0.789538-0.514012-0.857783-0.47156-0.881834-

0.514604-0.857428-0.614791-0.78869-0.725765-0.687943-0.823873-0.566775-0.901955-0.43183-

0.958113-0.286389-0.990983-0.133987-0.9997650.0216721-0.9842460.176804-0.9448030.327639-

0.8823950.47051-0.7985380.601944-0.6952720.718747-0.5751050.818079-0.440960.897527-

0.2960960.955158-

0.1447180.9894730.004106530.9999920.1246670.9921990.1729150.9849370.1239820.9922840.0027

26530.999996-0.1467660.989171-0.2987310.954337-0.4434350.896306-0.5773610.816489-

0.6972530.716825-0.8001960.599738-0.8833670.468682-0.9432660.332039-0.9764230.215866-

0.985790.167982-0.9762740.21654-0.9428070.33334-0.8823950.47051-0.7985380.601944-

0.6957670.718267-0.581160.813789-0.4787830.877933-0.435390.900242-0.4793880.877603-

0.5822820.812987-0.6972530.716825-0.8001960.599738-0.8833670.468682-0.9432660.332039-

0.9764230.215866-0.985790.167982-0.9762740.21654-0.9428070.33334-0.8823950.47051-

0.7985380.601944-0.6957670.718267-0.581160.813789-0.4787830.877933-0.435390.900242-

0.4787830.877933-0.5762340.817285-0.6660930.745869-0.7016810.712491-0.6660930.745869-

0.5762340.817285-0.4787830.877933-0.435390.900242-0.4787830.877933-0.5762340.817285-

0.6660930.745869-0.7016810.712491-0.6660930.745869-0.5762340.817285-0.4787830.877933-

0.435390.900242-0.4787830.877933-0.5762340.817285-0.6660930.745869-0.7016810.712491-

0.6655780.746328-0.5701530.821538-0.440960.897527-0.2960960.955158-

0.1447180.9894730.004106530.9999920.1246670.9921990.1729150.9849370.1246670.9921990.0101

4670.999949-0.1045070.994524-0.1528920.988243-

0.1038210.9945960.01756630.9998460.1668080.9859890.3180360.9480790.4615320.8871230.59381

10.8046050.7116550.7025290.8122020.5833770.8926960.450660.9498090.3128290.9806020.196007

0.9889960.1479440.9806020.1960070.9516820.3070860.9102230.4141190.888940.4580240.9102230.

4141190.9516820.3070860.9806020.1960070.9889960.1479440.9806020.1960070.9516820.3070860.

9102230.4141190.888940.4580240.9102230.4141190.9516820.3070860.9806020.1960070.9889960.1

479440.9806020.1960070.9516820.3070860.9102230.4141190.888940.4580240.9105080.4134910.95

39340.3000160.988060.1540690.999999-0.001380010.987631-0.1567950.951257-0.3083990.891761-

0.4525070.810589-0.5856160.7102-0.7040.597554-0.8018290.4965-0.8680370.453569-

0.8912210.497098-0.8676940.59866-0.8010030.711655-0.7025290.812202-0.5833770.893006-

0.4500440.952105-0.3057730.98806-

0.1540690.9999990.001380010.9876310.1567950.9512570.3083990.8917610.4525070.8105890.5856

160.71020.7040.5975540.8018290.49650.8680370.4535690.8912210.49650.8680370.59270.8054240.

6810910.7321990.7159950.6981060.6805860.7326680.5867070.8097990.4590820.8883940.3154180.

9489530.1640860.9864460.008766770.999962-0.1467660.989171-0.2987310.954337-

0.4434350.896306-0.5773610.816489-0.6972530.716825-0.8001960.599738-0.8833670.468682-

0.9432660.332039-0.9764230.215866-0.985790.167982-0.9764230.215866-0.9452540.326335-

0.9016320.432505-0.8794620.475968-0.901930.431882-0.947650.319312-0.984730.174087-

0.9998210.0189126-0.99061-0.136722-0.957319-0.289033-0.90076-0.434318-0.822305-0.569047-

0.724339-0.689444-0.613702-0.789538-0.514012-0.857783-0.47156-0.881834-0.514012-0.857783-

0.608922-0.79323-0.695809-0.718227-0.730013-0.683433-0.695313-0.718707-0.603019-0.797727-

0.477015-0.878895-0.334609-0.942357-0.18407-0.982913-0.0290566-0.9995780.126663-

0.9919460.279304-0.9602030.425156-0.905120.560674-0.8280370.682563-0.7308270.787862-

0.6158520.873674-0.4865120.936334-0.3511110.971842-0.2356350.982178-0.1879520.971842-

0.2356350.938437-0.3454490.89267-0.4507120.869623-0.4937170.89298-0.4500960.940975-

0.3384760.980995-0.1940340.999231-

0.03919750.993260.1159060.9649610.2623940.9262760.3768450.9067930.4215770.9262760.376845

0.9633580.2682180.9877480.1560570.9941840.1076920.9877480.1560570.9633580.2682180.926276

0.3768450.9067930.4215770.9265360.3762050.9653220.2610620.9934980.113850.999119-

0.04195530.980456-0.1967410.93796-0.3467440.872665-0.4883190.786159-0.6180240.681049-

0.7322380.564526-0.8254150.460869-0.8874680.417033-0.9088920.461481-0.887150.565665-

0.8246350.682563-0.7308270.787862-0.6158520.873674-0.4865120.936334-0.3511110.971842-

0.2356350.982178-0.1879520.971842-0.2356350.938437-0.3454490.89267-0.4507120.869623-

0.4937170.89267-0.4507120.938437-0.3454490.971842-0.2356350.982178-0.1879520.971679-

0.2363060.935848-0.3524030.872665-0.4883190.786159-0.6180240.680543-0.7327080.558386-

0.8295810.422656-0.906290.276653-0.960970.123925-0.992292-0.0318153-0.999494-0.186782-

0.982401-0.337209-0.94143-0.479439-0.877575-0.610016-0.792389-0.725765-0.687943-0.823873-

0.566775-0.901657-0.432453-0.955962-0.293491-0.984378-0.176068-0.991794-0.127844-0.984378-

0.176068-0.957717-0.287711-0.918439-0.395563-0.898051-0.439891-0.918711-0.39493-0.959826-

0.280597-0.990983-0.133987-0.9997650.0216721-0.9842460.176804-0.9448030.327639-

0.8823950.47051-0.7985380.601944-0.6957670.718267-0.581160.813789-0.4787830.877933-

0.435390.900242-0.4793880.877603-0.5822820.812987-0.6972530.716825-0.8001960.599738-

0.8833670.468682-0.9432660.332039-0.9764230.215866-0.985790.167982-0.9764230.215866-

0.9452540.326335-0.9016320.432505-0.8794620.475968-0.901930.431882-0.947650.319312-

0.984730.174087-0.9998210.0189126-0.990704-0.136038-0.959438-0.281921-0.918439-0.395563-

0.898051-0.439891-0.918711-0.39493-0.959826-0.280597-0.990983-0.133987-0.9997650.0216721-

0.9842460.176804-0.9448030.327639-0.8823950.47051-0.7985380.601944-0.6952720.718747-

0.5751050.818079-0.440960.897527-0.2960960.955158-

0.1447180.9894730.004106530.9999920.1246670.9921990.1729150.9849370.1239820.9922840.0027

26530.999996-0.1467660.989171-0.2987310.954337-0.4428170.896612-0.5712870.820751-

0.6660930.745869-0.7016810.712491-0.6655780.746328-0.5701530.821538-0.440960.897527-

0.2960960.955158-

0.1440350.9895730.01152660.9999340.1668080.9859890.3180360.9480790.4615320.8871230.59381

10.8046050.7116550.7025290.8122020.5833770.8930060.4500440.9521050.3057730.988060.154069

0.999999-0.001380010.987631-0.1567950.951257-0.3083990.891761-0.4525070.810589-

0.5856160.709714-0.704490.591588-0.8062410.459082-0.8883940.315418-0.9489530.164086-

0.9864460.00876677-0.999962-0.146766-0.989171-0.298731-0.954337-0.443435-0.896306-0.577361-

0.816489-0.697253-0.716825-0.800196-0.599738-0.88369-0.468073-0.945704-0.32503-0.98473-

0.174087-0.999821-0.0189126-0.990610.136722-0.9573190.289033-0.900760.434318-

0.8223050.569047-0.7238630.689943-0.6078260.79407-0.4770150.878895-0.3346090.942357-

0.184070.982913-

0.02905660.9995780.1266630.9919460.2793040.9602030.4251560.905120.5606740.8280370.682563

0.7308270.7878620.6158520.874010.4859090.9389130.3441540.9809950.1940340.9992310.0391975

0.99318-0.1165920.962987-0.2695470.909387-0.415950.833683-0.5522430.737715-

0.6751120.623815-0.7815720.494752-0.8690340.353663-0.9353730.203978-0.9789760.0493344-

0.998782-0.106508-0.994312-0.259762-0.965673-0.406701-0.913561-0.543755-0.839244-0.667592-

0.744527-0.775202-0.631713-0.863969-0.503544-0.931736-0.363136-0.976855-0.213901-0.99823-

0.0594662-0.9953410.0964136-0.9682590.24995-0.9176410.397411-0.8447180.535212-

0.7512630.660003-0.6395460.768753-0.5122850.858816-0.3725710.928004-0.2238010.974635-

0.06959190.9975760.08630920.9962680.2401120.9707450.3880790.9216260.5266130.8501050.6523

470.7579210.7622240.6473140.8535730.5209730.9241750.3819680.9723140.2336790.9968180.0797

1050.997093-0.07619590.973131-0.230250.925516-0.3787080.855405-0.517960.764501-

0.6446230.655014-0.7556160.529607-0.8482430.391326-0.9202520.243533-0.9698930.0898208-

0.995958-0.0660748-0.997815-0.220364-0.975418-0.369297-0.929311-0.509254-0.860616-0.636832-

0.771002-0.748931-0.662648-0.842826-0.538186-0.916234-0.400643-0.967372-0.253362-0.994995-

0.0999219-0.9984340.0559468-0.9776030.210456-0.9330110.359849-0.8657390.500495-

0.7774240.628976-0.6702130.742169-0.5467110.837322-0.4099190.912122-0.2631640.964751-

0.1100130.993930.04581310.998950.2005250.9796890.3503630.9366140.4916850.8707730.6210560.

7837660.735330.6777090.8317310.5551780.9079150.4191530.9620310.272940.9927630.1200920.99

9363-0.03567470.981673-0.1905740.940121-0.3408420.875717-0.4828240.790028-

0.6130710.685135-0.7284160.563589-0.8260550.428344-0.9036160.282687-0.9592120.130159-

0.991493-0.0255326-0.999674-0.180604-0.983556-0.331285-0.943531-0.473914-0.880571-0.605023-

0.796208-0.721427-0.692491-0.820294-0.571942-0.899223-0.437491-0.956294-0.292406-0.990121-

0.140213-0.9998820.0153879-0.9853380.170615-0.9468440.321694-0.8853350.464955-

0.8023060.596913-0.6997750.714363-0.5802360.814449-0.4465920.894738-0.3020940.953278-

0.1502520.9886480.005241570.9999860.1606080.9870180.312070.9500590.4559470.8900070.58874

20.8083210.7072260.7069880.8085190.588470.890160.4556480.9501640.3117510.9870720.1602760.

9999880.004905280.988597-0.1505850.953177-0.3024140.894587-0.4468930.814253-

0.580510.714127-0.7000160.596643-0.8025060.464657-0.8854910.321376-0.9469520.170283-

0.9853950.0150516-0.999887-0.140546-0.990074-0.292727-0.956196-0.437793-0.899076-0.572218-

0.820102-0.692734-0.721194-0.796411-0.604756-0.880731-0.473618-0.943642-0.330968-0.983617-

0.180273-0.999683-0.0251964-0.9914490.130493-0.9591170.28301-0.9034720.428648-

0.8258660.563867-0.7281850.68538-0.6128050.790234-0.482530.87588-0.3405260.940235-

0.1902440.981737-

0.03533860.9993750.1204260.9927220.2732630.9619390.4194590.9077740.5554580.8315450.67795

60.7351020.7839750.6207920.8709380.4913920.9367320.3500480.9797560.2001960.9989650.04547

720.993893-0.1103470.964662-0.2634890.911984-0.4102260.837326-0.5467030.744426-

0.6677050.645135-0.7640690.563626-0.826030.518828-0.8548790.504009-0.8636980.501399-

0.865216

@@@@@ OUTPUT OF DEMODULATION @@@@@

11100011010111111000110010000001101001111011100011010000000000010111000100001011000

01100001101001001100000011100111111011101101101011101001111110010011100111101001100

01100000111100111111100100101010111011110000000001000011111111101111110011000101001

10100110101101000011100111000010000110001011100101100011011110110010000001110011100

00001010011010001101110110101111110111011000001110011001010100100010101000111101111

01110111101101000110100000100011011000011000000000000000000000000000000000000000000

00000000000000

@@@@@ OUTPUT OF DEINTERLEAVER @@@@@

00110101011110111111001101010100110100111111100011000110111110100001010001101001011

01101101010111011001010000101000110100101010101010110000000010110010101011000110100

00101011001100000011010110010110111011001001011101101001010110000011001110110100010

01001000110101011101100100110010110000000011000011010101110000100011100011101001010

01110101000101110000010110011011100010010010000110101101110011000101111111010101011

11111000110110110111101101110011101100101

@@@@@ VITERBI DECODING @@@@@

01110100000111001000010001100110110111111011110100110110111111111110001111111100100

11000000011111101001110111111100000101010110111101001111110001101111010101001010111

01101100011111010110101101110011000101111111010101011111110001101101101111011011100

11101100101

@@@@@ RECOVERED SPEECH @@@@@

0 -0.25 -0.121773 -0.14462 -0.10391 -0.0660708 -0.0438734 -0.280344 -0.208902 -0.225706 -

0.460091 -0.291557 -0.281777 0.0674649 -0.0809835 -0.0310252 0.194973 -0.0557506 -0.0432999

0.163582 0.0597901 0.0656712 -0.229391 -0.0575375 -0.13576 0.0316745 0.0453169 0.0674876

0.261968 0.081412 0.0996899 0.209614 0.111444 0.123323 0.106568 0.139893 0.109909 0.116774

0.13774 0.120515 0.124754 0.257153 0.188605 0.193798 0.241475 0.187667 0.17872 0.372126

0.157814 0.231287 0.380463 0.285968 0.295256 0.0124607 0.0329431 0.0224607 0.0602131

0.0213478 0.117148 0.017289 0.185428 0.0988548 0.104978 0.232977 0.13392 0.159613 0.253924

0.199639 0.190088 0.0284235 0.109206 0.0717139 0.161575 0.171379 0.310697 0.342092 0.258484

0.429908 0.366088 0.321719 0.290172 0.282892 0.28026 0.266939 0.310011 0.308441 0.0596472

0.179068 0.145336 0.363379 0.294423 0.338504 0.321584 0.239848 0.229372 0.191554 0.231949

0.231482 0.15133 0.217135 0.194407 0.906494 0.54086 0.611333 0.449418 0.348388 0.290229

0.297819 0.442058 0.432003 0.748578 0.50 -0.25 -0.121773 -0.14462 -0.10391 -0.0660708 -

0.0438734 -0.280344 -0.208902 -0.225706 -0.460091 -0.291557 -0.281777 0.0674649 -0.0809835 -

0.0310252 0.194973 -0.0557506 -0.0432999 0.163582 0.0597901 0.0656712 -0.229391 -0.0575375 -

0.13576 0.0316745 0.0453169 0.0674876 0.261968 0.081412 0.0996899 0.209614 0.111444 0.123323

0.106568 0.139893 0.109909 0.116774 0.13774 0.120515 0.124754 0.257153 0.188605 0.193798

0.241475 0.187667 0.17872 0.372126 0.157814 0.231287 0.380463 0.285968 0.295256 0.0124607

0.0329431 0.0224607 0.0602131 0.0213478 0.117148 0.017289 0.185428 0.0988548 0.104978

0.232977 0.13392 0.159613 0.253924 0.199639 0.190088 0.0284235 0.109206 0.0717139 0.161575

0.171379 0.310697 0.342092 0.258484 0.429908 0.366088 0.321719 0.290172 0.282892 0.28026

0.266939 0.310011 0.308441 0.0596472 0.179068 0.145336 0.363379 0.294423 0.338504 0.321584

0.239848 0.229372 0.191554 0.231949 0.231482 0.15133 0.217135 0.194407 0.906494 0.54086

0.611333 0.449418 0.348388 0.290229 0.297819 0.442058 0.432003 0.748578 0.595701 0.581699

0.963825 0.65112 0.682298 0.99 0.834289 0.839377 0.202106 0.51277 0.442843 0.733552 0.780673

0.909881 0.99 0.892502 0.898232 0.99 0.970425 0.99 0.771385 0.911056 0.693382 0.785289

0.876943 0.952726 0.761654 0.811172 0.786029 0.541074 0.649764 0.645938 0.51782 0.616213

0.570181 0.0600025 0.305956 0.625547 0.77798 0.733054 0.734974 0.91448 0.596251 0.609309

0.19862 0.407811 0.516531 0.915534 0.852624

DSP Implementation of GSM

In this section we will discuss the implementation of the algorithms we discussed so

far on DSK 6713 Floating point by Texas Instrument. A brief description of the DSP

board is presented first for a clear cut idea of the working of the device.

Overview of DSK 6713

The 6713 DSP Starter Kit (DSK) is a low-cost platform which lets users evaluate and

develop applications for the Texas Instruments C67X DSP family. The primary

features of the DSK are:

· 225 MHz TMS320C6713 Floating Point DSP

· AIC23 Stereo Codec

· Four Position User DIP Switch and Four User LEDs

· On-board Flash and SDRAM

The TMS320C6713 DSP is the heart of the system. It is a core member of Texas

Instruments’ C64X line of fixed point DSPs whose distinguishing features are an

extremely high performance 225MHz VLIW DSP core and 256Kbytes of internal

memory. On-chip peripherals include a 32-bit external memory interface (EMIF)

with integrated SDRAM controller, 2 multi-channel buffered serial ports (McBSPs),

two on-board timers and an enhanced DMA controller (EDMA).

The 6713 has a significant amount of internal memory so many applications will have

all code and data on-chip. External accesses are done through the EMIF which can

connect to both synchronous and asynchronous memories. The EMIF signals are also

brought out to standard TI expansion bus connectors so additional functionality can be

added on daughtercard modules.

DSPs are frequently used in audio processing applications so the DSK includes an on-

board codec called the AIC23. Codec stands for coder/decoder, the job of the AIC23

is to code analog input samples into a digital format for the DSP to process, then

decode data coming out of the DSP to generate the processed analog output. Digital

data is sent to and from the codec on McBSP1 which is a bidirectional serial port.

Data Transfer

Analog signals are transmitted and received from the codec via McBSP1. The EDMA

is configured to take every 16-bit signed audio sample arriving on McBSP1 and store

it in a buffer in memory to be processed by the DSP. At the same time the EDMA is

used to transfer data from memory to the McBSP1 to be sampled and transmitted.

Ping Pong Buffering

Using a single buffer for transmitting and receiving can be tricky and timing

dependent because new data constantly overwrites present data being transmitted.

Ping pong buffering is a technique where two buffers are used for data transfer instead

of only one. The EDMA is configured in our case to fill the Ping buffer first, and then

the Pong buffer. While the Pong buffer is being filled, the Ping buffer can be

processed with the knowledge that the current transfer will not overwrite it. In our

system we use Ping and Pong buffers for both transmitting and receiving.

Development Environment

Code Composer Studio is TI’s flagship development tool. It consists of an assembler,

a C compiler, an integrated development environment (IDE, the graphical interface to

the tools) and numerous support utilities like a hex format conversion tool. The DSK

includes a special version of Code Composer specially tailored to features on the 6713

DSK board.

The 6713 DSK includes a special device called a JTAG emulator on-board that can

directly access the register and memory state of the 6713 chip through a standardized

JTAG interface port. When a user wants to monitor the progress of his program,

Code Composer sends commands to the emulator through its USB host interface to

check on any data the user is interested in.

This debugging method is extremely powerful because programs can be debugged

unobtrusively on real hardware targets without making any special provisions for

debug like external probes, software monitors or simulated hardware. When

designing your own hardware around the 6713 you can debug your application with

the same rich functionality of the DSK simply by using Code Composer with an

external emulator and including a header for the JTAG interface signals.

Include files

Typical header files used in the application development in C language. Is not

necessary to add those kind of files in the project, on the contrary it is the CCS itself

the one in charge of loading those files into the project.

Library Files

User’s library files are included in this folder.

Source Files

The different modules that compose the application are included in this folder. They

can be developed in C language of (.c) or in Assembly language (.asm).

Cmd Files

Files used by the linker in order to describe the way in which different sections built

in the application are located in thee different memory address the platform dispose

from running the current application.

Though we hand coded the entire GSM waveform in C for Code Composer Studio for

our implementation, this can also be done by creating MATLAB simulink models and

then using the MATLAB tool called Embedded Target for TI C6000.

Resources Used

Chip Support Library:

o IRAM

o DMA

o EDMA

o McBSP

o Timer1

Board Support Library:

o SDRAM

o AIC23 Audio Codec

Flow of Data in DSP

DIGITAL DOWN CONVERSION

INTRODUCTION

Digital down conversion is a technique that takes a band limited high sample rate digitized signal, mixes the signal to a lower frequency and reduces the sample rate while retaining all the information. It is a fundamental part of many communication systems.

This technique greatly reduces the amount of effort required for the subsequent processing of the signal without loss of any of the information carried.

In a simplified digital radio design, the high-frequency signal received from the antenna first passes through an RF section followed by analog-to-digital conversion. In the case of a global system for mobile communications (GSM) system, the frequency of the incoming signal at this stage is around 70 MHz. This high-frequency signal then passes through a digital downconverter (DDC), which performs frequency translation and produces the corresponding baseband signal. In the case of a GSM system, the basebandfrequency is around 270 kHz. The digital radio then recreates theaudio signal after demodulating the baseband signal.

COMPONENTS OF DIGITAL DOWNCONVERTER (DDC)

In order to achieve digital down conversion of a digitized signal we need to have following components

1. Numerically Controlled Oscillator (NCO)2. Mixer3. Low pass filter4. Decimator

Figure 1 DDC block diagram

DIRECT DIGITAL SYNTHESIS (DDS)

It is a technique for using digital data processing blocks as a means to generate a frequency tunable output signal referenced to a fixed-frequency clock source. In essence, the reference clock frequency is “divided down” in a DDS architecture by the scaling factor set forth in a programmable binary tuning word.The tuning word is typically 24 to 48 bits long which enables a DDS implementation to provide superior output frequency tuning resolution [1].

THEORY OF OPERATION

In its simplest form, a direct digital synthesizer can be implemented from a precision reference clock, an address counter, a programmable read only memory (PROM), and a D/A converter (see Figure 2 ).

Figure 2 Simple Direct digital synthesizer

In this case, the digital amplitude information that corresponds to a complete cycle of a sine wave is stored in the PROM. The PROM is therefore functioning as a sine lookup table. The address counter steps through and accesses each of the PROM’s memory locations and the contents (the equivalent sine amplitude words) are presented to a high-speed D/A converter. The D/A converter generates an analog sine wave in response to the digital input words from the PROM [1].

NCO

The introduction of the phase accumulator in the DDS architecture in place of address counter forms numerically controlled oscillator (NCO).In the figure given below

Figure 3 Frequency tunable DDS system

an N-bit variable-modulus counter and phase register are implemented in the circuit before the sine lookup table, as a replacement for the address counter.The carry function allows this function as a “phase wheel” in the DDSarchitecture. To understand this basic function, visualize the sine wave oscillation as a vector rotating around a phase circle (see Figure 4)

Figure 4 Digital Phase Wheel

where fo = the output frequency of the DDS M = the binary tuning word fc = the internal reference clock frequency (system clock) N = The length in bits of the phase accumulator 2^N = Total number of points on the phase wheel

Each designated point on the phase wheel corresponds to the equivalent point on a cycle of a sine waveform. As the vector rotates around the wheel, visualize that a corresponding output sine wave is being generated. One revolution of the vector around the phase wheel, at a constant speed, results in one complete cycle of the output sine wave. The phase accumulator is utilized to provide the equivalent of the vector’s linear rotation around the phase wheel. The contents of the phase accumulator correspond to the points on the cycle of the output sine wave. The number of discrete phase points contained in the “wheel” is determined by the resolution, N, of the phase accumulator. The output of the phase accumulator is linear and cannot directly be used to generate a sine wave or any other waveform except a

ramp. Therefore, a phase-to amplitude lookup table is used to convert a truncated version of the phase accumulator’s instantaneous output value into the sine wave amplitude information that is presented to the D/A converter. The phase-to-amplitude lookup table generates all the necessary data by reading forward then back through the lookup table.

Figure 5 Signal flow through DDS architecture

The phase accumulator is actually a modulus M counter that increments its stored number each time it receives a clock pulse. The magnitude of the increment is determined by a digital word M contained in a “delta phase register” that is summed with the overflow of the counter. The word in the delta phase register forms the phase step size between reference clock updates; it effectively sets how many points to skip around the phase wheel. The larger the jump size, the faster the phase accumulator overflows and completes its equivalent of a sine wave cycle. For a N=32-bit phase accumulator, an M value of 0000…0001(one) would result in the phase accumulator overflowing after 2^32 reference clock cycles (increments). If the M value is changedto 0111…1111, the phase accumulator will overflow after only 2^1 clock cycles, or two reference clock cycles. This control of the jump size constitutes the frequency tuning resolution of the DDS architecture [1].

OUTPUT OF NCO

These results are for the following SpecificationsTuning word value = 64Clock frequency = 12800 HzOutput frequency = 1600 Hz

One cycle of sine wave shown

One cycle of cosine wave shown

GENERATED BANDPASS SIGNAL

Summation of 1000 sine waves. Bandwidth is 1000 Hz. Starting frequency is 1100 Hz . Ending frequency is 2100 Hz. Centered at 1600 Hz

Frequency domain representation of Band pass signal

Time domain representation of Band pass signal

MIXER

This part multiplies the incoming signal with the output of NCO. As a result we get sum of frequencies and difference of frequencies.

LOW PASS FIR CHEBYSHEV FILTER

This filter removes the sum of frequencies portion and we are left with difference of frequencies portion only. We used filter with following specificationsOrder 658Sampling frequency 12800HzCut Off frequency 500 HzSide Lobe attenuation 50

Frequency domain representation of filtered signal

Time domain representation of filtered signal

DECIMATOR

We decimated by a factor of 4.

Time domain representation of Filtered and decimated signal