[IEEE IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics - Lake Tahoe, NV, USA (6-13 July...

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w1.3 9 : " - 9:30am The MBE Growth and MCP/RIE-basedFabrication of InGaAs-GaAs MQW Structures for 1047 - 1064 nm S-SEED Arrays C. R. Stanley, M. McElhinney, F. Pottier, Y. P. Song and C.D.W. Wilkinson University of Glasgow. Glasgow, G12 SQQ, UK Tel. No.; (44)41-330-4798: Fax No.; (44)41-330-4907: e-mail; [email protected] D. J. Goodwill Heriot-Watt University, Riccarton, Edinburgh, EH14 4AS. UK Tel. No.; (44)-31-449-5111: e-mail; [email protected] 1. Introduction (AI,Ga)As S-SEED arrays' operating at 850 nm are of interest for digital photonic logic planes and are best employed as FET-SEED arrays or flip-chip bondcd to silicon electronics. Their usefulness in the latter configuration is restricted by absorption in the GaAs substrate while the clock-rates for realistic systems are limited by the laser power reaching the device array (= milliwatts for laser diode sources). Consequenlly, we have chosen strained, multiple quantum well (MQW) InGaAs-GaAs for the development of S-SEEDS which can be matched to the 1047-1064 nm wavelengths available from high power (> 1 W) diode-pumped Nd:YLF and Nd:YAG lasers and where the GaAs substrate is uansparent. Fabrication based on growth by molecular beam epitaxy (MBE) and a new dry etch process with S i c k chemistry has resulted in excellent material uniformity, SEEDS with good contrast ratios and a high yield of devices within arrays. 2. MBEgrowth A schematic diagram of the (In,Ga)As p-i-n MQW modulator is shown in fig. 1. The structure was grown in two stages on a 2" diameter S1-GaAs substrate by MBE using an As2 flux. The group Ill fluxes were calibrated by RHEED intensity oscillations; particular care was taken wilh the In flux measurements to avoid under-estimating the true values due 10 surface segregation effccts2. The first stage of growth involved the deposition of InxGal-xAs with composition graded from x = 0 to 0.135 over 2 pm, and a InAlAs-GaAs superlattice. To obtain as near a linear change in In composition as possible, the In furnace temperature was ramped in ten separate steps. taking account of the changing growth rate with increasing In flux. The As2 flux was set close to the minimum and the substrate temperature was 420 'C, to avoid a transition to 3-D nucleation and to reduce the propagation of misfit dislocations. Growth was then interrupted and the fluxes recalibrated. Finally, the p-i-n MQW modulator structure was grown at 540 'C with the As2 flux increased by a factor of 3.5. 3. Material characterisation The MQW surface had faint cross-haLching associated with a network of mislit dislocations and a possible source of broadening for the exciton absorption pcak. The topology had a maximum pcak-to-valley height of = 30 nm. The 300 K absorption edge peak showed cxccllcnt uniformity over the wafer, bcing within B.2 nm of 1061 nm to a diameter of 1". and k0.7 nm to the full 2". The HWHM on the low energy side of this pcak at zero-bias was 6.0 meV. This is the best reported for the (In,Ga)As material systcm. and compares to 4.5 mcV for similar (A1,Ga)As MQWS'. The measured transmission-voltage performancc (fig. 2) showed a contrast ratio of 2.04 between 0 to 10 V, which would bc incrcased to 4.17 by thc incorporation of a mirror. X-ray diffractometry revealed that the graded buffer and SL were not totally relaxed which caused a shift of the absorption edge from the design wavelength of 1047 nm, but their resistivity was sufficiently high to ensure isolation between adjacent mesa devices. 4. Array processing The (1n.Ga)As S-SEED arrays were proccsscd with a low damage reactive ion etch in a Plasmatcch-ECR machine, under new Magnecically Confined Plasma Reactive Ion Etching (MCP/RlE) conditions3, with S i c 4 chcmistry. Good etch uniformity, dcpth control and wall verticality wcrc obtained using Shiplcy S1400-31 photoresist masking. Multi-step etching was performed to prcvent samplc hcating with a conscqucnt dcgradalion of thc resist. A 16 x 16 array and 44 indcpcndcnt 2 x 2 arrays wcrc fiabricated on a 11 x 11 mm2 chip. The SEED consistcd of a doublc ctchcd mcsa with a total height of 2.9 pm, Au/Zn/Au p- and Au/Ni/Au/Gc/Au n-ohmic coniacLs, Si3N4 passivalion laycr, Hilachi photosensitive polyimide bridges, NiCr/Au mctal inlcrconncctions and biasing iracks, an anti-rcflcction coating on the rcar surface of the GaAs substratc and a metal mirror on thc top surface of the 20 pn x 20 pm optical window. Thc S-SEED pitch was 120 pm to match thc dimcnsions of Si-CMOS circuitry4. Thc optical windows and ohmic conlact areas were ctchcd by convcniional RlE-CbFh chemistry. A yicld of IOW% was obtaincd for a 16 x 16 S-SEED array (fig. 3). Finally, a 2 x 2 mm2 chip with X indcpcndcnt 2 x 2 arrays complctc with cvaporatcd ln-solder pads (fig. 4) was flip-chip mountcd to a Si wal'cr. LO cviiluatc ;I pr(xxss dcsignctl for conipatihili~y wi1li llip-chip bonding to 50

Transcript of [IEEE IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics - Lake Tahoe, NV, USA (6-13 July...

Page 1: [IEEE IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics - Lake Tahoe, NV, USA (6-13 July 1994)] Proceedings of IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics

w1.3 9:" - 9:30am

The MBE Growth and MCP/RIE-based Fabrication of InGaAs-GaAs MQW Structures for 1047 - 1064 nm S-SEED Arrays

C. R. Stanley, M. McElhinney, F. Pottier, Y. P. Song and C.D.W. Wilkinson University of Glasgow. Glasgow, G12 SQQ, UK

Tel. No.; (44)41-330-4798: Fax No.; (44)41-330-4907: e-mail; [email protected]

D. J. Goodwill Heriot-Watt University, Riccarton, Edinburgh, EH14 4AS. UK Tel. No.; (44)-31-449-5111: e-mail; [email protected]

1. Introduction

(AI,Ga)As S-SEED arrays' operating at 850 nm are of interest for digital photonic logic planes and are best employed as FET-SEED arrays or flip-chip bondcd to silicon electronics. Their usefulness in the latter configuration is restricted by absorption in the GaAs substrate while the clock-rates for realistic systems are limited by the laser power reaching the device array (= milliwatts for laser diode sources). Consequenlly, we have chosen strained, multiple quantum well (MQW) InGaAs-GaAs for the development of S-SEEDS which can be matched to the 1047-1064 nm wavelengths available from high power (> 1 W) diode-pumped Nd:YLF and Nd:YAG lasers and where the GaAs substrate is uansparent. Fabrication based on growth by molecular beam epitaxy (MBE) and a new dry etch process with S i c k chemistry has resulted in excellent material uniformity, SEEDS with good contrast ratios and a high yield of devices within arrays.

2. MBEgrowth

A schematic diagram of the (In,Ga)As p-i-n MQW modulator is shown in fig. 1. The structure was grown in two stages on a 2" diameter S1-GaAs substrate by MBE using an As2 flux. The group Ill fluxes were calibrated by RHEED intensity oscillations; particular care was taken wilh the In flux measurements to avoid under-estimating the true values due 10 surface segregation effccts2. The first stage of growth involved the deposition of InxGal-xAs with composition graded from x = 0 to 0.135 over 2 pm, and a InAlAs-GaAs superlattice. To obtain as near a linear change in In composition as possible, the In furnace temperature was ramped in ten separate steps. taking account of the changing growth rate with increasing In flux. The As2 flux was set close to the minimum and the substrate temperature was 420 'C, to avoid a transition to 3-D nucleation and to reduce the propagation of misfit dislocations. Growth was then interrupted and the fluxes recalibrated. Finally, the p-i-n MQW modulator structure was grown at 540 'C with the As2 flux increased by a factor of 3.5.

3. Material characterisation

The MQW surface had faint cross-haLching associated with a network of mislit dislocations and a possible source of broadening for the exciton absorption pcak. The topology had a maximum pcak-to-valley height of = 30 nm. The 300 K absorption edge peak showed cxccllcnt uniformity over the wafer, bcing within B.2 nm of 1061 nm to a diameter of 1". and k0.7 nm to the full 2". The HWHM on the low energy side of this pcak at zero-bias was 6.0 meV. This is the best reported for the (In,Ga)As material systcm. and compares to 4.5 mcV for similar (A1,Ga)As MQWS'. The measured transmission-voltage performancc (fig. 2) showed a contrast ratio of 2.04 between 0 to 10 V, which would bc incrcased to 4.17 by thc incorporation of a mirror. X-ray diffractometry revealed that the graded buffer and SL were not totally relaxed which caused a shift of the absorption edge from the design wavelength of 1047 nm, but their resistivity was sufficiently high to ensure isolation between adjacent mesa devices.

4. Array processing

The (1n.Ga)As S-SEED arrays were proccsscd with a low damage reactive ion etch in a Plasmatcch-ECR machine, under new Magnecically Confined Plasma Reactive Ion Etching (MCP/RlE) conditions3, with S i c 4 chcmistry. Good etch uniformity, dcpth control and wall verticality wcrc obtained using Shiplcy S1400-31 photoresist masking. Multi-step etching was performed to prcvent samplc hcating with a conscqucnt dcgradalion of thc resist. A 16 x 16 array and 44 indcpcndcnt 2 x 2 arrays wcrc fiabricated on a 11 x 11 mm2 chip. The SEED consistcd of a doublc ctchcd mcsa with a total height of 2.9 pm, Au/Zn/Au p - and Au/Ni/Au/Gc/Au n-ohmic coniacLs, Si3N4 passivalion laycr, Hilachi photosensitive polyimide bridges, NiCr/Au mctal inlcrconncctions and biasing iracks, an anti-rcflcction coating on the rcar surface of the GaAs substratc and a metal mirror on thc top surface of the 20 p n x 20 pm optical window. Thc S-SEED pitch was 120 pm to match thc dimcnsions of Si-CMOS circuitry4. Thc optical windows and ohmic conlact areas were ctchcd by convcniional RlE-CbFh chemistry. A yicld of IOW% was obtaincd for a 16 x 16 S-SEED array (fig. 3).

Finally, a 2 x 2 mm2 chip with X indcpcndcnt 2 x 2 arrays complctc with cvaporatcd ln-solder pads (fig. 4) was flip-chip mountcd to a Si wal'cr. LO cviiluatc ;I pr(xxss dcsignctl for conipatihili~y wi1li llip-chip bonding to

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Page 2: [IEEE IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics - Lake Tahoe, NV, USA (6-13 July 1994)] Proceedings of IEE/LEOS Summer Topical Meetings: Integrated Optoelectronics

Si-CMOS. SEEDS teslcii via the In-solder pads and Au tracks on the Si showed no degradation in their I-V characteristics. Details of the MBE growth and characterisation, the new MCP/RIE etching process and array fabrication will be discussed in depth.

5. Acknowledgement

The work is supported by the UK Scicncc and Engineering Research Council under the Scottish Collaborative Initiative on Optoelcclronic Sciences (SCIOS).

6. References

[l] For a review, see A.L LENTINE and D.A.B. MILLER, IEEE, J . Quantum Electron., QE-29,655 (1993). 121 M. McELHINNEY and C.R. STANLEY, Electron. Lett., 28,1302 (1993). 131 Y.P. SONG, el al., Submitted to the Int. Symp. on Electron, Ion and Photon Beams, New Orleans, USA, 31 May-3 June, 1994. [4] D.J. GOODWILL, et al., Submitted to IEEELEOS Summer Topical Meeting on Smart Pixels, July 1994.

0.3pm 2E18 Be-1 3.5% InGaAs & 0.01pm SE1 8

G - MQW 57A GaAs-81A 23% InGaAs; x100 f -

0.5pm 2E18 Si-I 3.5% InGaAs

Superlattice 21 A 26% InAIAs-21 A GaAs; ~ 1 0 0 -

- - - -

Undoped graded buffer 0-1 3.5% InGaAs

SI-GaAs wafer - backside polished

Figure 1: Schematic diagram of MBE-grown strain-balanced (In,Ga)As MQW structure for =IO47 nm S-SEEDS.

Figure 2 Transmission vs voltage at room temperature for (In,Ga)As MQW SEED.

Figure 3: SEM micrograph of 16 x 16 S-SEED array.

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Figure 4: SEM micrograph of array and In-solder pads prior to flip-chip bonding.