[IEEE 2013 Brazilian Power Electronics Conference (COBEP 2013) - Gramado, Brazil...

SHORT CIRCUIT FAULT DIAGNOSIS IN SWITCHES

OF A SINGLE-PHASE FULL-BRIDGE INVERTER

André Barros de Mello Oliveira1, Robson Luiz Moreno

2 and Ênio Roberto Ribeiro

2

1 Federal Center of Technological Education of Minas Gerais - CEFET-MG, Varginha – MG, Brazil

2 Federal University of Itajubá – UNIFEI, Itajubá – MG, Brazil

Power Electronics and Applications Research Group (PEARG)

[email protected] [email protected] [email protected]

Abstract – This paper presents a method of short circuit

fault diagnosis in switches of a single-phase full-bridge

inverter, which feeds an inductive load. To diagnose

failures, a current limiter and measurements of the

variables were used: control voltages, currents in

switches and the load current. With these measurements

there were yielded a set of tables. These tables describe

the behavior of the inverter. From this set of tables a

simplified table is extracted. It includes the minimum

information necessary for the establishment of a fault

diagnosis. Based on the combinations of their critical

information, functions and logic circuits that detect and

locate short circuit faults of the inverter were designed.

Simulation results confirm the proposed diagnostic

method.

Keywords – Current limiter, detection and faults

diagnosis, single-phase full-bridge inverter, short-circuit

failures.

I. INTRODUCTION

Inverters are power converters with applications in

various processes, among which stands out the AC motors

drive. Their lifetime and their reliability can be ensured by an

efficient process of fault diagnosis (FD). Studies have shown

that the failure of a switch in a converter increases the cost

and also compromises its life and performance [1].

Faults in switches (diode or transistor) can be short-

circuit (SC) or open circuit (OC). Short-circuit faults cause

damage to switches, such as an immediate effect on the

torque curve of an AC motor [2]. This is important because

semiconductors account for about 20% of equipment failures

where they are inserted. Moreover, they are classified as the

weaker components in a power converter [3, 4].

Since the 90s, there appeared intelligent systems for the

protection and FD of such equipment. Until then, these

projects were based on redundancy in components and the

use of reconfigurable blocks. This causes increased costs and

maintenance periods. Initially there were studies suggesting

an expert system for FD in AC motor drivers [5].

In another study, the effects of different types of faults in

an inverter, highlighting the SC faults in the switches, were

researched [6].

Several techniques have been used for the FD in

switches, a process that is executed in three steps [7]: data

acquisition, detection and fault classification, and

determination of its consequences.

The variations in gate circuit parameters (capacitances

and voltages) may indicate the occurrence of SC failures.

Based on this property, fault diagnosis of SC methods, using

information from the device terminals or also of the control

circuit, are proposed [8, 9].

The variables: phase voltages, line currents and the

torque signal of an AC motor are used for the construction of

algorithms of detection and identification of faults in the

switches of the inverter [10], [11]. These algorithms use

neural network techniques.

The output voltages and currents in the load are also

variables used in fault diagnosis of SC in switches in the

inverter. Algorithms for defining the rules of the FD use the

Park Transform, Vector Control and Fuzzy Logic [12], [13].

The modeling of semiconductors and passive components

of the inverter are used as variables for the FD. This FD is

accomplished by Bond Graph technique which produces a

matrix that determines the minimum number of detectors for

the localization of faults in an inverter [14].

From technical literature it is clear that there are more

studies on the FD of open-circuit than on FD of short-circuit

switches. Moreover, there are further difficulties in detecting

SC faults.

Within this context, this paper presents a new proposal

for FD of short-circuit in switches in an inverter. It proposes

a FD of short-circuit strategy, the differential of which is the

insertion of a current limiter in the inverter. Additionally, the

following variables are used for diagnosis: control voltages

and currents in the switches and the load. With these

information, tables that describe the behavior of the inverter

are created. From these tables, using a statistical approach, an

optimized table results. The latter contains the minimum

variables required for the construction of rules for SC

diagnosing and location. With these rules, a system of

detection and location of SC faults with basic logic circuits is

built.

II. STRUCTURE AND METHODOLOGY

The FD method developed was applied to a single-phase

full-bridge inverter, which is diagramed in Fig. 1. Terminals

A and B are connected to an inductive load with Ro = 47 Ω

and Lo = 51 mH.

Each switch of the inverter is represented by a voltage

controlled switch with a parallel return free-wheel diode and

an RC snubber branch. Two auxiliary switches are connected

in parallel to the switches of the inverter to cause the

transient SC fault.

978-1-4799-0272-9/13/$31.00 ©2013 IEEE 1107

The auxiliary switches have different closing (

opening (tOFF) times. Moreover, the inverter has two current

sensors (Hi1 and Hi2) which detect the short

their switches.

Fig. 1. Single-phase full-bridge inverter

A. Diagnostic Signals

For the diagnosis of SC inverter faults

control voltage (vgn), current in the switches

current (io) have been opted. This choice is explained by the

ease of acquisition of the inverter current signals and the

pulsed digital signal characteristic of control signals of the

switches.

The values of diagnostic signals were collected and

placed on a table in the following sequence:

1) sampling times (ta):is an auxiliary variable, and t

where Ts is the switching period of the trigger signals of the

switches;

2) control voltage on the switches: vg1, vg

signals have two logical levels: one (1) to switch on and 0

(zero) to switch off;

3) current in switches (i1 a i4), which can take values

(zero) to ISC (ISC = maximum current of short

4) load current (io), with values between 0 (zero) and the

short-circuit current, ISC.

B. Sampling Strategy

Modulation imposed on the inverter switches of Fig

uses a 60 Hz, almost square wave, for operation at three

levels, with low harmonic content in the output voltage. The

waveform of the load for this condition is shown in

The voltage VAB is positive when the switches

are conducting. And VAB is negative when the switches

and S3 conduct. The commands to switches in the same

branch are complementary in order to avoid

between terminals C and D.

vg6 (S6): SC operation

vg5 (S5): normal operation

Vd

The auxiliary switches have different closing (tON) and

times. Moreover, the inverter has two current

) which detect the short-circuit current of

nverter schema.

inverter faults the use of signals

), current in the switches S1 to S4, and load

This choice is explained by the

the inverter current signals and the

pulsed digital signal characteristic of control signals of the

of diagnostic signals were collected and

placed on a table in the following sequence:

is an auxiliary variable, and ta = f(Ts)

is the switching period of the trigger signals of the

, vg2, vg3 e vg4. These

signals have two logical levels: one (1) to switch on and 0

which can take values from 0

short-circuit);

between 0 (zero) and the

on the inverter switches of Fig.1

60 Hz, almost square wave, for operation at three

levels, with low harmonic content in the output voltage. The

waveform of the load for this condition is shown in Fig. 2.

is positive when the switches S1 and S4

is negative when the switches S2

conduct. The commands to switches in the same

are complementary in order to avoid a short circuit

Fig. 2. Inverter output voltage w

sampling times

The waveform of Fig. 2

defining the sampling instants

The sampling of the SC fault diagnosis signal is defined

at 0.25.Ts, with 4 points (t1 to

instants defined every ¼ Ts are found by expression (1).

a s n+1 n s n st = f(T ) = t = t +

The first sampling instant

point of the first segment of the voltage v

value of t1 is: t1= 3.33 ms / 2 = 1.67 ms.

have:

2 1 st = t + ∆T

= 1.67 ms + 0.25 (16.67 ms) = 5.83 ms

C. Inverter in Normal Operation

Initially, there is an evaluation of inverter functioning

without faults and a set of values of diagnosis

collected. The diagnosis produced (

diagnostic (N).

Table I shows the states of the voltage and current signals

of the inverter, that form the reference diagnostic

response) based on the instantaneous values

waveforms in accordance to Fig.

TABLE

Measurements for normal operation of the inverter.

ta Diagnosis signal

vg1 vg2 vg3 vg4

t1 0 1 1 0

t2 1 1 0 0

t3 1 0 0 1

t4 1 1 0 0

δ: operation diagnostic. N: normal operation. SC: short

The inverter operates in normal mode (

switches) during the first sampling time (t

next cycle). During the second sampling time t

next cycle, the SC fault occurs on S

D. Inverter Current Limiter

For the diagnosis of SC it is inserted, in the inverter

circuit, a current limiter to operate in the intervals of

occurrence of SC between terminals C and D of the inverter.

nverter output voltage waveform, and the

per period (t1 to t4).

Fig. 2 is used as a reference for

instants of the diagnosis signals.

The sampling of the SC fault diagnosis signal is defined

to t4) per period Ts. The sampling

are found by expression (1).

a s n+1 n s n st = f(T ) = t = t + ∆T = t + T 4 (1)

instant (t1) was chosen for the middle

point of the first segment of the voltage vAB. Therefore, the

= 3.33 ms / 2 = 1.67 ms. For instant t2, we

= 1.67 ms + 0.25 (16.67 ms) = 5.83 ms ⋅

Inverter in Normal Operation

Initially, there is an evaluation of inverter functioning

without faults and a set of values of diagnosis signals is

collected. The diagnosis produced (δ) is called the reference

the states of the voltage and current signals

that form the reference diagnostic (δ

response) based on the instantaneous values of the

Fig. 3.

TABLE I

Measurements for normal operation of the inverter. Diagnosis signal

δδδδ i1 i2 i3 i4 io

0 iN iN 0 - iN N

0 0 0 0 0 N

iN 0 0 iN iN N

0 0 0 0 0 N

operation diagnostic. N: normal operation. SC: short-circuit operation.

The inverter operates in normal mode (no SC faults in the

switches) during the first sampling time (t1 to t4 and t1 of the

next cycle). During the second sampling time t2 until t2 of the

next cycle, the SC fault occurs on S1.

For the diagnosis of SC it is inserted, in the inverter

circuit, a current limiter to operate in the intervals of

occurrence of SC between terminals C and D of the inverter.

1108

The current limiter consisting of a current limiting

resistor (RS) and the auxiliary switches S5 and S6 is shown in

Fig. 4.

Fig. 3. Diagnostic signals waveforms of the inverter (inductive

load) - normal operation and S1 in SC.

Fig. 4. Equivalent circuit of the inverter, with current limiter (SC

fault situation in S1).

The short circuit occurs, between the terminals C and D,

when one of the switches is in SC, and the other on the same

branch is conducting (normal operation). Fig. 4 shows the

equivalent circuit of the inverter for the SC interval of the

switch S1. In RS energy dissipation occurs, but only in the

transitory of the SC for any switch from inverter.

The following resistance values for semiconductors were

considered in this study:

1) RDS(on) (conduction resistance of the switch): typical value

of 0.85 Ω (found in a power MOSFET, for example, the IRF

840);

2) RSC (SC resistance of the switch): 0.01 Ω (arbitrated and

used value in the simulations, such as RDS).

For the circuit of Fig. 4 VF = 1.0 V (forward voltage of

each conducting switch) and Vd = 180 V (average voltage at

the terminals C and D) were adopted. Rated current IN

(resistive load), with only S2 and S3 conducting (normal

operation mode), is given by (2).

d FN nom

o DS

V - 2V 180 - 2 × 1.0I = I = = = 3.66 A

R +2.R 47 + 2 0.85× (2)

To limit the SC current value between terminals C and D,

the resistance (RS) must be triggered at the instant when the

current in the bus reaches a threshold value.

With switch S1 in SC and S2 and S3 conducting, the

impedance between terminals A and C, ZCA is given by

expression (3). It is approximately equal to the resistance

value of RSC (S1).

ZCA = RSC (S1) // [Zo + RDS(S2)] ≅ RSC (S1) (3)

Considering the rated current of the load, given by the

expression (2), and knowing that the SC current circulates on

S3 the threshold value is defined, which is given by (4).

SC S3 lim nomI = I = 2 × I = 2 × 3.66 = 7.32 A (4)

The SC current can also be given by (5). This expression

can be rewritten as in (6), which allows calculating the SC

current limiting resistor.

d FS3 lim

s SC DS

V VI =

R + R + R

− (5)

( )d F S3 lim SC DS

S

S3 lim

V - V - I R + RR =

I

× (6)

By replacing the values in (6) the value of the limiting

resistance RS is obtained.

( )S

180 - 1.0 - 7.32 0.01+ 0.85R = 23.59

7.32

×= Ω

It is noteworthy that the current limiter has the function

of overcurrent protection for any switch in normal operation

that is connected to the branch where the defective switch is

located.

The principle of operation of the SC current limiter is

described as follows:

vg1

vg2

vg3

vg4

i1

i2

i3

i4

0V

10V

20V

30V

V(LS3:2, Lo:2)

I(Ro)*30

I(S3:3)

+I(T3_on:2)+10

I(S1:3)

+I(T1_on:2)+10

V(g1)+ 22.5

V(g2) + 15

V(g3)+ 7.5

V(g4)

t1 t2 t3 t4 t1 t2 t3 t4 t1 t2 t3 t4 ...

Normal operation Normal operationSC operationSampling

instants

vAB

io

I(S2:3)

+I(T2_on:2)

I(S4:3)

+I(T4_on:2)

-200

40

160

SEL>>

0A

10A

20A

0A

20A

vg6 (S6): SC operation

vg5 (S5): normal operation

1109

1) The supply current (imed), converted into voltage, is

compared by the sensor H1, with a voltage signal for the SC

current limit (iref). In the event of overcurrent in which imed >

iref, the auxiliary switch S6 is turned on and S6 is turned off (it

operates in a complementary way with S6). Thus, the source

current flows through RS in the SC switch (e.g., S1) and the

normal operation switch (e.g., S3) as shown in Fig. 4.

2) In the interval in which S4 receives the command, S3 gets

no command and the circuit returns to normal operation. The

auxiliary circuit is turned off (S5 ON and S6 OFF) and

current flows through the source Vd, switch S5, switch S1

(still in SC) and S4. Thus, there is no voltage drop across the

auxiliary resistor RS and load voltage does not change.

E. SC Isolated Faults on Inverter Switches

The isolated fault situations for the inverter switches were

constructed assuming the following sequence: S1, S2, S3 e S4.

An isolated fault should be understood as the short-circuit

operation of only one switch at a time.

For each switch a table containing the values of the

diagnostic signals for the sampling times adopted is

proposed.

Table II shows the values of the diagnostic signals of the

switch S1, which is in SC, at the sampling times t1, t2, t3 and t4

and t1 of the next cycle.

TABLE II

Measurements for situations of SC fault in the switch S1.

ta Diagnostic signals

δδδδ vg1 vg2 vg3 vg4 i1 i2 i3 i4 io

t2 1 1 0 0 0 0 0 0 0 SC

t3 1 0 0 1 iN 0 0 iN iN SC

t4 1 1 0 0 0 0 0 0 0 SC

t1 0 1 1 0 ISC 0 ISC 0 0 SC

t2 1 1 0 0 0 0 0 0 0 SC

Only the row referring to time t4 shows, for the currents i1

and i3, values that indicate with certainty a SC current

between terminals C and D.

The switch S3 receives, at this time, control signal to turn

on, as well as S2. The switch S1 has no control signal.

Therefore, the current that circulates through the switches S1

and S3 is the same, that is, the short-circuit current.

It is observed in Fig. 3, by the waveforms of the currents

in the switches S1 and S3 that there was action of current

limiter, since the SC current does not exceed the set limit.

This current value occurs at time t4 when the switch S3 is

connected and the switch S1 is in SC.

The load voltage is zero during the SC in S1, since no

current circulates in it.

In the 2nd line of Table II we see that the current flows

through the load when the switch S4 receives control signal.

The current flow occurs in switch S1 (in short circuit), load

Ro Lo and S4.

In Table III the measured values of diagnosis signals for

SC fault in switch S2 are listed.

TABLE III




t1 1 1 0 0 0 0 0 0 0 SC

t2 0 1 1 0 0 iN iN 0 - iN SC

t3 1 1 0 0 0 0 0 0 0 SC

t4 1 0 0 1 0 ISC 0 ISC 0 SC

t1 1 1 0 0 0 0 0 0 0 SC

The SC current in S2 is limited to 2.iN as well as the

current in S4 (in the interval in which it receives the control

signal). This situation is described in the 4th

row of Table III

(time t4), where the control signals of the switches form a

logic information given by vg1.vg2.vg3.vg4 = 1001.

Table IV shows the measurements of the simulations of

the voltage and current signals for SC fault indication of

switch S3.

TABLE IV




t1 1 1 0 0 ISC 0 ISC 0 0 SC

t2 1 0 0 1 ISC 0 ISC 0 0 SC

t3 1 1 0 0 ISC 0 ISC 0 0 SC

t4 0 1 1 0 0 iN iN 0 - iN SC

t1 1 1 0 0 ISC 0 ISC 0 0 SC

By the analysis of the rows on Table IV, SC fault is

located on S3 when vg3 = 0 (rows of sampling times t1, t2, t3

and t1 in the next cycle). The SC current circulates in S1 and

S3. At time t4, the current in S3 is the same as the rated

current, since the active control signals are vg2 and vg3. In this

row SC fault in S3 is not detected.

Table V presents the simulation measurement of SC fault

signals diagnosis in S4. The SC current flows through S2 and

S4, but the SC occurs at S4, as it conducts even without the

command signal (vg4= 0, rows of the times t2, t3 and t4).

It is important to note that the data of Tables III, IV and

V were obtained with the aid of waveforms similar to those

of Fig. 3.

TABLE V


ta Diagnostic signals δδδδ

vg1 vg2 vg3 vg4 i1 i2 i3 i4 io

t1 1 0 0 1 iN 0 0 iN iN SC

t2 1 1 0 0 0 ISC 0 ISC 0 SC

t3 0 1 1 0 0 ISC 0 ISC 0 SC

t4 1 1 0 0 0 ISC 0 ISC 0 SC

t1 1 0 0 1 iN 0 0 iN iN SC

III. SC FAULT DIAGNOSIS CIRCUIT

A. SC Fault Detection

With the values of the voltages and currents used as

diagnosis signals for SC isolated faults (Tables II, III, IV and

V) a table that describes the behavior of the system is built.

The load current (io) has no influence on the diagnosis of

SC and therefore was discarded. Only those rows in which

the current in a given switch is the same as the current SC, of

1110

the mentioned tables, were considered. The rows with

identical information, which occurs in Tables IV and V, were

disregarded.

The resulting table is Table VI. Remember that the

sampling times, in the first column are different: e.g., t4,S1 is

the time t4 for the S1 switch on SC.

TABLE VI

Diagnosis of SC in the switches S1 to S4.

ta vg1 vg2 vg3 vg4 i1 i2 i3 i4 δδδδ

t4,S1 0 1 1 0 ISC 0 ISC 0 S1

t4,S2 1 0 0 1 0 ISC 0 ISC S2

t1,S3 1 1 0 0 ISC 0 ISC 0 S3

t2,S3 1 0 0 1 ISC 0 ISC 0 S3

t2,S4 1 1 0 0 0 ISC 0 ISC S4

t3,S4 0 1 1 0 0 ISC 0 ISC S4

It can be seen from Table VI that is possible to minimize

the number of diagnosis variables in order to optimize the

detection of SC faults.

The expression (7) defines the number of combinations of

pairs of variables for diagnosis.

!( , )

!( )!

nC n r

r n r=

− (7)

For example, considering the currents i1, i2, i3 and i4,

where n = 4, r = 2, C (4,2) = 6. Therefore, the following

combinations are possible: (i1.i2), (i1.i3), ... and (i3.i4).

The combinations (i1.i3) and (i2.i4) are disregarded as they

present equalities in their information.

Table VII presents a subset, extracted from Table VI, of

diagnostic variables and their values. From this table we can

identify minimal combinations of diagnostic variables that

allow defining situations of SC. For example, assuming the

status of SC in switch S3, the combinations C1,S3 = i1.i2 or

C2,S3 = i3.i4 in Table VII, are sufficient to allow detection of

this SC failure.

B. SC Fault Localization

It was shown in the previous section that use of

appropriate combinations of pairs of diagnostic variables

allows the detection of the SC fault condition. However, it

appears that the use of these pairs alone is not enough to

locate the defective switch.

TABLE VII

Combinations of currents for SC faults indication in

isolated switches S1 to S4.

ta i1 i2 i3 i4 δδδδSC

t4,S1 ISC 0 ISC 0 SC (S1)

t4,S2 0 ISC 0 ISC SC (S2)





Such a situation occurs, for example, with the

combinations of i3 and i4 given by C2,S2 (S2 switch, row 2)

and C2,S4 (switch S4, rows 5 and 6), which have the same

measured values (0 and ISC) for SC faults. Thus, you cannot

diagnose in which switch S2 or S4 the SC fault happened.

Therefore, there is a need to use combinations of other

diagnosis variables. Note that there are no columns alike for

the voltages diagnosis signals (vg1, vg2, vg3 and vg4) in Table

VI. This suggests that any combination of these signals, two

by two, can be used as an auxiliary criterion for SC fault

location in the inverter switches.

These signals can be combined with current signals, in

pairs, as indicated on Table VII.

For example, the expression (8) is a combination of

voltage and current diagnostic signals, the measured values

for which are shown in Table VIII, for the sampling times

where SC faults occur.

CSC = i3.i4.vg3.vg4 (8)

TABLE VIII

Example of combination of signals, CSC = i3.i4.vg3.vg4.

ta i3 i4 vg3 vg4 δδδδ

t4 ISC 0 1 0 SC (S1)

t4 0 ISC 0 1 SC (S2)

t1 ISC 0 0 0 SC (S3)

t2 ISC 0 0 1 SC (S3)

t2 0 ISC 0 0 SC (S4)

t3 0 ISC 1 0 SC (S4)

Diagnosis variables are retaken from Table VIII and they

are assigned other names according to (9).

In addition, ISC is assigned the logical value 1 and thereby is

obtained Table IX.

i3 = A, i4 = B, vg3= C e vg4 = D (9)

TABLE IX

Simplified diagnosis for SC faults. Diagnostic signals

δδδδ A B C D

1 0 1 0 SC (S1)

0 1 0 1 SC (S2)

1 0 0 0 SC (S3)

1 0 0 1 SC (S3)

0 1 0 0 SC (S4)

0 1 1 0 SC (S4)

The diagnostic function δ in Table IX is then the sum of

products according to the expression (10).

__ __ __ __ __ __ __

__ __ __ __ __ __ __

δ = A.B.C.D + A.B.C.D + A.B.C.D +

+ A.B.C.D + A.B.C.D + A.B.C.D

(10)

After simplifying it, expression (11) is obtained.

__ __ __ __ __ __ __

δ = A.B.C + A.B.D + A.B.C + A.B.D (11)

The function δ is performed with basic logic circuits.

Figure 5 shows the complete circuit for the function δ where

AND and OR gates are used.

1111

Fig. 5. Logic circuit for SC faults detection.

This circuit indicates all situations of isolated short circuit

faults in the inverter, where the current situation in each fault

is limited to ISC = 2.iN.

The waveforms of the diagnosis signals and the voltage

output of the logic circuit (δ function) are shown in Fig. 6. In

this figure the sampling times of the diagnosis signals in

accordance with Tables II, III, IV and V (individual short

circuit faults) are also indicated.

IV. CONCLUSION

A new proposal of FD for short-circuit switches, in a

single-phase full-bridge inverter, was presented in this

article. The SC current in the switches constitutes essential

information in the FD of SC, and for this reason, a current

limiter is inserted in the inverter. Its function is to set limits

for the SC current of the switches.

Using sampled values of the control voltages, of the

currents in the load and on the switches, tables were created

that describe the behavior of the inverter in normal (N) or

short-circuit (SC) operation. And they enable the

construction of FD rules.

From combinations of essential variables logic circuits

that detect and locate short circuit faults in the inverter

switches were constructed.

This proposal, compared to other techniques, is an

alternative, the final result of which, is the system for

detection and location of SC faults that can be built by

logical blocks. The results obtained by simulation confirm

the strategy proposed for the FD of SC switches in the

inverter.

ACKNOWLEDGEMENT

The authors would like to thank the Diretoria de

Planejamento e Gestão (DPG) – CEFET-MG, and the

Federal University of Itajubá, for the financial support.

REFERENCES

[1] B. K. Bose, Modern Power Electronics and AC Drives,

Upper Saddle River - NJ: Prentice Hall Inc., 2002.

[2] J. Zhu and X. Niu, "Investigation of Short-circuit Fault

in a Fault-Tolerant Brushless Permanent Magnet AC

Motor Drive with Redundancy," in 5th IEEE

Conference on Industrial Electronics and Applications,

pp. 1238-1242, 2010.

[3] S. Yang, D. Xiang, A. Bryant, P. Mawby, L. Ran and P.

Tayner, "Condition Monitoring for Device Reliability in

Power Electronic Converters," IEEE Transactions on

Power Electronics, pp. 2734-2752, 2010.

Fig. 6. Waveforms of trigger voltages and of the currents in the switches of the inverter and respective

indications for SC faults - logic circuit diagnosis response (δSC).

i3

not_i4

g3

i3

not_i4

not_g4

not_i3

i4

not_g3

not_i3

i4

not_g4

Short Circuit

Indication

Time

20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms

V(R_FD_SC:2)

0V

2.5V

5.0V

I(S3:3)+ I(T3_on:2)+10 I(S4:3)+ I(T4_on:2)

0A

20A

I(S1:3)+ I(T1_on:2)+10 I(S2:3)+ I(T2_on:2)

-5A

20A

SEL>>

V(g1)+22.5 V(g2)+15 V(g3)+7.5 V(g4)

0V

10V

20V

30V

t1 t2 t3 t4 t1 t1 t2 t3 t4 t1 t1 t2 t3 t4 t1t1 t2 t3 t4 t1

vg1

vg2

vg3

vg4

δ

i1

i2

i3

i4

Normal operation (N) SC (S1) Normal Op.(N) SC (S2) Normal Op.(N) SC (S3) Normal Op.(N) SC (S4) Normal Op.(N)

δ

1112

[4] S. Yang, A. Bryant, P. Mawby, D. Xiang, L. Ran and

P. Tavner, "An Industry-Based Survey of Reliability in

Power Electronic Converters," IEEE Transactions on

Industry Applications, pp. 1441-1451, 2011.

[5] K. Debebe, V. Rajagopalan and T. S. Sankar,

"Diagnosis and monitoring for AC drives," in Industry

Applications Society Annual Meeting, 1992.,

Conference Record of the IEEE, pp. 370-377, vol. 1,

1992.

[6] D. Kastha and B. Bose, "Investigation of fault modes

of voltage-fed inverter system for induction motor

drive," in Conference Record of the IEEE Industry

Applications Society Annual Meeting, pp. 858-866,

vol.1, 1992.

[7] M. A. Rodriguez, A. Claudio and D. Theilliol, "A

novel strategy to replace the damaged element for

fault-tolerant induction motor drive," in 11th IEEE

Power Electronics Congress, CIEP, pp. 123-127,

2008.

[8] M. A. Rodríguez, A. Claudio, D. Theilliol and L. G.

Vela, "A New Fault Detection Technique for IGBT

Based on Gate Voltage Monitoring," in IEEE Power

Electronics Specialists Conference, PESC, pp. 1001-

1005, 2007.

[9] M.-S. Kim, R.-Y. Kim and B. G. a. H. D. S. Park, "A

novel fault detection circuit for short-circuit faults of

IGBT," in Twenty-Sixth Annual IEEE Applied Power

Electronics Conference and Exposition (APEC), pp.

359-363, 2011.

[10] S. Khomfoi and L. Tolbert, "Fault Diagnosis and

Reconfiguration for Multilevel Inverter," IEEE

Transactions on Industrial Electronics, vol. 54, pp.

2954-2968, 2007.

[11] M. A. Masrur, "Intelligent diagnosis of open and

short circuit faults in electric drive inverters for real-

time applications," Power Electronics, IET, no.

March, pp. 279-291, 2010.

[12] G. Mahmoud, M. Masoud and I. El-Arabawy,

"Inverter Faults In Variable Voltage Variable

Frequency Induction Motor Drive," Compatibility in

Power Electronics, CPE, pp. 1-6, 1 May-June 2007.

[13] F. Khater, M. El-Sebah, M. Abu El-Sebah and M.

Osama, "Fault Diagnostics in an Inverter Feeding an

Induction Motor," in The International Conference

on Electrical Engineering, ICEE, Okinawa, Japan,

pp. 1-6, 2008.

[14] B. M. Gonzáles-Contreras, L. Rullán-Lara, A. S.

Claudio and L. G. Vela-Valdés, "Modelling,

Simulation and Fault Diagnosis of the Three-Phase

Inverter Using Bond Graph," in IEEE International

Symposium on Industrial Electronics, ISIE, pp. 130-

135, 2007.

1113

[IEEE 2013 Brazilian Power Electronics Conference (COBEP 2013) - Gramado, Brazil...

Documents

Transcript of [IEEE 2013 Brazilian Power Electronics Conference (COBEP 2013) - Gramado, Brazil...