A New Modulation Strategy for Capacitor Voltage Balancing in Three-Level NPC Inverters

Based on Matrix Converter Theory Apichart Saengseethong Somboon Sangwongwanich

Dept. of Electrical Engineering, Faculty of Engineering, Chulalongkorn University Payatai, Bangkok 10330, Thailand e-mail: somboona@chula.ac.th

Abstract--This paper presents a new modulation strategy for capacitor voltage balancing in three-level neutral-point-clamped inverters by applying the matrix converter theory to eliminate the low frequency oscillation of the neutral-point voltage and current. The proposed modulation method controls the neutral-point current without affecting the averaged output voltage and current. The behavior of the new modulation technique turns out to be a combination of two-phase unipolar PWM and one-phase dipolar PWM. The proposed PWM method yields a linear capacitor-voltage control loop, based on which the response time of capacitor voltage balancing can be precisely designed.

I. INTRODUCTION

The three-level neutral-point-clamped (NPC) inverter has now become a standard inverter topology for high power applications. The main task of PWM modulation for this type of inverter is to generate the required output voltage while keeping the two dc-bus voltages in balance. Though the PWM strategies to eliminate or control the neutral-point voltage have been extensively investigated, the complete solution is still not achieved.

For the unipolar PWM, the averaged neutral-point current contains triplen harmonics of the output frequency, and this causes the oscillation of the neutral-point voltage [1]-[8]. Typically, by adjusting the zero voltage, one can suppress the low frequency drift of the neutral-point voltage or current but not its triplen harmonic components [2][3]. Although using the output current information, one can adjust the zero voltage to perfectly suppress the neutral-point current (averaged over one switching period), but only for a limited operating region [4].

Some space-vector PWM strategies [5] have also been proposed to solve this problem. However, the modulation method is rather complicated and cannot be applied correctly when the capacitor voltages are unbalanced.

A carrier-based PWM strategy which controls the triplen harmonics of the neutral-point current by adjusting the duty cycle of the middle-phase output voltage, was proposed in [6]. However, the relationship between the neutral-point current and the adjusted duty cycle is nonlinear and unclear, making it difficult to design the dc-bus control loop. In addition, since only the duty cycle of the middle phase is allowed to be adjusted, the capability to adjust the neutral-point current is limited.

To solve many disadvantages of the PWM strategies

aforementioned, the following issues are presented in this paper.

• It is proposed that the three-level NPC inverter be viewed as a special case of the matrix converter as shown in Fig. 1. This allows several important research results of the matrix converter to be applicable to the three-level inverter.

• To achieve the broadest framework for analysis, a generalized PWM strategy for the three-level inverter will be introduced. This generalized PWM is derived from the general form of modulation matrices of the matrix converter presented in [9].

• Dipolar PWM [7][8] will be adopted instead of the restricted unipolar PWM, to make it possible to suppress or control the neutral-point current without limitation on operating regions.

• With the generalized PWM strategy, the neutral-point current will be proportional to the modulation free parameters. The capacitor–voltage control loop then becomes linear and easy to design.

uv

vv

wv

vs

us

ws

nv

pv

ov

Fig. 1. A three-level NPC inverter viewed as a matrix converter.

Virtual ground

p

n

o

2C

1C1Cv

2Cv

oi

1us

2us

3us

4us

1vs

2vs

3vs

4vs

1ws

2ws

3ws

4ws

uvw

pv

ov

nvuvw

uS vS wS

2Cv

1Cv

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978-1-4244-5393-1/10/$26.00 ©2010 IEEE

II. GENERALIZED PWM METHOD FOR NPC INVERTERS

A. Three-Level NPC Inverters as Matrix Converters Referred to a virtual reference point, the dc-bus

voltages 1 2[ ,0, ]C Cv v− become balanced input voltages

[ , , ]p o nv v v as shown in (1). It is now possible to consider the three-level NPC inverter as a special case of a matrix converter (Fig. 1), whose output voltages [ , , ]u v wv v v is constructed from the three dc-bus voltages [ , , ]p o nv v vthrough a modulation matrix [ ]ijm=M . The equations for the output voltages and the dc-bus currents are given by (2) and (3), respectively.

[ ] [ ]1 21 20 1 1 1

3T T TC C

p o n C Cv vv v v v v −= − − . (1)

*

*

*

u u z up uo un p p

v v z vp vo vn o o

w w z wp wo wp n n

v v v m m m v vv v v m m m v vv v v m m m v v

+= + = =

+M (2)

where zv is the injected zero voltage, ‘*’ denotes the commanded value, and the duty cycles 0 1, 1ij ij

j

m m≤ ≤ = for { , , }, { , , }i u v w j p o n= = .

p up vp wp u u

o uo vo wo v v

n un vn wp w w

i m m m i ii m m m i ii m m m i i

= = TM . (3)

In [9] it is derived that the general form of the modulation matrix M satisfying (2), which covers all the eligible modulation matrices, is given by (4)-(6).

0 U P Q 0′= + = + + +M M M M M M M (4)

up uo un up uo un

vp vo vn vp vo vn

wp wo wn wp wo wn

m m m m m m x y zm m m m m m x y zm m m m m m x y z

′ ′ ′′ ′ ′= +′ ′ ′

(5)

where 0; 1ip io inm m m x y z′ ′ ′+ + = + + = .

[ ]

*

*U 2

*

*

*P 2

*

* *

* *Q 2

* *

0 zero-voltage matrix

1

3

3

111

u

v p o ni

w

u

v o n n p p oi

w

v w

w u o n n p p oi

u v

vv v v vv

va v v v v v v v

v

v vb v v v v v v v v

v v

x y z

=

= − − −

−= − − − −

−

= =

Mv

Mv

Mv

M

(6)

Here 2 2 2 2i p o nv v v= + +v . ‘a’ and ‘b’ are the modulation

free parameters, and the parameters x,y,z determine the zero voltage injected by the matrix

0M . Each specific PWM method corresponds to particular values of the parameters a,b,x,y,z.

B. Double-Carrier-Based Dipolar PWM From (2) and (5) the output voltages referred to the dc-bus midpoint ‘o’ can be written as (7). From (6) the modulation functions

ijm can be rewritten in terms of the commanded output and dc-bus voltages as (8) and (9). From (7)-(9), the PWM switching signals can be then generated using the double-carrier-based dipolar PWM method as shown in Fig. 2.

1 2

( ) ( )

( )( )( )

uo u o up un

vo v o vp p o vn o n

wo w o wp wn

up un

vp C vn C

wp wn

v v v m mv v v m v v m v vv v v m m

m x m zm x v m z vm x m z

− −= − = − + − −

− −

′ ′+ − +′ ′= + + − +′ ′+ − +

(7)

* * *

2* * *2

2 2* * *

33

up u v wp CC

vp v w ui i

wp w u v

am v v vv vb vm v v v

m v v v

′ −+⋅′ = + −

′ −v v(8)

* * *

1* * *1

2 2* * *

33

un u v wn CC

vn v w ui i

wn w u v

am v v vv vb vm v v v

m v v v

′ −+⋅′ = + −

′ −v v (9)

Depending on the zero-voltage matrix 0M (i.e. the parameters x,y,z), the PWM pattern for each output phase can be either non-switching(n), bipolar(b), unipolar(u) or dipolar(d) as shown in Fig.2. An integer and symbols ‘n’ ‘u’ ‘d’ or ‘b’ will be used to represent the generated three-phase PWM pattern or mode. To reduce the switching number, the zero-voltage matrix 0M is chosen according to (10). This results in unipolar PWM for two phases and dipolar PWM for one phase. This switching pattern is denoted as <2u1d> PWM mode.

( )( )

min , ,

min , ,up vp wp

un vn wn

x m m m

z m m m

′ ′ ′= −

′ ′ ′= − . (10)

Therefore, it can be summarized that giving the commanded output voltages * * *[ , , ]u v wv v v and the measured dc-bus voltages 1 2[ , ]C Cv v , the PWM signals can be generated directly by the double-carrier-based dipolar PWM method based on (8)-(10).

III. NEUTRAL-POINT VOLTAGE CONTROL

In the matrix converter theory, the input current can be simultaneously controlled along with the output voltage.

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However, unlike the unity power factor requirement of the matrix converter, for the three-level inverter the two free parameters ‘a’ and ‘b’ will be used to control the neutral-point current.

From (3) and (6) it can be derived that the neutral-point current is given by (11).

( )

( )

* * *2

* * * * * *2

13

3

u

o o p n u v w vi

w

up n

v w w u u v vi

w

iai v v v v v v i

i

ib v vv v v v v v i

i

= − −

−− − − −

v

v

2

13 3o o d o d o

i

a bi v E p E q= − +v

(11)

where dE is the dc-bus voltage, op and oq are the output active and reactive powers, respectively:

[ ]* * * To u v w u v wp v v v i i i=

[ ]* * * * * *(1/ 3) To v w w u u v u v wq v v v v v v i i i= − − − − .

Zero neutral-point current is obtained when choosing

2 10

3 , 03

o C C

d d

v v va a bE E

−= = = = . (12)

When the dc-bus voltages are balanced, both ‘a’ and ‘b’will be zero ( 0 0a a b= = = ). On the contrary, when the dc-bus voltages are unbalanced, (12) will only keep the imbalance because of the zero neutral-point current. Therefore for the unbalanced case, in addition to (12), the modulation parameters ‘a’ and ‘b’ must be further adjusted to obtain a suitable neutral-point current to charge or discharge the capacitors. Equation (11) shows clearly that the output active and reactive powers affect the neutral-point current linearly

through the modulation parameters whose respective gains are given in (13) and (14).

( )2 23 3

o p no o da

i i

p v vi p EKa

−∂ = = − = −∂ v v

(13)

( )2 23 3

o p no o db

i i

q v vi q EKb

−∂ = = =∂ v v

(14)

The neutral-point current can be then controlled by adjusting either the modulation parameter ‘a’ or ‘b’ or both via a dc-bus control loop as shown in Fig. 3 with

1 2C C Cv v vΔ = − . Since the control loop is linear, the control bandwidth bω (or the response time) can be precisely designed through the proportional controller’s gain PK in (15) or (16), where C is the capacitance of the capacitors 1 2,C C . However, in real implementation a small integral gain may be needed to deal with the parasitic elements not included in Fig. 3.

bp

a

CKK

ω= (15), bp

b

CKK

ω= (16)

oa

oiaK

0+

−pK 1

sCcvΔ

++

1a

Controller

Inverter

Capacitor

a

(a) Using modulation parameter ‘a’

oa

oi

aK

0+

−pK 1

sCcvΔ

bK+

+b

Controller

Inverter

Capacitor

(b) Using modulation parameter ‘b’

Fig. 3. Capacitor voltage balancing control through the modulation parameters.related to the output active and reactive powers.

bipolar switching (denoted by ‘b’) [ 1]ip inm m+ =

1Cv0

1

0

1−

non-switching (denoted by ‘n’)

[ 1or 1]ip inm m= =

unipolar switching (denoted by ‘u’)

[ 0or 0]ip inm m= =

dipolar switching (denoted by ‘d’) [ , 0]ip inm m ≠

ipm

[ ]nv

0[ ]v

[ ]pv

Fig. 2. Double-carrier-based dipolar PWM for generating switching signals.

iv2Cv−

inm−ipm

inm−

ipm

inm−ipm

inm−

ipm

inm−

ipm

inm−

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IV. SIMULATION AND EXPERIMENT WITH DISCUSSIONS

Simulation and experiment have been carried out to verify the validity of the theoretical results. Simulation conditions are given in Table I. Three operating conditions will be investigated as shown in Fig. 4, wherein the shaded area is the allowable region for the unipolar PWM (<3u> PWM) with zero neutral-point current [4]. Comparison is made among the proposed <2u1d> PWM and the PWM methods in [3] and [4].

Fig. 4. Possible modulation region (shaded area) for unipolar PWM with zero neutral-point current [4].

TABLE IPARAMETERS FOR SIMULATION

NPCINVERTER

switching frequency = 4 kHz, dc bus=540 V,

40 rad/sbω = , dc-bus capacitor 220C Fμ=

RL LOAD2R = Ω , 24 L mH= , 50 Hz

with internal EMF

OPERATING POINT rmsV [ ]V ACTIVE POWER

[ ]op WREACTIVE POWER

[ ]oq Var156 1300 970 156 970 1300 220 200 2300

Figs. 5 (a)-(c) are the simulation results when the operating point is within the possible <3u> PWM region and with the capacitor voltages initially unbalanced. ,o avi is the neutral-point current averaged over one switching period. All the PWM methods can bring the capacitor voltages to a balanced condition without disturbing the averaged output voltage and current. During transient, the modulation functions

,up unm m in Figs. 5(a) and 5(c) look similar, but the ones in Fig. 5(a) vary more smoothly, and nonlinear response in the neutral-point current can be observed in Fig. 5(c). The modulation functions in Fig. 5(b) behave quite differently from others.

Figs. 6(a)-(c) are the results when the operating point lies just outside the possible <3u> PWM region. The

results in Fig. 6(b) also confirm this operating limit of the <3u> PWM. In this case, both the proposed PWM method and the PWM method in [3] still behave in the same manner as in Figs. 5(a) and 5(c). Finally, from the

-180 -90 0 90 180Power factor angle (deg)

1.21.11.00.90.80.70.60.5

Mod

ulat

ion

inde

x

12

3

ui

,o avi

1 2,C Cv v

upm

uov

unm

ui

,o avi

1 2,C Cv v

upm

uov

unm

ui

,o avi

1 2,C Cv v

upm

uov

unm

(a) Proposed PWM method using modulation parameter ‘a’

(b) PWM method in [4]

(c) PWM method in [3]

Fig. 5. Simulation results at the operating point in Fig. 4.

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steady-state simulation in Figs. 7(a)-(c) where the modulation index is at maximum and lies outside the <3u> PWM area (point ), the results are similar to those in Fig. 6.

It can be concluded from the simulation results that the proposed PWM method and the PWM method in [3] work well to the maximum modulation index without any limitations. However, the response with the proposed <2u1d> PWM method is linear, and the response time is precisely obtained as designed (about 25 ms corresponding to 40 rad/s bandwidth).

To finally verify the feasibility of the proposed PWM algorithm in the motor drive system, experiment is setup as shown in Table II. From Figs. 8 and 9, the generated <2u1d> PWM waveforms and the corresponding modulation functions are the same as those obtained in the simulation. It is clearly seen that two phases are in unipolar mode while one phase is in dipolar mode. The PWM mode in each phase changes every 60-degree interval.

The upper parts of Figs. 10 and 11 illustrate the transient responses of the capacitor-voltage control loop by adjusting the modulation parameters. The results confirm that from the initially unbalanced condition the capacitor voltages can be balanced smoothly within the designed response time of about 50ms (corresponding to 20 rad/s bandwidth). The steady-state waveforms are shown in the lower parts of the figures. The neutral-point current waveform and its spectrum indicate that the averaged current is zero and no triplen harmonics exist as theoretically expected. The dc-bus control methods through both modulation parameters ‘a’ and ‘b’ (related to the output active and reactive powers) are thus equally effective. Furthermore, the experimental results in Fig. 12 for the regenerative operation also confirm that the proposed PWM strategy works well under the operation in the regenerative region as well. Figs. 13 and 14 are the results when the operating frequency is varied to 50 Hz, and it is clear that the system works well too.

In conclusion, both simulation and experiment verify that the proposed PWM method works very well without any limitation on operating conditions. However, compared to the <3u> unipolar PWM, the additional degree of freedom which is gained from the dipolar PWM, has some disadvantage. Though it enables the proposed <2u1d> PWM method to control the neutral-point current without any restrictions, it introduces additional switching and losses. There is one solution to solve this problem. From the matrix converter theory, it is shown that by using the information of the output current, the switching number per switching period can be reduced to six (minimum). This result can be applied to the three-level NPC inverter as briefly explained as follows.

Using the output current information, the modulation matrix (4) can be rewritten as (17) [9].

0 U I N 0′= + = + + +M M M M M M M (17)

where the modulation matrices I N,M M are defined as shown in (18).

ui

,o avi

1 2,C Cv v

upm

uov

unm

ui

,o avi

1 2,C Cv v

upm

uov

unm

ui

,o avi

1 2,C Cv v

upm

uov

unm

(a) Proposed PWM method using modulation parameter ‘a’

(b) PWM method in [4]

(c) PWM method in [3]

Fig. 6. Simulation results at the operating point in Fig. 4.

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1I 2

2N 2

3

3

u

v o n n p p oi

w

v w

w u o n n p p oi

u v

ik i v v v v v v

i

i ik i i v v v v v v

i i

= − − −

−= − − − −

−

Mv

Mv

. (18)

The new modulation parameter 1k affects only the neutral-point current and not the output voltages as shown in (19). Therefore, it can be used to control the neutral-point current without disturbing the output voltages and currents.

( )[ ]

( ) [ ]

12

22

13

3

u

o o o p n u v w vi

w

up n

v w w u u v vi

w

iki v p v v i i i i

i

ik v vi i i i i i i

i

= − −

−− − − −

v

v

212

1 i3o o o o d

i

ki v p E= −v

(19)

where 2 2 2 2io u v wi i i= + + .

On the other hand, the modulation parameter 2k has no effects on both the output voltages and the neutral-point current. However, it can be used to adjust the modulation functions to achieve a special <1n1u1d> PWM mode. In this PWM mode, one phase is clamped to the positive or negative bus, and the total number of switching becomes six and is equal to that of the <3u> PWM. However, unlike the <3u> PWM, it can be shown that there is no restriction on the operating condition for the <1n1u1d> PWM. Detail analysis will be the topic of the subsequent research.

V. CONCLUSIONS

A novel approach to solve the capacitor voltage balancing problem of the three-level inverter is proposed in this paper. The main idea is to consider the three-level inverter as a special case of a matrix converter with the requirement to control the neutral-point current rather than the input power factor as in the matrix converter theory. By applying the new modulation theory of the matrix converter, it is possible to control the neutral-point current as designed without any restriction on the operating condition as found in the unipolar PWM method. The new PWM method is a combination of the unipolar and dipolar PWM modes. Since the capacitor-voltage control loop is perfectly linear, the design is very simple and a precise response time can be assigned. The theoretical results are verified by simulation and experiment, and the feasibility of the proposed PWM method is confirmed.

ui

,o avi

1 2,C Cv v

upm

uov

unm

ui

,o avi

1 2,C Cv v

upm

uov

unm

ui

,o avi

1 2,C Cv v

upm

uov

unm

(a) Proposed PWM method using modulation parameter ‘a’

(b) PWM method in [4]

(c) PWM method in [3]

Fig. 7. Simulation results at the operating point in Fig. 4.

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TABLE II PARAMETERS FOR EXPERIMENTAL SETUP

Fig. 8. Modulation functions for the proposed <2u1d> PWM.

Fig. 9. Output voltage waveforms for the proposed <2u1d> PWM.

Fig. 10. Balancing of capacitor voltages through the output active power when the motor is running at 25 Hz.

Fig. 11. Balancing of capacitor voltages through the output reactive power when the motor is running at 25 Hz.

NPC Inverter: switching frequency = 4 kHz, dc bus=560-590 V, 20 rad/sbω = dc-bus capacitor 750C Fμ=Motor load: 4 Hp 380 V 50 Hz 4 poles 1420 RPM

neutral-point current and its spectrum

8

6

4

2

Cur

rent

[A]

0 1000 2000 3000 4000 5000Frequency [Hz]

10 ms/div

0-

( )1 2 100V/divC Cv v−

( )1 100V/divCv

( )2 100V/divCv

( )10A/divui

( )250V/divuov0-

0-

50 ms/div

( )5A/divoi

( )1 100V/divCv

( )2 100V/divCv

( )10A/divui

( )250V/divuov0-

0-

( )1 2 100V/divC Cv v−

50 ms/div

( )5A/divoi 10 ms/div

0-

8

6

4

2

Cur

rent

[A]

0 1000 2000 3000 4000 5000Frequency [Hz]

neutral-point current and its spectrum

upm

unm−

5ms/div

0-

0-

(250V/div)uov

:10ms/divX

wov

uov

vov

Y:250V/div

0-

0-

0-

:1ms/divXY:250V/div

wov

uov

vov

0-

0-

0-

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Fig. 12. Balancing of capacitor voltages through the output active power when the motor is running at 25 Hz - regenerative mode.

Fig. 13. Balancing of capacitor voltages through the output active power when the motor is running at 50 Hz.

Fig. 14. Balancing of capacitor voltages through the output reactive power when the motor is running at 50 Hz.

REFERENCES

[1] A. Nabae et al., “A New Neutral-Point-Clamped PWM Inverter,” IEEE Trans. on Ind. Appl., vol. 17, no. 5, 1981, pp. 518–523.

[2] S. Ogasawara and H. Akagi, “Analysis of variation of neutral point potential in neutral-point-clamped voltage source PWM inverters,” in Conf. Rec. IEEE/IAS Annu. Meeting, vol. 2, 1993, pp. 965-970.

[3] N. Celanovic and D. Borojevich, “A Comprehensive Study of Neutral-Point Voltage Balancing Problem in Three-Level Neutral-Point-Clamped Voltage Source PWM Inverters,” IEEE Trans. on Power Electronics, vol. 15, no. 2, 2000, pp. 242-249.

[4] Q. Song et al., “A Neutral-Point Potential Balancing Algorithm for Three-Level NPC Inverters Using Analytically Injected Zero-Sequence Voltage,” in Proc. of APEC, 2003, vol. 1, pp. 1572-1580.

[5] S. Busquets-Monge et al, “The Nearest Three Virtual Space Vector PWM - A Modulation for the Comprehensive Neutral-Point Balancing in the Three-Level NPC Inverter,” IEEE Power Electronics Letters, vol. 2, issue 1, 2004, pp. 11-15.

[6] J. Pou, et al., “Fast-Processing Modulation Strategy for the Neutral-Point-Clamped Converter With Total Elimination of Low-Frequency Voltage Oscillations in the Neutral Point,” IEEE Trans. on Ind. Elec., vol. 54 , no. 4, 2007, pp. 2288-2294.

[7] R. M. Tallam et al, “A Carrier-Based PWM Scheme for Neutral-Point Voltage Balancing in Three-Level Inverters,” IEEE Trans. on Ind. Appl., vol. 41, no. 6, 2005, pp. 1734-1743.

[8] B.Velaerts et al., “A novel approach to the generation and optimization of three-level PWM wave forms,” in Proc. of PESC, 1988, vol. 2, pp. 1255-1262.

[9] P. Kiatsookkanatorn and S. Sangwongwanich, “A Unified PWM Strategy for Matrix Converters and Its Dipolar PWM Realization,” to be published in Proc. of IPEC-Sapporo, 2010.

( )1 100V/divCv

( )2 100V/divCv

( )10A/divui

( )250V/divuov0-

0-

( )1 2 100V/divC Cv v−

5 ms/div

( )2A/divoi 5 ms/div

0-

0 1000 2000 3000 4000 5000Frequency [Hz]

1.2

0.8

0.4Cur

rent

[A] neutral-point current and

its spectrum

neutral-point current and its spectrum

0 1000 2000 3000 4000 5000Frequency [Hz]

5 ms/div

0-

( )1 2 100V/divC Cv v−( )2 100V/divCv

( )10A/divui

( )250V/divuov0-

0-

5 ms/div

( )2A/divoi

( )1 100V/divCv

1.2

0.8

0.4 Cur

rent

[A]

neutral-point current and its spectrum

4

3

2

1

Cur

rent

[A]

0 1000 2000 3000 4000 5000Frequency [Hz]

10 ms/div

0-

( )1 2 100V/divC Cv v−

( )1 100V/divCv

( )2 100V/divCv

( )10A/divui

( )250V/divuov0-

0-

50 ms/div

( )5A/divoi

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