ICM7216

17
9-10 Features All Versions Functions as a Frequency Counter (DC to 10MHz) Four Internal Gate Times: 0.01s, 0.1s, 1s, 10s in Frequency Counter Mode Directly Drives Digits and Segments of Large Multi- plexed LED Displays (Common Anode and Common Cathode Versions) Single Nominal 5V Supply Required Highly Stable Oscillator, Uses 1MHz or 10MHz Crystal Internally Generated Decimal Points, Interdigit Blanking, Leading Zero Blanking and Overflow Indication Display Off Mode Turns Off Display and Puts Chip Into Low Power Mode Hold and Reset Inputs for Additional Flexibility Features ICM7216A and ICM7216B Functions Also as a Period Counter, Unit Counter, Frequency Ratio Counter or Time Interval Counter 1 Cycle, 10 Cycles, 100 Cycles, 1000 Cycles in Period, Frequency Ratio and Time Interval Modes Measures Period From 0.5μs to 10s Features ICM7216D Decimal Point and Leading Zero Banking May Be Externally Selected. Description The ICM7216A and ICM7216B are fully integrated Timer Counters with LED display drivers. They combine a high frequency oscillator, a decade timebase counter, an 8-decade data counter and latches, a 7-segment decoder, digit multiplexers and 8-segment and 8-digit drivers which directly drive large multiplexed LED displays. The counter inputs have a maximum frequency of 10MHz in frequency and unit counter modes and 2MHz in the other modes. Both inputs are digital inputs. In many applications, amplification and level shifting will be required to obtain proper digital signals for these inputs. The ICM7216A and ICM7216B can function as a frequency counter, period counter, frequency ratio (f A /f B ) counter, time interval counter or as a totalizing counter. The counter uses either a 10MHz or 1MHz quartz crystal timebase. For period and time interval, the 10MHz timebase gives a 0.1μs resolution. In period average and time interval average, the resolution can be in the nanosecond range. In the frequency mode, the user can select accumulation times of 0.01s, 0.1s, 1s and 10s. With a 10s accumulation time, the frequency can be displayed to a resolution of 0.1Hz in the least significant digit. There is 0.2s between measurements in all ranges. The ICM7216D functions as a frequency counter only, as described above. All versions of the ICM7216 incorporate leading zero blanking. Frequency is displayed in kHz. In the ICM7216A and ICM7216B, time is displayed in μs. The display is multiplexed at 500Hz with a 12.2% duty cycle for each digit. The ICM7216A is designed for common anode displays with typical peak segment currents of 25mA. The ICM7216B and ICM7216D are designed for common cathode displays with typical peak segment currents of 12mA. In the display off mode, both digit and segment drivers are turned off, enabling the display to be used for other functions. Ordering Information PART NUMBER TEMP. RANGE ( o C) PACKAGE PKG. NO. ICM7216AlJl -25 to 85 28 Ld CERDIP F28.6 ICM7216BlPl -25 to 85 28 Ld PDIP E28.6 ICM7216DlPl -25 to 85 28 Ld PDIP E28.6 August 1997 ICM7216A, ICM7216B, ICM7216D 8-Digit, Multi-Function, Frequency Counters/Timers File Number 3166.1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

Transcript of ICM7216

Page 1: ICM7216

9-10

Features All Versions• Functions as a Frequency Counter (DC to 10MHz)

• Four Internal Gate Times: 0.01s, 0.1s, 1s, 10s inFrequency Counter Mode

• Directly Drives Digits and Segments of Large Multi-plexed LED Displays (Common Anode and CommonCathode Versions)

• Single Nominal 5V Supply Required

• Highly Stable Oscillator, Uses 1MHz or 10MHz Crystal

• Internally Generated Decimal Points, Interdigit Blanking,Leading Zero Blanking and Overflow Indication

• Display Off Mode Turns Off Display and Puts Chip IntoLow Power Mode

• Hold and Reset Inputs for Additional Flexibility

Features ICM7216A and ICM7216B• Functions Also as a Period Counter, Unit Counter,

Frequency Ratio Counter or Time Interval Counter

• 1 Cycle, 10 Cycles, 100 Cycles, 1000 Cycles in Period,Frequency Ratio and Time Interval Modes

• Measures Period From 0.5 µs to 10s

Features ICM7216D• Decimal Point and Leading Zero Banking May Be

Externally Selected .

DescriptionThe ICM7216A and ICM7216B are fully integrated TimerCounters with LED display drivers. They combine a highfrequency oscillator, a decade timebase counter, an8-decade data counter and latches, a 7-segment decoder,digit multiplexers and 8-segment and 8-digit drivers whichdirectly drive large multiplexed LED displays. The counterinputs have a maximum frequency of 10MHz in frequencyand unit counter modes and 2MHz in the other modes. Bothinputs are digital inputs. In many applications, amplificationand level shifting will be required to obtain proper digitalsignals for these inputs.

The ICM7216A and ICM7216B can function as a frequencycounter, period counter, frequency ratio (fA/fB) counter, timeinterval counter or as a totalizing counter. The counter useseither a 10MHz or 1MHz quartz crystal timebase. For periodand time interval, the 10MHz timebase gives a 0.1µsresolution. In period average and time interval average, theresolution can be in the nanosecond range. In the frequencymode, the user can select accumulation times of 0.01s, 0.1s,1s and 10s. With a 10s accumulation time, the frequencycan be displayed to a resolution of 0.1Hz in the leastsignificant digit. There is 0.2s between measurements in allranges.

The ICM7216D functions as a frequency counter only, asdescribed above.

All versions of the ICM7216 incorporate leading zeroblanking. Frequency is displayed in kHz. In the ICM7216Aand ICM7216B, time is displayed in µs. The display ismultiplexed at 500Hz with a 12.2% duty cycle for each digit.The ICM7216A is designed for common anode displays withtypical peak segment currents of 25mA. The ICM7216B andICM7216D are designed for common cathode displays withtypical peak segment currents of 12mA. In the display offmode, both digit and segment drivers are turned off,enabling the display to be used for other functions.

Ordering Information

PART NUMBERTEMP.

RANGE (oC) PACKAGEPKG.NO.

ICM7216AlJl -25 to 85 28 Ld CERDIP F28.6

ICM7216BlPl -25 to 85 28 Ld PDIP E28.6

ICM7216DlPl -25 to 85 28 Ld PDIP E28.6

August 1997

ICM7216A, ICM7216B,ICM7216D

8-Digit, Multi-Function,Frequency Counters/Timers

File Number 3166.1CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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PinoutsICM7216A

COMMON ANODE(CERDIP)TOP VIEW

ICM7216BCOMMON CATHODE

(PDIP)TOP VIEW

ICM7216DCOMMON CATHODE

(PDIP)TOP VIEW

CONTROL INPUT

INPUT B

FUNCTION INPUTDECIMAL POINT

SEG e OUTPUT

SEG g OUTPUT

SEG a OUTPUT

VSS

SEG d OUTPUT

SEG b OUTPUT

SEG c OUTPUT

SEG f OUTPUT

RESET INPUT

RANGE INPUT

INPUT A

OSC OUTPUT

OSC INPUT

EXT OSC INPUT

DIGIT 1 OUTPUT

DIGIT 3 OUTPUT

DIGIT 5 OUTPUT

VDD

DIGIT 6 OUTPUT

DIGIT 7 OUTPUT

DIGIT 8 OUTPUT

HOLD INPUT

DIGIT 2 OUTPUT

DIGIT 4 OUTPUT

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

OUTPUT

CONTROL INPUT

INPUT B

FUNCTION INPUT

DIGIT 1 OUTPUT

DIGIT 3 OUTPUT

DIGIT 2 OUTPUT

DIGIT 4 OUTPUT

VSS

DIGIT 5 OUTPUT

DIGIT 6 OUTPUT

DIGIT 7 OUTPUT

DIGIT 8 OUTPUT

RESET INPUT

RANGE INPUT

INPUT A

OSC OUTPUT

OSC INPUT

EXT OSC INPUTDECIMAL POINT

SEG e OUTPUT

SEG d OUTPUT

VDD

SEG b OUTPUT

SEG c OUTPUT

SEG f OUTPUT

HOLD INPUT

SEG g OUTPUT

SEG a OUTPUT

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

OUTPUT

CONTROL INPUT

MEASUREMENT IN PROGRESS

DIGIT 1 OUTPUT

DIGIT 3 OUTPUT

DIGIT 2 OUTPUT

DIGIT 4 OUTPUT

VSS

DIGIT 5 OUTPUT

DIGIT 6 OUTPUT

DIGIT 7 OUTPUT

DIGIT 8 OUTPUT

RESET INPUT

EX. DECIMAL POINT INPUT

RANGE INPUT

INPUT A

OSC OUTPUT

OSC INPUT

EXT OSC INPUT

DECIMAL POINT OUTPUT

SEG e OUTPUT

SEG d OUTPUT

VDD

SEG b OUTPUT

SEG c OUTPUT

SEG f OUTPUT

HOLD INPUT

SEG g OUTPUT

SEG a OUTPUT

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ICM7216A, ICM7216B, ICM7216D

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Functional Block Diagram

NOTES:

1. Function input and input B available on ICM7216A/B only.

2. Ext DP input and MEASUREMENT IN PROGRESS output available on ICM7216D only.

STORE ANDRESET LOGIC

REFERENCE

RANGE SELECT

DIGITDECODER

OSC

÷104 OR ÷105

RANGE

CONTROL

DP

DECODER SEGMENT

INPUT

INPUT

FN

MAIN

DRIVERS

COUNTER÷103

LOGIC

LOGIC

FF

CONTROLLOGIC

CONTROLLOGIC

CONTROLLOGIC

DATA LATCHES ANDOUTPUT MUX

MAIN÷103 COUNTER

SELECT

CONTROLLOGIC

LOGIC

DRIVERLOGIC

EXTOSC

INPUTOSC

INPUT

OSCOUTPUT

RESETINPUT

INPUT A

FUNCTIONINPUT

(NOTE 1)

D

CL

EN

CL OVERFLOW

STORE

100Hz

Q

HOLDINPUT

INPUT B(NOTE 1)

MEASUREMENTIN PROGRESSOUTPUT(NOTE 2)

SEGMENTOUTPUTS

EXTDPINPUT(NOTE 2)

CONTROLINPUT

RANGEINPUT

DIGITOUTPUTS(8)

(8)

3 8 8

5

6

4 7 8

6

4 4 4 4 4 4 4 4

ICM7216A, ICM7216B, ICM7216D

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Absolute Maximum Ratings Thermal InformationMaximum Supply Voltage (VDD - VSS). . . . . . . . . . . . . . . . . . . . 6.5VMaximum Digit Output Current . . . . . . . . . . . . . . . . . . . . . . . . 400mAMaximum Segment Output Current . . . . . . . . . . . . . . . . . . . . . 60mAVoltage On Any Input orOutput Terminal (Note 1) . . . . . . . . . . . .(VDD +0.3V) to (VSS -0.3V)

Operating ConditionsTemperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC

Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W)CERDIP Package . . . . . . . . . . . . . . . . 50 10PDIP Package . . . . . . . . . . . . . . . . . . . 55 N/A

Maximum Junction TemperatureCERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oCPDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oCMaximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationof the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. The ICM7216 may be triggered into a destructive latchup mode if either input signals are applied before the power supply is applied or ifinput or outputs are forced to voltages exceeding VDD to VSS by more than 0.3V.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications VDD = 5.0V, VSS = 0V, TA = 25oC, Unless Otherwise Specified

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

ICM7216A/B

Operating Supply Current, IDD Display Off, Unused Inputs to VSS - 2 5 mA

Supply Voltage Range (VDD -VSS), VSUPPLY INPUT A, INPUT B Frequency at fMAX 4.75 - 6.0 V

Maximum Frequency INPUT A, Pin 28, fA(MAX) Figure 9, Function = Frequency, Ratio,Unit Counter

10 - - MHz

Function = Period, Time Interval 2.5 - - MHz

Maximum Frequency INPUT B, Pin 2, fB(MAX) Figure 10 2.5 - - MHz

Minimum Separation INPUT A to INPUT B TimeInterval Function

Figure 1 250 - - ns

Maximum Oscillator Frequency and External OscillatorFrequency, fOSC

10 - - MHz

Minimum External Oscillator Frequency, fOSC - - 100 kHz

Oscillator Transconductance, gM VDD = 4.75V, TA = 85oC 2000 - - µS

Multiplex Frequency, fMUX fOSC = 10MHz - 500 - Hz

Time Between Measurements fOSC = 10MHz - 200 - ms

Input Voltages: Pins 2, 13, 25, 27, 28

Input Low Voltage, VINL - - 1.0 V

Input High Voltage, VlNH 3.5 - - V

Input Resistance to VDD Pins 13, 24, RIN VIN = VDD -1.0V 100 400 - kΩ

Input Leakage Pins 27, 28, 2, IILK - - 20 µA

Input Range of Change, dVlN/dt Supplies Well Bypassed - 15 - mV/µs

ICM7216A

Digit Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23

High Output Current, IOH VOUT = VDD -2.0V -140 -180 - mA

Low Output Current, IOL VOUT = VSS +1.0V - 0.3 - mA

Segment Driver: Pins 4, 5, 6, 7, 9,10, 11, 12

Low Output Current, IOL VOUT = VSS +1.5V 20 35 - mA

High Output Current, IOH VOUT = VDD -2.5V - -100 - µA

Multiplex Inputs: Pins 1, 3, 14

Input Low Voltage, VINL - - 0.8 V

Input High Voltage, VINH 2.0 - - V

Input Resistance to VSS, RIN VIN = VSS +1.0V 50 100 - kΩ

ICM7216A, ICM7216B, ICM7216D

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ICM7216B

Digit Driver: Pins 4, 5, 6, 7, 9, 10, 11, 12

Low Output Current, IOL VOUT = VSS +1.3V 50 75 - mA

High Output Current, IOH VOUT = VDD -2.5V - -100 - µA

Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23

High Output Current, IOH VOUT = VDD -2.0V -10 - - mA

Leakage Current, ISLK VOUT = VDD -2.5V - - 10 µA

Multiplex Inputs: Pins 1, 3, 14

Input Low Voltage, VINL - - VDD -2.0 V

Input High Voltage, VlNH VDD -0.8 - - V

Input Resistance to VDD, RIN VlN = VDD -2.5V 100 360 - kΩ

ICM7216D

Operating Supply Current, IDD Display Off, Unused Inputs to VSS - 2 5 mA

Supply Voltage Range (VDD -VSS), VSUPPLY INPUT A Frequency at fMAX 4.75 - 6.0 V

Maximum Frequency INPUT A, Pin 28, fA(MAX) Figure 9 10 - - MHz

Maximum Oscillator Frequency and External OscillatorFrequency, fOSC

10 - - MHz

Minimum External Oscillator Frequency, fOSC - - 100 kHz

Oscillator Transconductance, gM VDD = 4.75V, TA = 85oC 2000 - - µS

Multiplex Frequency, fMUX fOSC = 10MHz - 500 - Hz

Time Between Measurements fOSC = 10MHz - 200 - ms

Input Voltages: Pins 12, 27, 28

Input Low Voltage, VINL - - 1.0 V

Input High Voltage, VINH 3.5 - - V

Input Resistance to VDD, Pins 12, 24, RIN VIN = VDD -1.0V 100 400 - kΩ

Input Leakage, Pins 27, 28, IILK - - 20 µA

Output Current, Pin 2, IOL VOL = +0.4V 0.36 - - mA

Output Current, Pin 2, IOH VOH = VDD -0.8V 265 - - µA

Input Rate of Change, dVlN/dt Supplies Well Bypassed - 15 - mV/µs

Digit Driver: Pins 3, 4, 5, 6, 8, 9, 10, 11

Low Output Current, IOL VOUT = +1.3V 50 75 - mA

High Output Current, IOH VOUT = VDD -2.5V - 100 - µA

Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23

High Output Current, IOH VOUT = VDD -2.0V 10 15 mA

Leakage Current, ISLK VOUT = VDD -2.5V - - 10 µA

Multiplex Inputs: Pins 1, 13, 14

Input Low Voltage, VlNL - - VDD -2.0 V

Input High Voltage, VINH VDD -0.8 - - V

Input Resistance to VDD, RlN VIN = VDD -1.0V 100 360 - kΩ

Electrical Specifications VDD = 5.0V, VSS = 0V, TA = 25oC, Unless Otherwise Specified (Continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

ICM7216A, ICM7216B, ICM7216D

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Timing Diagram

Typical Performance Curves

FIGURE 2. fA(MAX), fB(MAX) AS A FUNCTION OF SUPPLY FIGURE 3. ICM7216A TYPICAL I DIG vs VDD-VOUT

MEASUREMENTIN PROGRESS(INTERNAL ON

7216A/B)

30ms TO 40ms

INTERNALSTORE

INTERNALRESET

INPUT A

INPUT B

PRIMING EDGES

PRIMING

FUNCTION:TIME INTERVAL

UPDATE190ms TO 200ms

40ms

60ms

40ms

MEASUREMENT INTERVAL

250ns MINMEASUREDINTERVAL

(FIRST)MEASUREDINTERVAL

(LAST)

UPDATE

NOTE:

1. If range is set to 1 event, first and last measured interval will coincide.

FIGURE 1. WAVEFORMS FOR TIME INTERVAL MEASUREMENT (OTHERS ARE SIMILAR, BUT WITHOUT PRIMING PHASE)

fA (MAX) FREQUENCY UNIT COUNTER,FREQUENCY RATIO MODES

fA (MAX) fB (MAX) PERIOD,TIME INTERVAL MODES

TA = 25oC

VDD-VSS (V)

FR

EQ

UE

NC

Y (

MH

z)

20

15

10

5

03 4 5 6

85oC

-20oC

4.5 ≤ VDD ≤ 6.0V300

200

100

00 1 2 3

VDD-VOUT (V)

I DIG

(m

A)

25oC

ICM7216A, ICM7216B, ICM7216D

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FIGURE 4. ICM7216B AND ICM7216D TYPICAL I SEG vs VDD-VOUT FIGURE 5. ICM7216A TYPICAL I SEG vs VOUT

FIGURE 6. ICM7216B AND ICM7216D TYPICAL I DIGIT vs VOUT FIGURE 7. ICM7216A TYPICAL I SEG vs VOUT

FIGURE 8. ICM7216B AND ICM7216D TYPICAL I DIGIT vs VOUT

Typical Performance Curves (Continued)

85oC

-20oC4.5 ≤ VDD ≤ 6V30

20

10

00 1 2 3

VDD-VOUT (V)

I SE

G (

mA

)

25oC

VDD = 5.5V

80

60

40

00 1 2 3

VOUT (V)

I SE

G (

mA

)

20

TA = 25oC

VDD = 4.5V

VDD = 5V

85oC

-20oCVDD = 5V200

150

100

00 1 2 3

VOUT (V)

I DIG

IT (

mA

)

25oC

50

85oC

-20oCVDD = 5V

80

60

40

00 1 2 3

VOUT (V)

I SE

G (

mA

)

25oC

20

VDD = 5.5V

200

50

100

00 1 2 3

VOUT (V)

I DIG

IT (

mA

)

50

TA = 25oC

VDD = 4.5VVDD = 5V

ICM7216A, ICM7216B, ICM7216D

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DescriptionINPUTS A and B

INPUTS A and B are digital inputs with a typical switchingthreshold of 2V at VDD = 5V. For optimum performance thepeak-to-peak input signal should be at least 50% of thesupply voltage and centered about the switching voltage.When these inputs are being driven from TTL logic, it isdesirable to use a pullup resistor. The circuit counts high tolow transitions at both inputs. (INPUT B is available only onlCM7216A and lCM7216B).

Note that the amplitude of the input should not exceed thedevice supply (above the VDD and below the VSS) by morethan 0.3V, otherwise the device may be damaged.

Multiplexed Inputs

The FUNCTION, RANGE, CONTROL and EXTERNALDECIMAL POINT inputs are time multiplexed to select thefunction desired. This is achieved by connecting the appro-priate Digit driver output to the inputs. The function, rangeand control inputs must be stable during the last half of eachdigit output, (typically 125µs). The multiplexed inputs areactive high for the common anode lCM7216A and active lowfor the common cathode lCM7216B and lCM7216D.

Noise on the multiplex inputs can cause improper operation.This is particularly true when the unit counter mode ofoperation is selected, since changes in voltage on the digitdrivers can be capacitively coupled through the LED diodesto the multiplex inputs. For maximum noise immunity, a 10kΩresistor should be placed in series with the multiplexedinputs as shown in the application circuits.

Table 1 shows the functions selected by each digit for theseinputs.

9.

Function Input

The six functions that can be selected are: Frequency,Period, Time Interval, Unit Counter, Frequency Ratio andOscillator Frequency. This input is available on thelCM7216A and lCM7216B only.

The implementation of different functions is done by routingthe different signals to two counters, called “Main Counter”and “Reference Counter”. A simplified block diagram of thedevice for functions realization is shown in Figure 11. Table 2shows which signals will be routed to each counter indifferent cases. The output of the Main Counter is theinformation which goes to the display. The ReferenceCounter divides its input by 1, 10, 100 and 1000. One ofthese outputs will be selected through the range selectorand drive the enable input of the Main Counter. This meansthat the Reference Counter, along with its associated blocks,directs the Main Counter to begin counting and determinesthe length of the counting period. Note that Figure 11 doesnot show the complete functional diagram (See theFunctional Block Diagram). After the end of each countingperiod, the output of the Main Counter will be latched anddisplayed, then the counter will be reset and a newmeasurement cycle will begin. Any change in theFUNCTION INPUT will stop the present measurementwithout updating the display and then initiate a newmeasurement. This prevents an erroneous first reading afterthe FUNCTION INPUT is changed. In all cases, the 1-0transitions are counted or timed.

TABLE 1. MULTIPLEXED INPUT FUNCTIONS

FUNCTION DIGIT

FUNCTION INPUT (Pin3, lCM7216A and BOnly)

Frequency D1

Period D8

Frequency Ratio D2

Time Interval D5

Unit Counter D4

Oscillator Frequency D3

RANGE INPUT, Pin 14 0.01s/1 Cycle D1

0.1s/10 Cycles D2

1s/100 Cycles D3

10s/1K Cycles D4

CONTROL INPUT,Pin 1

Display Off D4 andHold

Display Test D8

1MHz Select D2

External Oscillator Enable D1

External Decimal PointEnable

D3

External DP INPUT (Pin13, ICM7216D Only)

Decimal point is output for same digitthat is connected to this input.

INPUT A 4.5V

0.5V50ns MIN tr = tf = 10ns

COUNTEDTRANSITIONS

50ns MIN

FIGURE 9. WAVEFORM FOR GUARANTEED MINIMUM f A(MAX)FUNCTION = FREQUENCY, FREQUENCY RATIO,UNIT COUNTER

INPUT A ORINPUT B

4.5V

0.5V

MEASUREDINTERVAL

250nsMIN

tr = tf = 10s250nsMIN

FIGURE 10. WAVEFORM FOR GUARANTEED MINIMUM f B(MAX)AND fA(MAX) FOR FUNCTION = PERIOD ANDTIME INTERVAL

ICM7216A, ICM7216B, ICM7216D

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Frequency - In this mode input A is counted by the MainCounter for a precise period of time. This time is determinedby the time base oscillator and the selected range. For the10MHz (or 1MHz) time base, the resolutions are 100Hz,10Hz, 1Hz and 0.1Hz. The decimal point on the display isset for kHz reading.

Period - In this mode, the timebase oscillator is counted bythe Main Counter for the duration of 1, 10, 100 or 1000(range selected) periods of the signal at input A. A 10MHztimebase gives resolutions of 0.1µs to 0.0001µs for 1000periods averaging. Note that the maximum input frequencyfor period measurement is 2.5MHz.

Frequency Ratio - In this mode, the input A is counted bythe Main Counter for the duration of 1, 10, 100 or 1000(range selected) periods of the signal at input B. The fre-quency at input A should be higher than input B for meaning-ful result. The result in this case is unitless and its resolutioncan go up to 3 digits after decimal point.

Time Interval - In this mode, the timebase oscillator iscounted by the Main Counter for the duration of a 1-0 transi-tion of input A until a 1-0 transition of input B. This meansinput A starts the counting and input B stops it. If other ranges,except 0.01s/1 cycle are selected the sequence of input A andB transitions must happen 10, 100 or 1000 times until the

display becomes updated; note this when measuring longtime intervals to give enough time for measurement comple-tion. The resolution in this mode is the same as for periodmeasurement. See the Time Interval Measurement sectionalso.

Unit Counter - In this mode, the Main Counter is alwaysenabled. The input A is counted by the Main Counter anddisplayed continuously.

Oscillator Frequency - In this mode, the device makes afrequency measurement on its timebase. This is a self testmode for device functionality check. For 10MHz timebasethe display will show 10000.0, 10000.00, 10000.000 andOverflow in different ranges.

Range Input

The RANGE INPUT selects whether the measurementperiod is made for 1, 10, 100 or 1000 counts of the Refer-ence Counter. As it is shown in Table 1, this gives differentcounting windows for frequency measurement and variouscycles for other modes of measurement.

In all functional modes except Unit Counter, any change inthe RANGE INPUT will stop the present measurementwithout updating the display and then initiate a new mea-surement. This prevents an erroneous first reading after theRANGE INPUT is changed.

Control Input

Unlike the other multiplexed inputs, to which only one of thedigit outputs can be connected at a time, this input can betied to different digit lines to select combination of controls.In this case, isolation diodes must be used in digit lines toavoid crosstalk between them (see Figure 17). The directionof diodes depends on the device version, common anode orcommon cathode. For maximum noise immunity at this input,in addition to the 10K resistor which was mentioned before,a 39pF to 100pF capacitor should also be placed betweenthis input and the VDD or VSS (See Figure 17).

Display Off - To disable the display drivers, it is necessary totie the D4 line to the CONTROL INPUT and have the HOLD

INTERNAL CONTROL

100Hz

INPUT A

INPUT B

INPUTSELECTOR

INTERNAL OREXTERNAL

OSCILLATOR

INPUT A

ENABLE

CLOCK

MAIN COUNTER

RANGE SELECTOR

÷1 ÷10 ÷100 ÷1000

INTERNAL CONTROL

INTERNAL CONTROL

CLOCK

INTERNAL CONTROL

INPUTSELECTOR

REFERENCE COUNTER

FIGURE 11. SIMPLIFIED BLOCK DIAGRAM OF FUNCTIONS IMPLEMENTATION

TABLE 2. 7216A/B INPUT ROUTING

FUNCTIONMAIN

COUNTER REFERENCE COUNTER

Frequency (fA) Input A 100Hz (Oscillator ÷105 or 104)

Period (tA) Oscillator Input A

Ratio (fA/fB) Input A Input B

Time Interval(A→B)

Oscillator Input AInput B

Unit Counter(Count A)

Input A Not Applicable

Osc. Freq.(fOSC)

Oscillator 100Hz (Oscillator ÷105 or 104)

ICM7216A, ICM7216B, ICM7216D

Page 10: ICM7216

9-19

input at VDD. While in Display Off mode, the segments anddigit drivers are all off, leaving the display lines floating, so thedisplay can be shared with other devices. In this mode, theoscillator continues to run with a typical supply current of1.5mA with a 10MHz crystal, but no measurements are madeand multiplexed inputs are inactive. A new measurementcycle will be initiated when the HOLD input is switched toVSS.

Display Test - Display will turn on with all the digits showing8s and all decimal points on. The display will be blanked ifDisplay Off is selected at the same time.

1MHz Select - The 1MHz select mode allows use of a 1MHzcrystal with the same digit multiplex rate and time betweenmeasurement as with a 10MHz crystal. This is done bydividing the oscillator frequency by 104 rather than 105. Thedecimal point is also shifted one digit to the right in periodand time interval, since the least significant digit will be in µsincrement rather than 0.1µs increment.

External Oscillator Enable - In this mode, the signal at EXTOSC INPUT is used as a timebase instead of the on-boardcrystal oscillator (built around the OSC INPUT, OSC OUT-PUT inputs). This input can be used for an external stabletemperature compensated crystal oscillator or for specialmeasurements with any external source. The on-board crys-tal oscillator continues to work when the external oscillator isselected. This is necessary to avoid hang-up problems, andhas no effect on the chip's functional operation. If the on-board oscillator frequency is less than 1MHz or only theexternal oscillator is used, THE OSC INPUT MUST BECONNECTED TO THE EXT OSC INPUT providing the time-base has enough voltage swing for OSC INPUT (See Electri-cal Specifications). If the external timebase is TTL level apullup resistor must be used for OSC INPUT. The other wayis to put a 22MΩ resistor between OSC INPUT and OSCOUTPUT and capacitively couple the EXT OSC INPUT toOSC INPUT. This will bias the OSC INPUT at its thresholdand the drive voltage will need to be only 2VP-P. The exter-nal timebase frequency must be greater than 100kHz or thechip will reset itself to enable the on-board oscillator.

External Decimal Point Enable - In this mode, the EX DPINPUT is enabled (lCM7216D only). A decimal point will bedisplayed for the digit that its output line is connected to thisinput (EX DP INPUT). Digit 8 should not be used since it willoverride the overflow output. Leading zero blanking is effec-tive for the digits to the left of selected decimal point.

Hold Input

Except in the unit counter mode , when the HOLD input isat VDD, any measurement in progress (before STORE goes

low) is stopped, the main counter is reset and the chip isheld ready to initiate a new measurement as soon as HOLDgoes low. The latches which hold the main counter data arenot updated, so the last complete measurement is displayed.In unit counter mode when HOLD input is at VDD, thecounter is not stopped or reset, but the display is frozen atthat instantaneous value. When HOLD goes low the countcontinues from the new value in the new counter.

RESET Input

The RESET input resets the main counter, stops anymeasurement in progress, and enables the main counterlatches, resulting in an all zero output. A capacitor to groundwill prevent any hang-ups on power-up.

MEASUREMENT IN PROGRESS

This output is provided in lCM7216D. It stays low duringmeasurements and goes high for intervals between mea-surements. It is provided for system interfacing and can drivea low power Schottky TTL or one ECL load if the ECL deviceis powered from the same supply as lCM7216D.

Decimal Point Position

Table 3 shows the decimal point position for different modesof lCM7216 operation. Note that the digit 1 is the least signif-icant digit. Table 3 is for 10MHz timebase frequency.

Overflow Indication

When overflow happens in any measurement it will be indicatedon the decimal point of the digit 8. A separate LED indicator canbe used. Figure 12 shows how to connect this indicator.

Overflow will be indicated on the decimal point output ofdigit 8. A separate LED overflow indicator can be connectedas follows:

DEVICE CATHODE ANODE

ICM7216A Decimal Point D8

ICM7216B/D D8 Decimal Point

ab

cd

fg

eDP

FIGURE 12. SEGMENT IDENTIFICATION AND DISPLAY FONT

TABLE 3. DECIMAL POINT POSITIONS

RANGE FREQUENCY PERIOD FREQUENCY

RATIOTIME

INTERVALUNIT

COUNTEROSCILLATORFREQUENCY

0.01s/1 Cycle D2 D2 D1 D2 D1 D2

0.1s/10 Cycle D3 D3 D2 D3 D1 D3

1s/100 Cycle D4 D4 D3 D4 D1 D4

10s/1K Cycle D5 D5 D4 D5 D1 D5

ICM7216A, ICM7216B, ICM7216D

Page 11: ICM7216

9-20

Time Interval Measurement

When in the time interval mode and measuring a singleevent, the lCM7216A and lCM7216B must first be “primed”prior to measuring the event of interest. This is done by firstgenerating a negative going edge on Channel A followed by anegative going edge on Channel B to start the “measurementinterval”. The inputs are then primed ready for the measure-ment. Positive going edges on A and B, before or after thepriming, will be needed to restore the original condition.

Priming can be easily accomplished using the circuit inFigure 13.

Following the priming procedure (when in single event or 1cycle range) the device is ready to measure one (only)event.

When timing repetitive signals, it is not necessary to “prime”the lCM7216A and lCM7216B as the first alternating signalstates automatically prime the device. See Figure 1.

During any time interval measurement cycle, the ICM7216Aand lCM7216B require 200ms following B going low toupdate all internal logic. A new measurement cycle will nottake place until completion of this internal update time.

Oscillator Considerations

The oscillator is a high gain CMOS inverter. An externalresistor of 10MΩ to 22MΩ should be connected between theOSCillator INPUT and OUTPUT to provide biasing. Theoscillator is designed to work with a parallel resonant 10MHzquartz crystal with a static capacitance of 22pF and a seriesresistance of less than 35Ω.

For a specific crystal and load capacitance, the required gMcan be calculated as follows:

CO = Crystal Static Capacitance

RS = Crystal Series Resistance

CIN = Input Capacitance

COUT = Output Capacitance

ω = 2πf

The required gM should not exceed 50% of the gM specifiedfor the lCM7216 to insure reliable startup. The OSCillatorINPUT and OUTPUT pins each contribute about 5pF to CINand COUT. For maximum stability of frequency, CIN andCOUT should be approximately twice the specified crystalstatic capacitance.

In cases where non decade prescalers are used it may bedesirable to use a crystal which is neither 10MHz or 1MHz.In that case both the multiplex rate and time between mea-surements will be different. The multiplex rate is

for 10MHz mode and for

the 1MHz mode. The time between measurements is

in the 10MHz mode and in the 1MHz mode.

The crystal and oscillator components should be located asclose to the chip as practical to minimize pickup from othersignals. Coupling from the EXTERNAL OSClLLATOR INPUTto the OSClLLATOR OUTPUT or INPUT can cause undesir-able shifts in oscillator frequency.

Display Considerations

The display is multiplexed at a 500Hz rate with a digit time of244µs. An interdigit blanking time of 6µs is used to preventdisplay ghosting (faint display of data from previous digitsuperimposed on the next digit). Leading zero blanking isprovided, which blanks the left hand zeroes after decimalpoint or any non zero digits. Digits to the right of the decimalpoint are always displayed. The leading zero blanking will bedisabled when the Main Counter overflows.

The lCM7216A is designed to drive common anode LEDdisplays at peak current of 25mA/segment, using displayswith VF = 1.8V at 25mA. The average DC current will be over3mA under these conditions. The lCM7216B and lCM7216Dare designed to drive common cathode displays at peak cur-rent of 15mA/segment using displays with VF = 1.8V at15mA. Resistors can be added in series with the segmentdrivers to limit the display current in very efficient displays, ifrequired. The Typical Performance Curves show the digitand segment currents as a function of output voltage.

To get additional brightness out of the displays, VDD may beincreased up to 6.0V. However, care should be taken to seethat maximum power and current ratings are not exceeded.

The segment and digit outputs in lCM7216s are not directlycompatible with either TTL or CMOS logic when drivingLEDs. Therefore, level shifting with discrete transistors maybe required to use these outputs as logic signals.

SIGNAL A

SIGNAL B

INPUT A

INPUT B

VDD

N.O.

100K1N914

VDD

150K

1

0.1µF

10K

10nF

1 1 1

2

2

VSS VSS VSS

PRIME

FIGURE 13. PRIMING CIRCUIT, SIGNALS A AND B BOTH HIGHOR LOW

DEVICE TYPE

1 CD4049B Inverting Buffer

2 CD4070B Exclusive - OR

gM ω2CIN COUT RS 1

COCL--------+

2

=

where CL

CINCOUTCIN COUT+---------------------------------

=

fMUX

fOSC

2 104×

-------------------= fMUX

fOSC

2 103×

-------------------=

2 106×

fOSC------------------- 2 10

5×fOSC

-------------------

ICM7216A, ICM7216B, ICM7216D

Page 12: ICM7216

9-21

Accuracy

In a Universal Counter crystal drift and quantization effectscause errors. In frequency, period and time intervalmodes, a signal derived from the oscillator is used in eitherthe Reference Counter or Main Counter. Therefore, inthese modes an error in the oscillator frequency will causean identical error in the measurement. For instance, anoscillator temperature coefficient of 20PPM/oC will cause ameasurement error of 20PPM/oC.

In addition, there is a quantization error inherent in any digitalmeasurement of ±1 count. Clearly this error is reduced by dis-playing more digits. In the frequency mode the maximumaccuracy is obtained with high frequency inputs and in periodmode maximum accuracy is obtained with low frequencyinputs (as can be seen in Figure 14). In time interval mea-surements there can be an error of 1 count per interval. As aresult there is the same inherent accuracy in all ranges asshown in Figure 15. In frequency ratio measurement can bemore accurately obtained by averaging over more cycles ofINPUT B as shown in Figure 16.

FIGURE 14. MAXIMUM ACCURACY OF FREQUENCY ANDPERIOD MEASUREMENTS DUE TO LIMITATIONSOF QUANTIZATION ERRORS

FIGURE 15. MAXIMUM ACCURACY OF TIME INTERVAL MEA-SUREMENT DUE TO LIMITATIONS OF QUANTIZA-TION ERRORS

FIGURE 16. MAXIMUM ACCURACY FOR FREQUENCY RATIO MEASUREMENT DUE TO LIMITATION OF QUANTIZATION ERRORS

FREQUENCY MEASURE0

2

4

81 10 103 107

FREQUENCY (Hz)

MA

XIM

UM

NU

MB

ER

OF

6

0.01s

SIG

NIF

ICA

NT

DIG

ITS

105

0.1s

10s1s

PERIOD MEASUREfOSC = 10MHz

1 CYCLE10 CYCLES

103 CYCLES102 CYCLES

MAXIMUM TIME INTERVALFOR 103 INTERVALS

MAXIMUM TIMEINTERVAL FOR102 INTERVALS

MAXIMUM TIME INTERVALFOR 10 INTERVALS

103 104 105 106 107 108102101

0

1

2

3

4

5

6

7

8

TIME INTERVAL (µs)

MA

XIM

UM

NU

MB

ER

OF

SIG

NIF

ICA

NT

DIG

ITS

1 CYCLE10 CYCLES

103 CYCLES102 CYCLES

RANGE

103 104 105 106 107 108102101

0

1

2

3

4

5

6

7

8

MA

XIM

UM

NU

MB

ER

OF

SIG

NIF

ICA

NT

DIG

ITS

fA /fB

ICM7216A, ICM7216B, ICM7216D

Page 13: ICM7216

9-22

Test Circuit

Typical ApplicationsThe lCM7216 has been designed for use in a wide range ofUniversal and Frequency counters. In many cases, prescalerswill be required to reduce the input frequencies to under 10MHz.Because INPUT A and INPUT B are digital inputs, additionalcircuitry is often required for input buffering, amplification,hysteresis, and level shifting to obtain a good digital signal.

The lCM7216A or lCM7216B can be used as a minimumcomponent complete Universal Counter as shown inFigure 18. This circuit can use input frequencies up to10MHz at INPUT A and 2MHz at INPUT B. If the signal atINPUT A has a very low duty cycle it may be necessary touse a 74LS121 monostable multivibrator or similar circuit tostretch the input pulse width to be able to guarantee that it isat least 50ns in duration.

To measure frequencies up to 40MHz the circuit of Figure19 can be used. To obtain the correct measured value, it isnecessary to divide the oscillator frequency by four as wellas the input frequency. In doing this the time between

measurements is also lengthened to 800ms and the displaymultiplex rate is decreased to 125Hz.

If the input frequency is prescaled by ten, then the oscillatorcan remain at 10MHz or 1MHz, but the decimal point mustbe moved one digit to the right. Figure 20 shows a frequencycounter with a ÷10 prescaler and an lCM7216A. Since thereis no external decimal point control with the lCM7216A andlCM7216B, the decimal point may be controlled externallywith additional drivers as shown in Figure 20. Alternatively, ifseparate anodes are available for the decimal points, theycan be wired up to the adjacent digit anodes. Note that therecan be one zero to the left of the decimal point since theinternal leading zero blanking cannot be changed. InFigure 21 additional logic has been added to count the inputdirectly in period mode for maximum accuracy. In Figures 20and 21, INPUT A comes from QC of the prescaler ratherthan QD to obtain an input duty cycle of 40%.

FUNCTION

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

abcdefgDP

INPUT A

100pF

INPUT B

10K DPD1

D2

D3

D4

D8

D5

F

P

FR

TI.

U.C.

O.F.

RESET

LEDOVERFLOWINDICATOR D8 D8 D7 D6 D5 D4 D3 D2 D1

D1

D2

D3

D4

.01/1

.1/10

1/100

10/1K

10kΩD1

D2

D3D4

D5

D6

D7

D8

VDD

ICM7216A

eg

a

d

b

c

f

VDD

10kΩ

VDD

10kΩ

22MΩ10MHz

CRYSTAL

39pFTYP

VDD

DISPLAYBLANK

DISPLAYTEST 1MHz

EXT

TESTOSC

39pF

D4 D8 D2 D1 D5

EXTOSC

INPUT

TYPICAL CRYSTAL SPECS:F = 10MHz PARALLEL RESONANCECL = 22pFRS = <35Ω

FUNCTION

RANGE

8

84

6

8

HOLD

GENERATOR

FUNCTIONGENERATOR

1N914s

FIGURE 17. TEST CIRCUIT (ICM7216A SHOWN, OTHERS SIMILAR)

ICM7216A, ICM7216B, ICM7216D

Page 14: ICM7216

9-23

FIGURE 18. 10MHz UNIVERSAL COUNTER

INPUT A

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

abcdefg

DP

10kΩ D1D1

D2

D3

D4

D8

D5

F

P

F.R.

T.I.

U.C.

O.F.

LEDOVERFLOWINDICATOR

D8D8 D7 D6 D5 D4 D3 D2 D1

DP

g

e

a

D1

D2

D3D4

d

b

c

f

VDD

ICM7216B

D2

D3

D4

D5

D6

D7

D8

VDD

VDD

22MΩ

10MHzCRYSTAL

39pFTYP

DISPLAYBLANK

DISPLAYTEST

EXTOSC

D4 D8 D1

EXTOSCINPUT

FUNCTION

HOLD

INPUT B

ENABLE

100kΩ

CONTROLSWITCHES

SEC CYCLES

D1 0.01 1.0

D2 0.1 10.0

D3 1.0 100.0

D4 10.0 1K

RANGE

10kΩ

10kΩ

SEGMENT DRIVERSRESET

DIGITDRIVERS

COMMON CATHODE LED DISPLAY

0.1µF6

8 8

8

8

39pF

VDD4

3

100pF

IN914s

ICM7216A, ICM7216B, ICM7216D

Page 15: ICM7216

9-24

FIGURE 19. 40MHz FREQUENCY COUNTER

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

abcdef

gDP

D1

OVERFLOWINDICATOR

D8 D7 D6 D5 D4 D3 D2 D1

DP

ge

a

d

b

c

f

ICM7216D

D2

D3

D4

D5

D6

D7

D8

VDD

VDD

22MΩ

2.5MHzCRYSTAL

39pF

DISPLAYTEST

DISPLAYOFF

EXTOSC

D1 D4 D8

EXTOSC

INPUT

HOLD

ENABLE

COMMON CATHODE LED DISPLAY

8

3IN914s

LEDOVERFLOWINDICATOR

D1D2

D3D4

RANGERESET

abcdefgDP

39pF

100kΩ

INPUT A

1/274LS112

1/274LS112

4

8

8

10kΩ

100pF

10kΩ

3kΩ

J 3 1 CL K 2

C

15V+

Q 5Q 6

K 12 13 CL J 11

C

14P

10

P

4

Q 7 Q 9

0.1µF

VDD

VDD

D8

ICM7216A, ICM7216B, ICM7216D

Page 16: ICM7216

9-25

FIGURE 20. 100MHz MULTIFUNCTION COUNTER

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

abcdefg

100pF

DP

D1

D2

D8

RESET

LEDOVERFLOWINDICATOR

D8 D8 D7 D6 D5 D4 D3 D2 D1

D1

D2

D3

D4

10kΩ

D1D2

D3D4

D5

D6

D7

D8

VDD

ICM7216A

eg

a

d

b

c

f

VDD

10kΩ

VDD

10kΩ

22MΩ10MHz

CRYSTAL

30pFTYP

VDD

DISPLAYTEST

39pF

D7

RANGE

8

8

8

HOLD

VDD

3kΩ

D1D2

D3D4

DP

1kΩ

DP

40Ω

VSS

1kΩ

0.1µF

F

P

F.R.

10kΩ

INPUT B INPUT A

CK1 CK2

QA

QC

QA

QC

74LS90 OR11C90

CK2CK1

11C90

3kΩVDD

44

COMMON ANODE LED DISPLAY

2N2222

1N914

ICM7216A, ICM7216B, ICM7216D

Page 17: ICM7216

9-26

FIGURE 21. 100MHz FREQUENCY, 2MHz PERIOD COUNTER

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

abcdefg

100pF

DP

D8 D8 D7 D6 D5 D4 D3 D2 D1

D1

D2

D3

D4

10kΩ

D1D2

D3D4

D5

D6

D7

D8

VDD

ICM7216A

e

g

a

d

b

c

f

VDD

100kΩ

VDD

22MΩ10MHz

CRYSTAL

39pFTYP

VDD

39pF

RANGE

8

8

8

HOLD

D1D2

D3D4

DP

DP

40Ω

VSS

1kΩ

44

COMMON CATHODE LED DISPLAY

2N2222

CONT

CONT

RESET

0.1µF

10kΩ

FUNCTION SWITCHOPEN: FREQ.CLOSED: PERIOD

3kΩ

3kΩ

INPUT A

11C90

CK1

CK2 QA OC

74LS00 VDD

10kΩVDD

VDD

10kΩ10kΩ

1kΩ

VSS

2N22221kΩ

2N222210kΩ

D3

1

213

CD4016

D1

4

3

D8

5

V+

LEDOVERFLOWINDICATOR

ICM7216A, ICM7216B, ICM7216D

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time withoutnotice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurateand reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties whichmay result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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