
Rev D3, /41

DESCRIPTION

iC-HF is a robust line driver for industrial 5 V controlapplications featuring six differential output channels.

Single-ended, TTL-compatible input signals are trans-mitted as differential, 5 V RS-422 output signals at arate up to 10 MHz. The push-pull driver stages typi-cally provide 40 mA, present low saturation voltage,are current limited for reduced EMI emissions, andshort-circuit-proof.

iC-HF is protected against reverse polarity connection,disabling internal supply voltage and setting outputchannels to high impedance when reverse polarityconnection is detected. It offers a power-good switch,delivering up to 60 mA, that allows extended reversepolarity protection for connected sensors.

iC-HF supports Encoder Link. In this configurationinput signals are directly linked to output pins. Ana-

log signals from sensors can be accessed directly atoutput pins from iC-HF, allowing sensor calibrationand alignment. Up to 9 channels can be configuredas Encoder Link. Entering and exiting Encoder Linkconfiguration requires no additional line.

BiSS/SSI communication is supported throughRS-422 standard physical layer. iC-HF can also beincluded in a BiSS bus structure, and it can be config-ured as a bus termination node (BiSS bus loopback).

iC-HF protects against undervoltage and overtem-perature events. Output channels are left in highimpedance upon any of these events, and an error issignaled through the open drain output NERR. NERRis short-circuit protected.

Error signaling from sensor can be transferred viaNERRI/NERR pins.


Rev D3, /41

CONTENTS

PACKAGING INFORMATION 4PIN CONFIGURATION QFN32-5x5

(topview) . . . . . . . . . . . . . . . . . 4PACKAGE DIMENSIONS . . . . . . . . . . . 5

ABSOLUTE MAXIMUM RATINGS 6

THERMAL DATA 6

ELECTRICAL CHARACTERISTICS 7

CHANNEL DESCRIPTION 10Unidirectional channel . . . . . . . . . . . . . 10Bidirectional channel . . . . . . . . . . . . . . 10

FUNCTION DESCRIPTION 12A/B/Z and U/V/W Mode . . . . . . . . . . . . 12A/B/Z and BiSS/SSI mode . . . . . . . . . . . 12BiSS bus structure . . . . . . . . . . . . . . . 13BiSS bus loopback . . . . . . . . . . . . . . . 15

INTERNAL PROTECTION AND ERRORSIGNALING 18

REVERSE POLARITY PROTECTION 19

ENCODER LINK SEQUENCE 22iC-PTxxyy/ iC-PT-Hxxyy mode control . . . . 23

RS-422 RECEIVER CONFIGURATION 24Possible voltage ranges of RS-422 . . . . . . 24Unused/open RS-422 input pins . . . . . . . 25

APPLICATION EXAMPLES 26iC-PTxxyy/ iC-PT-Hxxyy . . . . . . . . . . . . 26iC-MH16, iC-MH8, iC-MHM . . . . . . . . . . 28iC-MU . . . . . . . . . . . . . . . . . . . . . . 30iC-NQC . . . . . . . . . . . . . . . . . . . . . 34

ADDITIONAL EXAMPLES 358 lines encoder operation for ABZ, BiSS and

5 V power supply . . . . . . . . . . . . . 35iC-MU with P2P BiSS and iC-HF in Encoder

Link State . . . . . . . . . . . . . . . . . 36iC-LNB with SPI and iC-HF in Encoder Link

State . . . . . . . . . . . . . . . . . . . . 37

DESIGN REVIEW 38

REVISION HISTORY 39


Rev D3, /41

PACKAGING INFORMATION

PIN CONFIGURATION QFN32-5x5(topview)

12345678

9 10 11 12 13 14 15 16

1718192021222324

2526272829303132

<D-CODE><A-CODE>

<P-CODE>

PIN FUNCTIONSNo. Name Function

1 X5 Channel 5 positive input2 X4 Channel 4 positive input3 X3 Channel 3 positive input4 NX3 Channel 3 negative input5 OEN Output Enable input6 X2 Channel 2 positive input7 NX2 Channel 2 negative input8 X1 Channel 1 positive input9 NX1 Channel 1 negative input

10 Q1 Channel 1 positive output11 NQ1 Channel 1 negative output12 Q2 Channel 2 positive output13 NQ2 Channel 2 negative output14 Q3 Channel 3 positive output15 NQ3 Channel 3 negative output16 NERRI Error Input (low active)17 ECM Enable Encoder Link State input18 VDD Power Supply Voltage19 VDDS Switched Power Supply output20 GND Ground21 GNDS Switched Ground output22 FMSEL2 Function Mode Select 2 input23 FMSEL1 Function Mode Select 1 input24 PTC PT configuration output25 NERR Error Output (low active)26 NQ6 Channel 6 negative output27 Q6 Channel 6 positive output28 NQ5 Channel 5 negative output29 Q5 Channel 5 positive output30 NQ4 Channel 4 negative output31 Q4 Channel 4 positive output32 X6 Channel 6 positive inputBP Backside Paddle (GNDS)

The pin directions input and out-put are related to default operation,not to Encoder Link State or opera-tional mode.

IC top marking: <P-CODE> = product code, <A-CODE> = assembly code (subject to changes), <D-CODE> = date code (subject to changes);The Backside Paddle must be connected to GNDS.


Rev D3, /41

PACKAGE DIMENSIONS

5

5

TOP

0.40

3.65

3.65

0.22 0.50

BOTTOM

0.90

±0.10

SIDE

R0.15 3.60

4.90

3.60

4.90

0.30 0.50

0.70

RECOMMENDED PCB-FOOTPRINT

drb_qfn32-5x5-6_pack_1, 10:1

All dimensions given in mm. Tolerances of form and position according to JEDEC MO-220.


Rev D3, /41

ABSOLUTE MAXIMUM RATINGS

Beyond these values damage may occur; device operation is not guaranteed.Item Symbol Parameter Conditions UnitNo. Min. Max.G001 V(VDD) Voltage at VDD -6 6 VG002 I(VDD) Current in VDD -20 600 mAG003 Vin Voltage at NERR, X1 . . . X6, NX1

. . . NX6, PTC, ECM, NERRI, FMSEL1,FMSEL2, OEN, Q1...Q6, NQ1...NQ6,VDDS, GNDS

-0.3 VDD+0.3 V

G004 I(GND) Current in GND -600 20 mAG005 I() Current in VDDS, GNDS -70 70 mAG006 I() Current in X1 . . . X6, NX1 . . . NX3, PTC,

ECM, NERRI, FMSEL1, FMSEL2, OEN-4 4 mA

G007 I() Current in Q1 . . . Q6, NQ1 . . . NQ6 -60 60 mAG008 I() Current in NERR 0 30 mAG009 Vd() ESD Susceptibility at All Pins HBM 100 pF discharged through 1.5kΩ 4 kVG010 Tj Junction Temperature -40 150 °CG011 Ts Storage Temperature Range -40 150 °C

THERMAL DATA

Operating Conditions: VDD = 3 . . . 5.5 VItem Symbol Parameter Conditions UnitNo. Min. Typ. Max.

T01 Ta Operating Ambient Temperature Range -40 125 °C

All voltages are referenced to ground unless otherwise stated.All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative.


Rev D3, /41

ELECTRICAL CHARACTERISTICS

Operating Conditions: Tj=-40 °C . . . 125 °C, VDD = 3 . . . 5.5 V, unless otherwise statedItem Symbol Parameter Conditions UnitNo. Min. Typ. Max.Total Device001 V(VDD) Permissible Supply Voltage 3 5.5 V002 I(VDD) Supply Current no load, VDD = 5.5 V 1.6 2.5 mA

no load, VDD = 3 V 1 1.8 mA003 I(VDDS) Permissible Load Current VDDS -60 0 mA004 I(GNDS) Permissible Load Current GNDS 0 60 mA005 Toff Overtemperature Shutdown Increasing temperature Tj 135 185 °C006 V(VDD)on Turn-On Threshold Increasing VDD 2.1 2.9 V007 V(VDD)off Turn-off Threshold Decreasing VDD 2.1 2.9 V008 V(VDD)hys Power-on Hysteresis 3 mV009 Vcz()hi Clamp Voltage hi at X1 . . . X3,

NX1 . . . NX3, Q1 . . . Q6, NQ1. . . NQ6, VDDS

7 V

010 Vc()hi Clamp-Voltage hi at ECM, OEN,FMSEL1, FMSEL2, NERRI

Vc()hi = V() - V(VDD), I() = 0.2 mA 0.3 1.5 V

011 Vc()hi Clamp-Voltage hi at Inputs X4. . . X6, PTC

Vc()hi = V() - V(VDD), I() = 1 mA 0.3 1.5 V

012 Vc()lo Clamp Voltage lo at X1 . . . X6,NX1 . . . NX3, PTC, ECM, OEN,FMSEL1, FMSEL2, NERRI,NERR, Q1 . . . Q6, NQ1 . . . NQ6,VDDS

I() = -1 mA -1.5 -0.3 V

Digital Inputs X1 . . . X6, ECM, NERRI, OEN, FMSEL1, FMSEL2101 Vt()hi Input Threshold Voltage hi Channel as output driver 2 V102 Vt()lo Input Threshold Voltage lo Channel as output driver 0.8 V103 Vt()hys Input Hysteresis Channel as output driver 110 280 mV104 Ipd() Input Pull-Down Current Channel as output driver 4 60 220 µA

V() = 0.4 V . . . VDDS105 tdmax() Maximum delay from Sin-

gle-Ended Input to RS422 output30 ns

Digital Outputs X4, X5, X6201 Isc()lo Output Short Circuit lo Channel as RS-422 receiver 8 100 mA

V() = VDDSOEN = 1

202 Isc()hi Output Short Circuit hi Channel as RS-422 receiver -100 -8 mAV() = GNDSOEN = 1

203 Vs()lo Output Saturation Voltage lo Channel as RS-422 receiver 400 mVI() = 3 mAVs()= V() - V(GNDS)OEN = 1

204 Vs()hi Output Saturation Voltage hi Channel as RS-422 receiver 400 mVI() = -3 mAVs()= VDDS - V()OEN = 1

205 tr() Rise Time Channel as RS-422 receiver 20 nsCext = 50 pFOEN = 1

206 tf() Fall Time Channel as RS-422 receiver 20 nsCext = 50 pFOEN = 1


Rev D3, /41


Operating Conditions: Tj=-40 °C . . . 125 °C, VDD = 3 . . . 5.5 V, unless otherwise statedItem Symbol Parameter Conditions UnitNo. Min. Typ. Max.Analog Inputs/Outputs301 Ron ON Resistance at X1 . . . X6, NX1

. . . NX3Channel in Encoder Link State 110 400 Ω

302 I(max) Maximum Direct Current Channel in Encoder Link State 1 mA303 Ilk() Leakage Current at X1 . . . X6,

NX1 . . . NX3, Q1 . . . Q6, NQ1. . . NQ6

Channel in Encoder Link State -35 0 35 µA

304 f(COMM) Communication Frequency at X1. . . X6, NX1 . . . NX3

Channel in Encoder Link State 10 MHz

NERR Output401 INERR() Current in NERR V(NERR) < 0.5 V, error 4 25 mA402 Vs()lo Saturation Voltage lo I(NERR) = 4mA 0.5 V

RS-422 Inputs Q4/NQ4 . . . Q6/NQ6501 Ri Input Resistance Channel configuration as RS-422 Receiver 1 kΩ

Vi(Qx)= 0 . . . 5.5 VVi(NQx)= 0 VRi = 5.5

∆ IQxOEN = 1

502 Vi(Qx),Vi(NQx)

Input Voltage Channel configuration as RS-422 Receiver 0 VDD VOEN = 1

503 |Vid()| Differential Input Voltage Channel configuration as RS-422 Receiver 0.05 VDD/2 V|Vid()| = |Vip() − Vin()|OEN = 1

504 Vic() Common-Mode Input Voltage Channel configuration as RS-422 Receiver 0.8 VDD VVic() = Vip()−Vin()

2OEN = 1

505 Vid()hys Differential Input VoltageHysteresis

Channel configuration as RS-422 Receiver 0.5 8 mVOEN = 1

506 f(max) Maximum CommunicationFrequency

Channel configuration as RS-422 Receiver 10 MHzOEN = 1R Termination = 120Ω

507 tdmax() Maximum delay from RS422input to Single-Ended Output

40 ns

Line Driver Outputs Q1/NQ1 . . . Q6/NQ6601 Icex Output Leakage Current OEN = 0 -35 0 35 µA602 Vs()hi Saturation Voltage hi Vs() = VDD - V(); I() = -20 mA 800 mV

OEN = 1603 Vs()lo Saturation Voltage lo Vs() = V(); I() = 30 mA 800 mV

OEN = 1

604 Isc()lo Short-Circuit Current lo at outputdriver

V() = V(VDD) 30 65 mAOEN = 1

605 Isc()hi Short-Circuit Current Hi at outputdriver

V() = V(GND) -45 -20 mAOEN = 1

606 f(max) Maximum Output Frequency Load = 120Ω 10 MHz607 tr() Rise Time RL = 120Ω in-between Qx and NQx;

VDD = 5.5 V 15 nsVDD = 3 V 20 ns

608 tf() Fall Time RL = 120Ω in-between Qx and NQx;VDD = 5.5 V 15 nsVDD = 3 V 20 ns


Rev D3, /41


Operating Conditions: Tj=-40 °C . . . 125 °C, VDD = 3 . . . 5.5 V, unless otherwise statedItem Symbol Parameter Conditions UnitNo. Min. Typ. Max.Reverse Polarity Protection and Supply Switches VDDS, GNDS701 Vs() Saturation Voltage VDD,

Vs(VDDS) = VDD − V(VDDS)I(VDDS) = -20 . . . 0 mA 150 mVI(VDDS) = -60 . . . -20 mA 250 mV

702 Vs() Saturation Voltage GND,Vs(GNDS) = V(GNDS) − GND

I(GNDS) = 0 . . . 20 mA 150 mVI(GNDS) = 20 . . . 60 mA 250 mV

703 Irev(VDD) Reverse-Polarity Current V(VDD) = -5.5V . . . -3 V -1 0 mAEncoder Link Sequence801 Vt()hi Input Voltage Level hi at Q1, NQ1 80 %VDD802 Vt()lo Input Voltage Level lo at Q1, NQ1 20 %VDD803 ts Valid State Duration Time 49 50 52 µs804 ∆ ts Max State Time Variation ts = 50µs -500 200 ns805 Ilk() Leakage Current voltage reversal -1 1 µA

Configuration Output, pin PTC901 Vptc() Configuration Output Voltage Encoder Link State 45 50 55 %VDDS

CPTC = 10 nF optional902 Ilk() Leakage Current no Encoder Link State -10 10 µA


Rev D3, /41

CHANNEL DESCRIPTION

iC-HF is a 6-channel RS-422 line driver.There are two types of channels:

• unidirectional channel• bidirectional channel

Unidirectional channel

Channels 1, 2 and 3 are unidirectional channels. Thesechannels can work under unidirectional RS-422 driverconfiguration or under Encoder Link State.

RS422

BYPBYPNQi

NXi

TRI

QiXi

TRI

Qi

NXi

BYPNQi

Xi

Figure 1: Unidirectional channel

When the channel works as unidirectional RS-422driver, single ended input signals at Xi pins are con-verted into differential output signals at Qi/NQi outputs.Output signals follow RS-422 protocol. Differential out-put drivers are tristate drivers. OEN pin must be sethi to enable differential output signals, otherwise theywill remain in high impedance state. More informationon the internal signal TRI and the output drivers in highimpedance can be found on page 18.

A pull-down resistor is present at the inputs, and in-coming signals at Xi pins must be TTL-compatible. Inunidirectional driver configuration, signals at NXi pinsare disabled. The equivalent circuit can be found infigure 2.

RS422output

NQiNXiTRI

QiXi

NQiNXiTRI

XiQi

Figure 2: Equivalent circuit of unidirectional RS-422driver channel

When the channel is in Encoder Link State, signalspresent at input pins Xi are bypassed and directly con-nected to output pins Qi. Signals at NXi are bypassedtoo to output pins NQi. Unidirectional channels in En-coder Link State present two bypassed lines.

The input stage and the input pull-down resistor andthe output stage are disabled in Encoder Link State.

This configuration is useful for calibrating sensors. Ana-log signals from the sensor can be directly accessedfrom pins Qi/NQi. More information on the EncoderLink State on page 22.

EncoderLink

NQiNXi

QiXiXi Qi

NXi NQi

Figure 3: Equivalent circuit of 1 channel (2 lines) inEncoder Link State

Bidirectional channel

Channels 4, 5 and 6 are bidirectional channels. Thesechannels can work under bidirectional RS-422 driverconfiguration or under Encoder Link state.

RS422I/O

EBIS

BYPNQi

TRI

QiXi

+_

BYP

Qi

NQiTRI

EBIS

Xi

Figure 4: Bidirectional channel

When the channel is a bidirectional RS-422 driver, itcan work as a transmitter or as a receiver. It cannotwork simultaneously in both modes, each working modecorresponds to a specific configuration of the channel.

If the channel is a transmitter, single ended signals atinput pins Xi are converted into differential output sig-nals at Qi/NQi outputs. Outputs signals follow RS-422protocol. A pull-down resistor is present at the inputs,and incoming signals at Xi pins must be TTL compatible.The equivalent circuit can be found in figure 5. Similarlyto unidirectional channels, OEN pin must be set hi toenable differential output signals, otherwise they willremain in high impedance state. More information onoutput drivers in high impedance can be found on page18.


Rev D3, /41

RS422Output

NQiTRI

QiXi

NQi

Qi

TRI

Xi

Figure 5: Equivalent circuit of RS-422 transmitter

If the channel is a receiver, differential input signals atpins Qi/NQi are converted into single ended signals atXi outputs. Incoming differential signals should followRS-422 protocol. External resistors may be required toadapt signal voltage levels to iC-HF internal voltages.More information on the RS-422 receiver on page 24.

Output Enable bit OEN must be set hi in order enablethe single ended output driver. With OEN = 0, the driveris left in high impedance.

In RS-422 receiver configuration the pull-down resistoris disabled and the differential output driver is left inhigh impedance.

RS422Input

NQiTRI

QiXi

_+

NQi

Xi

TRI

Qi

Figure 6: Equivalent circuit of RS-422 receiver

If the channel is in Encoder Link State, signals presentat input pins Xi are bypassed and directly connected tooutput pins Qi. Bidirectional channels in Encoder LinkState present one bypassed line. Pull-up resistors andthe output drivers are disabled. No signal is connectedto NQi pins.

EncoderLink

NQi

QiXi

NQi

Xi Qi

Figure 7: Equivalent circuit of one line in EncoderLink State


Rev D3, /41

FUNCTION DESCRIPTION

iC-HF has 4 function modes. Each function mode com-bines the unidirectional and bidirectional channels witha specific configuration. iC-HF can be operated as asix channel line driver, as a 6 lines transceiver withBiSS/SSI connectivity or as a bus capable BiSS slavetransceiver inserted in a BiSS bus structure. The 4function modes are the following:• A/B/Z and U/V/W• A/B/Z and BiSS/SSI• BiSS bus structure• BiSS bus loopbackSelection of iC-HF’s function mode is set by the pinsFMSEL2 and FMSEL1:

FMSEL2 FMSEL1 MODE0 0 A/B/Z and U/V/W0 1 A/B/Z and BiSS/SSI1 1 BiSS bus structure1 0 BiSS bus loopback

Table 4: Mode Configurations

FMSELx pins include pull-down resistors. When thereis no external connection to FMSELx pins, A/B/Z andU/V/W is the default selected mode.

A/B/Z and U/V/W Mode

If FMSEL2 = 0 and FMSEL1 = 0, iC-HF is configuredin A/B/Z and U/V/W mode. A/B/Z and U/V/W modeis the default mode. In this mode all 6 channels workas line drivers. Single ended input signals at pins X1to X6 are converted into differential output signals atpins Q1/NQ1 to Q6/NQ6. Output signals follow RS-422standard.

Output Enable pin ”OEN” must be set hi to enable differ-ential output signals. When working as 6-channel linedriver, pins NX1 to NX3 are disabled. An example ofiC-HF working as a 6-channel line driver is presentedin figure 8.

iC-HF


ENCODERLINK

POWERDOWN

RS422Output

RS422Output

RS422Output

RS422Output

RS422Output

RS422Output

DETECTION

OVERTEMP

REQUESTCONTROL

FMSEL1

FMSEL21

3..5.5V

LOGIC

NERRI

VDDS

GNDS

NERR

BYPR

PoDo

PoDo

ECM

EBIS

GND

VDD

OEN

NQ2

OVT

NQ4

NQ3

NQ1

NQ5

OVT

PTC

NQ1

NQ6

1uF

NX3

NX1

1uF

BYP

NX2

TRI

TRI

Q6

Q2

Q3

Q5

Q1

Q1

Q4

X5

X1

X3

X4

X6

X2

1

Q5

NQ3

GND

NQ2

FMSEL1

X1

VDD

Q4

Q3

Q1

VDDS

NX3

NX2

FMSEL2

NQ1

Q6

NX1

X5

X6 NQ6

NQ4

NQ1TRI

NERRI

ECM

NERR

GNDS

EBIS

PTC

X3

OEN

Q2X2

Q1

X4

NQ5

Figure 8: A/B/Z and U/V/W mode, 6 channel linedriver

In A/B/Z and U/V/W mode it is possible to enter En-coder Link State. If Encoder Link State in this modeis entered, signals at pins X1 to X6 are directly linkedto output pins Q1 to Q6. Input signals at pins NX1 toNX3 are also linked to output pins NQ1 to NQ3. Alto-

gether, 9 lines are available in A/B/Z and U/V/W modein Encoder Link State.

To enter Encoder Link State, ECM pin must be set hiand two signals must be input at pins Q1 and NQ1following a specific timing sequence. This timing se-quence is called Encoder Link Sequence. More infor-mation about entering Encoder Link State on page 22.

iC-HF


ENCODERLINK

POWERDOWN

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

REQUESTCONTROL

FMSEL1

FMSEL21

3..5.5V

LOGIC

NERRI

VDDS

GNDS

NERR

BYPR

PoDo

PoDo

EBIS

ECM

GND

VDD

OEN

NQ5

NQ1

OVT

NQ6

NQ2

NQ3

NQ1

OVT

NQ4

PTC

NX3

BYP

1uF

NX1

1uF

NX2

TRI

Q4

Q1

Q3

Q6

Q2

Q5

Q1

X2

X3

X1

X4

X6

X5

1

Q6

Q1

NX1

GND

Q4

Q5

NX2

X1

GNDS

FMSEL1

X6

X3

ECM

NX3

NQ1

EBIS

FMSEL2

OEN

NQ2

VDDS

NQ6

PTC

NERRI

Q1

Q2

NQ5

VDD

NQ4

NQ3

NERR

Q3

X4

NQ1

X5

X2

Figure 9: A/B/Z and U/V/W mode, 9 lines in EncoderLink State

A/B/Z and BiSS/SSI modeIf FMSEL2 = 0 and FMSEL1 = 1, iC-HF is configuredin A/B/Z and BiSS/SSI mode. In A/B/Z and BiSS/SSIMode channels 1, 2 and 3 work as line drivers, similarto A/B/Z and U/V/W mode.

Channels 4, 5 and 6 are used for implementingBiSS/SSI communication in RS-422. This allows com-


Rev D3, /41

municating with a sensor using BiSS protocol andRS-422 physical layer, suitable for industrial environ-ments. The sensor’s BiSS lines should be connectedto pins X4, X5 and X6 of iC-HF. The BiSS/SSI mastermust use pin pairs Q4/NQ4, Q5/NQ5 and Q6/NQ6 forBiSS communication.

Channel 4 is configured as an RS-422 output driverand carries SLO signal. SLO from the sensor in singleended form must be connected to input pin X4. Thesignal SLO will be delivered by pins Q4/NQ4 to themaster following the RS-422 standard.

Channels 5 and 6 are configured as RS-422 inputdrivers. Channel 5 carries MA signal and delivers itto the sensor through pin X5 in a single ended signal.Channel 6 does the same with SLI signal.

iC-HF


ENCODERLINK

POWERDOWN

RS422Output

RS422Output

RS422Output

RS422Ouput

DETECTION

OVERTEMP

RS422Input

RS422Input

CONTROL REQUEST

FMSEL2

FMSEL1

1

3..5.5V

LOGIC

NERRI

GNDS

VDDS

NERR

BYPR

PoDo

PoDo

ECM

EBIS

VDD

GND

OEN

NQ1

NQ1

OVT

NQ5

SLO

OVT

NQ2

NQ6

NQ3

SLONQ4

PTC

1uF

NX2

1uF

NX3

NX1

BYP

MAMA

TRI

TRI

TRI

SLITRI

TRI

SLI

Q3

Q1

Q4

Q6

Q2

Q1

Q5

X4

X5

X6

X2

X3

X1

_

1

_

+

+

X1

X5

Q1

NQ1TRI

X2

NQ3NX3

FMSEL1

NQ5

NQ4

ECM

Q2

PTC

NQ2

Q5

VDD

NERR

X6

TRI

X3

GNDS

NQ6

GNDVDDS

EBIS

OEN

FMSEL2

Q1

Q3

Q6

TRI

NQ1

NERRI

NX1

Q4X4

NX2

TRI

Figure 10: A/B/Z and BiSS/SSI mode, 3 channelsline driver

In A/B/Z and BiSS/SSI mode it is possible to enter En-coder Link State. Only channels 1, 2 and 3 can enterEncoder Link state in this mode. Signals at pins X1to X3 are directly linked to output pins Q1 to Q3 andsignals at pins NX1 to NX3 to output pins NQ1 to NQ3.Altogether, 6 lines are available in A/B/Z and BiSS/SSImode under Encoder Link State.

iC-HF


ENCODERLINK

POWERDOWN

RS422output

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

RS422Input

RS422Input

REQUESTCONTROL

FMSEL1

FMSEL21

3..5.5V

LOGIC

NERRI

VDDS

GNDS

NERR

BYPR

PoDo

PoDo

ECM

EBIS

GND

VDD

OEN

NQ1

NQ2

SLO

PTC

NQ5

OVT

SLONQ4

NQ1

OVT

NQ6

NQ3

1uF

NX2

NX1

1uF

BYP

NX3

MAMA

TRI

TRI

TRI

SLISLI

TRI

Q2

Q1

Q6

Q5

Q4

Q3

Q1

X4

X2

X3

X1

X5

X6

_

+_

1

+

OEN

VDD

GNDS

EBIS

NQ2

Q3

Q2

GND

X3

ECM

VDDS

Q4X4

NQ3

Q1

NX2

FMSEL2

X5

NERR

Q6X6

NX1

NQ6TRI

NQ4

NERRI

NQ1

FMSEL1

PTC

NX3

X2

X1

NQ5

Q5

Q1

NQ1

TRI

TRI

Figure 11: A/B/Z and BiSS/SSI mode, 6 lines in En-coder Link State

To enter Encoder Link State, ECM pin must be set hiand two signals must be input at pins Q1 and NQ1following a specific timing sequence. This timing se-quence is called the Encoder Link Sequence. For moreinformation about entering Encoder Link State on page22.

BiSS bus structureIf FMSEL2 = 1 and FMSEL1 = 1, iC-HF is configured inBiSS bus structure mode. This mode allows to com-municate with a sensor BiSS and including the sensorin a BiSS bus structure/topology. Signals will followRS-422 protocol, making it suitable for industrial envi-ronments. For using this mode it is necessary that thesensor connected to iC-HF has an BiSS bus compatibleinterface.

In BiSS bus structure mode each differential channelcarries a specific line from BiSS bus:

Channel Number Input/Output BiSS Signal1 output MA output2 output SLO3 output SL output4 input MA input5 input SLI6 input SL input

Table 5: Differential channel function in BiSS bus struc-ture mode


Rev D3, /41

iC-HF


ENCODERLINK

POWERDOWN

RS422Output

RS422output

RS422output

DETECTION

OVERTEMP

RS422Input

RS422Input

RS422Input

REQUESTCONTROL

FMSEL1

FMSEL21

3..5.5V

LOGIC

NERRI

GNDS

VDDS

NERR

BYPR

PoDo

PoDo

EBIS

ECM

GND

VDD

OEN

MAo

MAo

PTC

SLO

OVT

NQ2

NQ4

SLO

NQ1

NQ1

OVT

NQ3

NQ6

NQ5

NX2

BYP

1uF

NX3

NX1

1uF

SLoSLo

MAiMAi

SLiSLi

TRI

TRI

TRI

SLISLI

TRI

TRI

Q2

Q4

Q3

Q5

Q1

Q1

Q6

X1

X3

X2

X5

X4

X6

_

_

+

+

1

+_

GNDS

TRI

X1

OEN

Q1

NQ5

Q5

X6

NERRI

NX3NQ3

Q6

X2

VDD

FMSEL2

PTC

TRI

Q3

NX1

VDDS

NX2

NQ6

Q2

EBIS

X5

TRI

Q4

X3

X4

TRI

NQ1

Q1

GND

NQ4

NQ1

FMSEL1

ECM

NQ2

NERR

Figure 12: BiSS bus structure mode

In BiSS bus structure mode it is possible to enter En-coder Link State. Only channels 1, 2 and 3 can enterEncoder Link state in this mode. Signals at pins X1to X3 are directly linked to output pins Q1 to Q3 andsignals at pins NX1 to NX3 to output pins NQ1 to NQ3.Altogether, 6 lines are available in BiSS bus structuremode under Encoder Link State, as it is shown in Figure13.

iC-HF


ENCODERLINK

POWERDOWN

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

RS422Input

RS422Input

RS422Input

CONTROL REQUEST

FMSEL2

FMSEL1

1

3..5.5V

LOGIC

NERRI

VDDS

GNDS

NERR

BYPR

PoDo

PoDo

ECM

EBIS

GND

VDD

OEN

NQ2

NQ6

PTC

NQ5

NQ1

NQ4

OVT

NQ1

NQ3

OVT

NX3

NX2

1uF1uF

NX1

BYP

MAiMAi

SLiSLi

SLI

TRI

TRISLI

TRI

TRI

Q2

Q5

Q1

Q6

Q1

Q3

Q4

X1

X5

X6

X2

X4

X3

+

_

+

_

_

1

+

TRINQ6

X2

X3

ECM

TRI

X6

NERR

Q6

NX2

NX1

Q5

Q4

X1

NQ1

Q3

X5

GNDS

NQ4

VDD

FMSEL2

VDDS

FMSEL1

PTC

NQ1

OEN

Q2

GND

EBIS

NQ3

Q1

NQ5

NQ2

X4

NX3

NERRI

TRI

Q1

Figure 13: Encoder Link State in BiSS bus structuremode

Figure 14 shows an example of connecting several sen-sor nodes in a BiSS bus structure using iC-HF. Thelocation of the channels has been modified in the pic-ture to have a clearer view of the data flow in the bus.

In the example, the slave nodes do not have SLo andSLi pins. Therefore, pins X3 and X6 should be exter-nally connected to allow proper data flow.


Rev D3, /41

iC-HF iC-HFiC-HF

BiSSSLAVENODEBiSSSLAVENODE BiSSSLAVENODE

FMSEL2 FMSEL2 FMSEL2

FMSEL1FMSEL1 FMSEL1

VDDS VDDS VDDS

MAO

MAO

MAO

X1

X3

X2

X1

X6

X6

X4

X2

X3

X4

X3

X6

X5

X4

X5

X1

X5

X2

MAo MAo

MAoMAo MAo

MAo

SLO

NQ2

SLO

NQ4

NQ6

NQ4

SLO

SLO

SLO

NQ5

SLO

NQ3

SLO

NQ3 NQ6

NQ2

NQ6

NQ5

NQ1

NQ3

NQ2

SLO

NQ1

NQ5

SLO

NQ4

SLo

SLo SLoSLo

SLoSLo

MAi MAiMAi

MAi MAiMAi

MAI

MAI

MAI

SLiSLi

SLi

SLi

SLi SLi

SLI

SLI

SLI

SLI

SLI

SLI

SLI

SLI

SLI

Q6

Q2

Q1Q1

Q3

Q1

Q6

Q2

Q4Q4Q4

Q5 Q2

Q3 Q3

Q5Q5

Q6

X4

X1

X6

X6

X1

X4

X6

X3

X2

X5

X3

X4

X5

X1

X3

X2

X4

X5

X2

+ +

_

__+

+

+

+_

_

+

_

_

+

_

_

+

Q5

X6

NQ4

NQ2

X1 Q1

NQ3

Q6

NQ5

VDDS

Q3

SLI

NQ6

SLI

Q3

SLO

NQ1

X1

X5

FMSEL2

X2

Q3

X4

X3

X6

X5

NQ2

X4Q4

NQ5

FMSEL1

NQ2

NQ4

FMSEL1

NQ3

NQ4

MAO

X3

X5

SLO

X4

MAI

Q2

MAI

NQ5

X2

NQ1

Q1

Q5Q2

X3

X6

FMSEL1

Q6

X4

MAI

FMSEL2

VDDS

X1

X2

NQ6

Q4

VDDS

Q5

SLI

Q6

MAO

Q2

Q1

NQ6

MAO

FMSEL2

Q4

SLO

NQ3

Figure 14: Several slave nodes in BiSS bus structureBiSS bus loopback

If FMSEL2 = 1 and FMSEL1 = 0, iC-HF is configuredin BiSS bus loopback mode. This mode is a particularcase of BiSS bus structure mode, where iC-HF is op-erated as the termination node/loopback of the BiSSbus.

BiSS bus loopback allows addressing the case wherethe BiSS Bus is damaged. If the bus is somehow dam-aged, e.g. a broken wire, data will be interrupted andno communication will be possible. The last node pre-vious to the point of damage can be configured as atermination node of the BiSS bus by setting FMSEL = 0,avoiding the need of re-wiring last node’s output chan-nels. Therefore communication between nodes beforethe damage point will still be possible. iC-HF doesnot detect a BiSS bus structure damage nor activateautomatically the BiSS bus loopback.

When the iC-HF is configured as a termination nodeof the BiSS bus, some channels configurations arechanged with respect to BiSS bus loopback mode.Channel 1 is disabled and pins Q1/NQ1 will be in highimpedance. The clock input signal MA entering chan-

nel 4 is no longer transmitted along the bus throughchannel 1.

Output signals from channel 2 will also be disabled,setting Q2/NQ2 to high impedance. Input signals atX2 will be internally connected to channel 3 and outputthrough pins Q3/NQ3. The data input signal SLI en-tering channel 5 is no longer transmitted through SLOat channel 2. The data input signal SLI is transmittedthrough signals SLo at channel 3.

Input signals at X3 are disabled. The data return inputsignals SLi at channel 6 will no longer be transmittedthrough channel 3.

Table 6 summarizes each differential channel’s functionin this mode.


Rev D3, /41

Channel Number Input/Output BiSS Signal1 disabled -2 disabled -3 output SL output4 input MA input5 input SLI6 input -

Table 6: Differential channel function in BiSS bus loop-back mode

In BiSS bus loopback mode it is possible to enter En-coder Link State. Only channels 1, 2 and 3 can enterEncoder Link state in this mode. Signals at pins X1to X3 are directly linked to output pins Q1 to Q3 andsignals at pins NX1 to NX3 to output pins NQ1 to NQ3.Altogether, 6 lines are available in BiSS bus loopbackmode under Encoder Link State, as it is shown in Figure16.

iC-HF


ENCODERLINK

POWERDOWN

RS422Output

RS422output

DETECTION

OVERTEMP

RS422Input

RS422Input

RS422Input

CONTROL REQUEST

FMSEL2

FMSEL1

1

HIGHZ

HIGHZ

HIGHZ

HIGHZ

3..5.5V

LOGIC

NERRI

VDDS

GNDS

NERR

BYPR

PoDo

PoDo

EBIS

ECM

VDD

GND

OEN

SLO

NQ1

NQ6

PTC

NQ1

NQ2

OVT

NQ4

NQ5

OVT

NQ3NX3

NX2

NX1

1uF1uF

BYP

SLo

MAiMAi

TRI

SLISLI

TRI

TRI

TRI

TRI

TRI

Q1

Q5

Q1

Q6

Q2

Q4

Q3

X4

X6

X2

X3

X5

X1

+

1

_

_

+

+

_

NQ3

FMSEL1

X4

Q5

NX2

NQ1

NX3

EBIS

GND

TRI

TRI

X1

NX1

NERRI

Q3

Q2

TRI

NQ5

Q1

NQ6

FMSEL2

X5

TRINQ1

X3

NQ4

NERR

Q6

Q1

GNDS

OEN

TRI

ECM

NQ2

PTC

Q4

X2

VDD

X6

VDDS

Figure 15: BiSS bus loopback mode

iC-HF


ENCODERLINK

POWERDOWN

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

RS422Input

RS422Input

RS422Input

CONTROL REQUEST

FMSEL1

FMSEL21

3..5.5V

LOGIC

NERRI

GNDS

VDDS

NERR

BYPR

PoDo

PoDo

EBIS

ECM

VDD

GND

OEN

PTC

NQ3

NQ4

NQ1

NQ1

NQ6

NQ2

OVT

OVT

NQ5

NX1

1uF

BYP

1uF

NX2

NX3

MAiMAi

SLiSLi

TRI

TRI

SLI

TRI

SLI

TRI

Q1

Q6

Q5

Q1

Q3

Q2

Q4

X6

X5

X1

X4

X2

X3

+

1

_

+

+_

_

FMSEL2

Q5

TRI

X3

X5

Q6

NX1

NERRI

VDDS

Q1

PTC

NQ3

Q1

X2

OEN

NQ1

NX3

NQ2

X1

EBIS

X4

FMSEL1

Q3

TRINQ4

TRI

Q4

NERR

GND

NQ6

VDD

Q2

NQ5

GNDS

ECM

X6

NX2

NQ1

Figure 16: Encoder Link State in BiSS bus loopbackmode

Figure 17 shows an example of several sensor nodesin BiSS bus using each iC-HF for a bus capabletransceiver. The location of the channels has beenmodified in the picture to have a clearer view of thedata flow in the bus.

The example shows the case of a broken cable. Thenode in the middle is configured as the bus terminator.Data flow occurs from left to right. When reaching themiddle node, it goes back in the left direction.

The slave nodes typically do not have SLo and SLipins. Therefore, pins X3 and X6 should be externallyconnected in order to allow proper data flow.


Rev D3, /41

BUSTERMINATION

iC-HFiC-HFiC-HF

DAMAGED

BiSSSLAVENODEBiSSSLAVENODE BiSSSLAVENODE

CABLE

FMSEL2FMSEL2

FMSEL1 FMSEL1FMSEL1

FMSEL2

VDDSVDDS VDDS

MAO

MAO

MAO

X2

X4

X2

X1

X6

X3

X1

X4

X3

X4

X6

X5

X1

X5

X5

X6

X3

X2

MAo

MAo

MAo

MAo

MAo

NQ6

NQ1

NQ3

SLO

NQ5

NQ4

NQ3

SLO

NQ2

SLO

NQ1

NQ6

SLO

SLO

NQ6

SLO

NQ5

NQ4

NQ2

NQ1

NQ3

SLO

NQ2

SLO

NQ4

NQ5

SLo

SLo

SLo

SLo SLo

SLo

MAi

MAi

MAi

MAi

MAi

MAi

MAI

MAI

MAI

SLi

SLi SLi

SLi

SLi

SLI

SLI

SLI

SLI

SLI

SLI

SLI

SLI SLI

Q3 Q6 Q3Q6

Q1Q4

Q2 Q5

Q3

Q2

Q4Q1 Q4 Q1

Q2Q5

Q6

Q5

X4

X2

X5

X2

X5

X3

X4

X1

X5

X3

X3

X1

X1

X6

X4

X2

X6

X6

_

_

_

+ +

+

++

_

_

+

_ _

+

+

_

+_

NQ1

X4

NQ3

X1

Q5

MAI

X5

FMSEL2

X2

X1Q4

VDDS

FMSEL1

Q6

SLO

NQ3

X3

Q3

NQ6

MAI

NQ4

FMSEL1

X3

NQ3

Q4

Q2

MAO

X3

X6

Q6

X1

MAO

X5

NQ2

SLO

Q1 Q4 X4

Q3

VDDS

Q1

X2

Q5

FMSEL2

MAO

Q5

NQ5

SLI

X5

FMSEL1

X4Q1

NQ4

NQ5

NQ4

FMSEL2

Q6

NQ6VDDS

NQ5

Q2

NQ1

NQ2

NQ1

SLO

X2

NQ2

Q3

Q2

SLI

SLI

X6

NQ6

MAI

X6

Figure 17: BiSS bus with node in BiSS bus loopback


Rev D3, /41

INTERNAL PROTECTION AND ERROR SIGNALING

iC-HF is protected against internal overtemperature.When internal temperature is higher than a safety value(cf. Electrical Characteristics no. 005), an overtemper-ature event (OVT) is triggered and all output stagesare set to high impedance though internal signal ”TRI”.Output stages are also left in high impedance if a pow-er-down (PoDo) event is detected.

When the channel outputs are in high impedance, thisis signaled through output pin NERR. NERR is anopen-drain output and it goes lo when an overtempera-ture or power-down event is triggered, when OEN is lo,or when NERRI input is set lo.

The logic state of signal at input pin NERRI is directlypassed to NERR output. This allows transferring an

error signal from the sensor through iC-HF. If not used,NERRI should always be set hi.

Figure 18 shows an example of using NERRI pinfor combining the external NERRI input signal fromiC-MH16 with the iC-HF internal OVT and PoDo errorsignals to NERR output. In this example, iC-HF is inA/B/Z and U/V/W mode, operating as a set of 6 linedrivers.

The open drain NERR output is protected against ex-ternal short circuit. An error LED can be driven directlyand used for visual warning or the NERR signal can beconnected to a microcontroller interrupt pin.

iC-MH16 iC-HF


ERRORMONITOR

INCRINTERFACE

ENCODERLINK

POWERDOWN

RS422output

RS422output

RS422output

RS422output

RS422output

DETECTION

INTERFACE

OVERTEMP

CONTROL REQUEST

NERRFMSEL2

FMSEL1

4.5..5.5V

SERIAL

1

RS422

LOGIC

NERRI

GNDS

VDDS

NERR

NERR

BYPR10kΩ

PoDo

PoDo

EBIS

ECM

VDD

GND

VNDOEN

VPD

VPA

VNA

SLO

NQ4

PTC

OVT

NQ2

NQ1

NQ5

OVT

NQ3

NQ6

NQ1

BYP

1uF 1uF

NX2

NX3

NX1

MA

W

TRI

TRI

SLI

Q3

Q1

Q5

Q4

Q6

Q2

Q1X1

X5

X6

X4

X3

X2

A

V

U

B

Z

W

mto C

V

U

A

B

1

Z

SLO

VNA

Q6X6

Q4

X5Q5

VDD

NX1

NQ6

Q1

VDDS

Q1

NERR

MA

OEN

EBIS

Q3

NQ1

U

FMSEL2

V

TRIZX1

VPA

NERR

W

NQ3

SLI

GND

X3

X4

ECM

NQ1

NX2 NQ2

PTC

NERRI

A

GNDS

VPD

FMSEL1

X2

NX3

NQ5

NQ4

Q2

B

VND

Figure 18: NERR signaling example in A/B/Z and U/V/W mode


Rev D3, /41

REVERSE POLARITY PROTECTION

iC-HF is protected against applying reverse supply volt-age at pins VDD and GND. Connecting a power supplywith reverse polarity to an unprotected chip would per-manently damage it.

iC-HF has a reverse polarity detection block. When areverse polarity connection is detected, iC-HF providesthe following protection actions:

• Power supply for internal blocks is disabled

• The RS422 output drivers are supplied by VDD.

• The RS422 output drivers are high impedancewhen VDD not ok.

• This high impedance when VDD is not includeslines Q1 to Q6, NQ1 to NQ6 and NERR line.

iC-HF also provides extended reverse polarity protec-tion through output power supply lines VDDS (VDDswitched) and GNDS (GND switched). These pins areconnected to VDD and GND through a protecting switch.When a reverse polarity is detected at VDD/GND,VDDS and GNDS are internally disconnected. If asensor is supplied by iC-HF through VDDS/GNDS lines,the polarity protection on iC-HF will be extended to thesensor.

VDDS can supply a maximum of 60 mA (cf. ElectricalCharacteristics no. 003). The current consumptionof the sensor connected to the protected supply pinsshould not exceed this value.

Figure 19 shows connection of a sensor through ex-tended reverse polarity protection.

SENSOR

iC-HF


ERRORMONITOR

ENCODERLINK

POWERDOWN

DETECTION

OVERTEMP

CONTROL REQUEST

FMSEL1

FMSEL2

0...-5.5V

1

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

RS422

LOGIC

NERRI

VDDS

GNDS

NERRNERR

BYPR

10kΩPoDo

PoDo

ECM

EBIS

GNDGND

VDD VDD

OEN

OVT

PTC

NQ2

NQ1

NQ6

NQ4

NQ5

OVT

NQ1

NQ3NX3

1uF

NX2

NX1

1uF

BYP TRI

TRI

Q6

Q1

Q1

Q3

Q5

Q4

Q2

X1

X4

X2

X3

X5

X6W

V

B

A

U

Z

1

OEN

NQ1

A

Q5

Q6

VDD

ECM

Q4

X3

NERR

GND GND

U

NQ1

GNDS

V

Q3Z

Q1

NQ2X2

VDDS

NX3

FMSEL1

PTC

Q1

VDD

NQ6

X4

FMSEL2

X1

X6

Q2

TRI

NERRI

EBIS

NQ3

NQ5

NX2

NX1

NERR

NQ4

B

X5

W

Figure 19: Extended reverse polarity protectionIt is possible to connect to iC-HF a sensor that demandsmore than the maximum permissible load current (cf.Electrical Characteristics no. 003). However, connec-tion of the sensor to iC-HF pins VDDS and GNDSshould be avoided. A load exceeding this maximumvalue will prevent iC-HF to comply with electrical char-acteristic no. 701 and no. 702. Instead, the sensor

should be supplied directly through pins VDD and GND.Figure 20 shows an example.

If configuration in Figure 20 is implemented, it must benoticed that iC-HF will still be protected against reversepolarity but this will not be the case of the sensor.


Rev D3, /41

SENSOR

iC-HF


ERRORMONITOR

ENCODERLINK

POWERDOWN

DETECTION

OVERTEMP

CONTROL REQUEST

NERRFMSEL1

FMSEL2

3...5.5V

1

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

RS422

LOGIC

NERRI

GNDS

VDDS

NERRNERR

BYPR

10kΩPoDo

PoDo

EBIS

ECM

GND

VDD

GND

VDD

OEN

OVT

NQ4

NQ2

NQ1

NQ1

NQ5

NQ6

OVT

PTC

NQ3NX3

NX1

1uF

NX2

1uF

BYP

WTRI

TRI

Q5

Q1

Q2

Q6

Q3

Q1

Q4X4

X1

X6

X3

X2

X5 V

A

B

U

Z

W

mto C

V

U

A

B

1

Z

NERR

X2

Q4

Z

VDDS

NERRI

GND

X4

X1A

VDD

Q5

Q3NX2

GND

NX3

VDD

FMSEL2

Q6

NQ5

EBIS

ECM

X3

X5

NQ4

FMSEL1

Q1

NQ1

U

NQ1

V

OEN

W

Q2

NQ3

Q1

GNDS

X6

PTC

TRI

NQ6

NERR

B

NQ2

NX1

Figure 20: Example connection for a sensor with exceeding the maximum permissible load currentFigure 21 shows an alternative example. In this case,VDD and GND lines are short-circuited with VDDS andGNDS lines. This configuration option is permitted,

but it is however not recommended. Connecting VDDand GND to VDDS and GNDS prevents having reversepolarity protection in iC-HF.


Rev D3, /41

SENSOR

iC-HF


ERRORMONITOR

ENCODERLINK

POWERDOWN

DETECTION

OVERTEMP

CONTROL REQUEST

NERRFMSEL1

FMSEL2

3...5.5V

1

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

HIGHZ

RS422

LOGIC

NERRI

VDDS

GNDS

NERRNERR

BYPR

10kΩPoDo

PoDo

EBIS

ECM

VDDVDD

GNDGND

OEN

NQ6

NQ1

PTC

OVT

NQ5

NQ1

NQ2

NQ3

NQ4

OVT

NX2

1uF

1uF

NX3

NX1

BYP

W

TRI

TRI

Q4

Q3

Q1

Q6

Q1

Q5

Q2

X3

X1

X4

X2

X6

X5

A

V

U

B

W

Z

mto C

B

A

V

U

1

Z

NERR

Q5

B

VDD

NX3

Q2

NERRI

NQ6

OEN

GND

NQ2

U NQ4

NERR

ECM

NQ3

X2

NX1

V

NX2

VDDS

X1

X6

FMSEL2

Z

NQ1

EBIS

NQ5

FMSEL1

NQ1

X4

W

PTC

Q1A

TRI

Q3

Q4

Q1

GND

VDD

X3

X5

Q6

GNDS

Figure 21: Alternative example connection for a sensor with exceeding the maximum permissible loadcurrent


Rev D3, /41

ENCODER LINK SEQUENCE

All modes A/B/Z and U/V/W, and A/B/Z and BiSS/SSI,and BiSS bus structure, and BiSS loop back modessupport Encoder Link State. FMSEL1 may have anystate and is uncritical for reaching the Encoder LinkState. In this state some input signals at pins Xi andNXi are linked directly to outputs Qi and NQi. The pinsthat are linked in the Encoder Link State depend on thefunction mode. In A/B/Z U/V/W 9 lines are available,while in the remaining modes there are 6 lines avail-able. This feature allows having direct access to analogsignals of the sensor from pins Qi/NQi for calibrationpurposes.

To enter Encoder Link State, ECM pin must be set hiand two signals must be input at pins Q1 and NQ1following a specific timing sequence. This timing se-quence is called the Encoder Link Sequence. No ad-ditional pin is needed in to enter Encoder Link State.ECM can be used to inhibit entering the Encoder LinkState. If ECM is lo, the Encoder Link Sequence willnever be acknowledged.

An example of this sequence is presented in figure 22.The sequence is divided into three time intervals orsteps: t1, t2 and t3:

• In the first step both pins Q1 and NQ1 must bedriven hi during a specific amount of time. Thistime is stored by a Finite State Machine and mustfulfill the requirements specified by parameter ts,which is typically 50µs (cf. Electrical Characteris-tics no. 803). Therefore, the following conditionmust be satisfied:ts(min) < t1 < ts(max)

• In the second step, both pins Q1/NQ1 must bereleased. They will go back to complementarystate (in BiSS bus loopback mode Q1 must bepulled hi and NQ1 lo externally). In the exampleof figure 22, input X1 is high and therefore Q1goes high and NQ1 low when released. Q1/NQ1must be kept in complementary state during anamount of time as close as possible to t1. Themaximum allowed time tolerance is specified byparameter ∆ts, (cf. Electrical Characteristics no.804).(t1 -∆ts) < t2 < (t1 +∆ts)

• In the final step both pins Q1 and NQ1 must bedriven lo during an amount of time as close aspossible to t1. The following condition must befulfilled:(t1 -∆ts) < t3 < (t1 +∆ts)

• After t3 is elapsed, pins Q1/NQ1 must be re-leased.

• Once released, iC-HF will enter Encoder LinkState.

If any of the steps explained above is not fulfilled, theEncoder Link Sequence will be interrupted. A new at-tempt to enter Encoder Link State will have to start fromthe beginning of the Encoder Link Sequence.

There are 2 possibilities to exit Encoder Link State.Driving ECM pin lo will exit the configuration. Normally,ECM will be connected to VDDS. A power-down eventalso exits Encoder Link State, without the need of anextra pin.

EncoderLink

Q1

NQ1

ECM

PTC

t1 t2 t3

Figure 22: Time diagram of the Encoder Link Sequence


Rev D3, /41

iC-PTxxyy/ iC-PT-Hxxyy mode control

iC-HF is a general purpose 6-channel line driver. iC-HFis suitable to be operated with iC-PTxxyy and iC-P-T-Hxxyy opto encoder.

If iC-PTxxyy input pin SEL is lo, A/B mode is selectedand iC-PTxxyy delivers complementary digital A/B/Zsignals. If iC-PTxxyy input pin SEL is hi, iC-PTxxyy is inA/B mode with two fold interpolation. When iC-HF en-ters Encoder Link State output pin PTC provides VDD/2to iC-PTxxyy and therefore iC-PTxxyy is forced to enteranalog mode. In this analog mode, analog signals fromthe photosensors are directly output.

In order to improve the noise rejection and stability atpin PTC, an external 10nF capacitor CPTC can be addedbetween PTC and GNDS pins.

External pull-up and pull-down resistors at SEL pin canbe used in order to select the iC-PTxxyy working mode.iC-HF output PTC pin is used to control the iC-PTxxyyto output analog signals. When Encoder Link mode isentered, PTC delivers VDD/2 voltage. If connected toSEL pin from iC-PTxxyy, this will enter analog modeand signals from the photosensors will be present atoutput pins Qi/NQi from iC-HF.

Figure 23 shows how to connect iC-PTxxyy and iC-HFin order to force Analog Mode in iC-PTxxyy when iC-HFenters Encoder Link. The recommended resistor valuesare given in table 7. See page 26 for more informationon driving an iC-PTxxyy with iC-HF.

iC-PTxxyyHiC-PTxxyy iC-HF

GNDS

VDDS

GND

VCC

PTCSELR1

R2GND

VCC VDDS

PTC

GNDS

SEL

Figure 23: iC-PTxxyy and iC-HF connection for Ana-log Mode selection.

SEL R11) R21) Operation Mode100 % VCC 10 kΩ open ABZ x2 interpolated

50 % VCC open open all analog0 % VCC open 10 kΩ x1 interpolated

1) Exemplary values.

Table 7: Selection of iC-PTxxyy operation mode by pinSEL.

iC-PT-Hxxyy opto encoder include 3 additional workingmodes. Table 8 gives the recommended resistor valuesfor fixing any working mode and allowing All Analogmode when iC-HF enters Encoder Link.

SEL R11) R21) Operation Mode100 % VCC 2.7 kΩ open x2 interpolated

75 % VCC 12 kΩ 48 kΩ analog ABZ, dig. UVW50 % VCC open open all analog25 % VCC 48 kΩ 12 kΩ x4 interpolated

0 % VCC open 2.7 kΩ x1 interpolated1) Exemplary values.

Table 8: Selection of iC-PT-Hxxyy operation mode bypin SEL.


Rev D3, /41

RS-422 RECEIVER CONFIGURATION

In A/B/Z and BiSS/SSI mode, BiSS bus structure mode,and BiSS bus loopback mode some channels are con-figured as RS-422 receivers. Table 9 presents thefunction modes together with the channels that are con-figured as RS-422 receivers.

Function mode RS-422 receiving channelsA/B/Z and BiSS/ISS channel 5 and 6BiSS bus structure channel 4, 5 and 6BiSS bus loopback channel 4, 5 and 6

Table 9: RS-422 receiving channels

Some parameters are important in characterizing thereceiver: the input voltage (VQi and VNQi), the differen-tial voltage (Vid), and the common mode voltage (Vic),where:

Vid = VQi − VNQi

Vic = VQi+VNQi2

Figure 24 shows these voltages.

-+

RS422Input

VNQi

GND

VQi

NQi

+Vid

Vic

-

Qi

XiVid

+ VQiXi

Qi

GND

NQi-Vic

VNQi

Figure 24: RS-422 input sensitivity

Possible voltage ranges of RS-422To comply with the possible voltage ranges of RS-422standard, the RS-422 receiver must fulfill the followingrequirements:

• Over an entire common mode voltage ranging from-7 V to 7 V the receiver should not require a differen-tial input voltage of more than |200 mV| to correctlyassume the intended binary state.

• The receiver has to maintain correct operation for dif-ferential input voltages ranging from 200 mV to 10 Vin magnitude.

• The maximum input voltage (VQi, VNQi) shall notexceed 10 V in magnitude.

• The receiver must be able to operate with a maximumdifferential of 12 V without being damaged.

Figure 25 illustrates the minimum and maximum oper-ating voltages of the receiver.

-10V

TransitionRegion

Vid

Vid

MaximumOperatingRange

+10V

-200mV

+200mV

Figure 25: RS-422 input maximum and minimum op-erating voltages

It is not allowed in iC-HF to apply negative input sig-nals or signals higher than supply voltage. Followingthese requirements, table 10 shows the sensitivity, theminimum and the maximum values at the receiver.

Parameter Minimum MaximumVi(Qx) 0 V 5.5 V

Vi(NQx) 0 V 5.5 V|Vid| 50 mV 5.5 VVic 800 mV 5.5 V

Table 10: RS-422 sensitivity and input voltages

To comply with the total voltage ranges of RS-422 ex-ternal resistors can be placed in line of the input pinseach receiver. The resistor value is 16.9 kΩ with a tol-erance of 1%. The relative tolerance of both resistors(matching) requires a tolerance of 0.1%.An elegant solution is an integrated resistor networkwith a matching better 0.1% e.g. :

• Vishay ACAS 0606 for a point-to-point BiSS interface(MA+/- input) with two resistors each 4 pin package.

• Vishay ACAS 0612 for a BiSS bus structure interface(MA+/-, SLI+/- inputs) with four resistors each 8 pinpackage.


Rev D3, /41

It is recommended to locate such optional resistorsclosely and symmetrically to the related RS-422 inputpins. If these resistors are used, the sensitivity, the min-imum, and the maximum input voltages at the receiverare shown in table 11. With these resistors in use ameasurement between iC-HF and the resistors can besensitive due to possible additional capacitive load ofprobe(s).

Figure 26: External resistors layout location examplefor RS-422 receiver

Parameter Minimum MaximumVi(RTQx) -10 V 10 V

Vi(RTNQx) -10 V 10 V|Vid| 200 mV 12 VVic -7 V 7 V

Table 11: RS-422 sensitivity and input voltages with ex-ternal resistors

In addition to the external resistors, the bus terminationresistor of 120Ω should be placed between both inputsof the receiver. Figure 27 shows this configuration.

+-

RS422Input

Vi(RTNQx)

Vi(RTQx)

16k9

16k9

NQI 120+-

QI

XI Rt

-+XI

NQI

QI

Figure 27: RS-422 receiver with external resistors

iC-HF allows RS-422 communication up to 10 MHz. Athigh frequencies the performance can be improved byusing 1 pF capacitors parallel with each external resistor(excluding the bus termination resistor). Some designsdo provide such similar capacity already by layout.

Note:Operating iC-HF sole at full RS422 operational voltagelevels will cause permanent damage to the device.The iC-HF is designed to handle 5V RS422 signalson the serial BiSS/SSI interface.For full 12 V / -7 / ±10 V RS422 operation the RS422receiver input resistor networks as described are rec-ommended.In order to utilize the full RS422 operational voltagerange possible protective diodes and TVS diodesneed to be RS422 compatible types.

Unused/open RS-422 input pinsTo avoid oscillations on open or unused pins a stablestate is recommended. Unused or open RS-422 inputpins can be to be connected to a stable voltage. Thevoltage of the positive and negative input pin needsto be bigger than the input hysteresis. In the caseof unused input pins the Qi and NQi pins should beconnected to field sided, different, stable input voltageslike VDD and GND.

Example for stable input voltages on unused/openpins:• Qi = VDD• NQi = GND


Rev D3, /41

APPLICATION EXAMPLES

All figures indicate only the basic operation with iC-HFand do not contain all details, connections, configura-tions and options for a working system.

iC-HF can drive a wide range of applications and combi-nations of sensors and interpolators and their possiblesignals and interfaces. In this chapter, a group of exam-ples on interconnecting different devices with iC-HF ispresented.

• The blocking capacitor at VDD - GND will helpto reduce the spikes due to the RS422 driversswitching.

• A better blocking against spikes at the iC can beimproved by placing the capacitor closer to theiC-HF.

Function Mode iC-PTxxyy iC-MU iC-MH16 iC-NQiC-PT-Hxxyy iC-MHM

A/B/Z and U/V/W X X XA/B/Z and BiSS/SSI X X X

Table 12: Applications and modes

iC-PTxxyy/ iC-PT-Hxxyy

Figure 28 shows an example of using iC-HF fordriving iC-PTxxyy/ iC-PT-Hxxyy, which are threecomplementary channel photodiode arrays. iC-P-Txxyy/iC-PT-Hxxyy are supplied through the reversepolarity protected supply pins, VDDS and GNDS.

FMSEL1 and FMSEL2 are set to lo, therefore iC-HFis in A/B/Z and U/V/W mode, a 6 channel RS-422 linedriver.

A pull-down resistor (10 kΩ for iC-PTxxyy, 2.7 kΩ foriC-PT-Hxxyy) at SEL pin forces iC-PTxxyy/ iC-PT-Hxxyyto work in A/B operation x1 interpolated. Outputs PA,PB, and PZ are connected to pins X1 to X3. There-

fore, A, B, and Z signals are transmitted under RS-422protocol through channels 1 to 3. Signals U, V, and Ware connected to inputs X4 . . . X6 and outputs throughchannels 4 to 6. Set the OEN pin hi for channel en-abling.

iC-HF enters Encoder Link State when ECM pin is set tohi. Pins NA, NB, and NZ from iC-PTxxyy/ iC-PT-Hxxyyare connected to NX1, NX2, and NX3 respectively. PTCfrom iC-HF is connected to SEL from iC-PTxxyy/ iC-P-T-Hxxyy. After a successful Encoder Link Sequence,SEL/PTC node will be driven at VDDS/2. iC-PTxxyy/Hwill enter analog mode and all signals will be directlylinked to output pins Qi/NQi.


Rev D3, /41

iC-PTxxyyH

iC-PTxxyy -+

iC-HF


ENCODERLINK

COMPARATION

COMMUTATION

POWERDOWN

QUADRATURE

DETECTION

OVERTEMP

CONTROL

CONTROL

REQUEST

RS422I/O

RS422I/O

NERR

OUTPUT

FMSEL2

3.5..5.5V

FMSEL1

OUTPUT

POWER

SIGNAL

1

RS422

RS422

RS422

RS422

LOGIC

INDEX

NERRI

GNDS

VDDS

NERR

BYPR

PoDo

PoDo

ECM

EBIS

VDDVCC

GND

GND

AND

OEN

OVT

NQ2

NQ3

NQ1

LED

NQ1

NQ4

OVT

PTC

LED

NQ5

NQ6

SEL

1uF

BYP

NX2

1uF

NX1

NX3

BYP

BYP

+W

TIP

TRI

TRI

TIN

NB

NA

PA

PB

-

Q4

Q2

Q6

Q5

Q1

Q1

Q3

X4

NZ

X1

X2

X3

X6

X5

PZ

A

V

B

U

Z

W

V

U

1

Q1

PB

ECM

U

NQ1

-

GND

NQ5

SEL

Q2

NQ6

PZ

TRI

Q6

EBIS

NX2Q3

PTC

TIP

NA

X4

TIN

V

PA

VDDS

NZ

X6

VDD

X3

X5

VCC

FMSEL1 NERR

NQ1

BYP

GND

Q4

NX1

NQ2

NQ4

FMSEL2

LED

NQ3

NERRI

X2

+

NB

Q1

NX3

W

OEN

GNDS

X1

Q5

Figure 28: Example application of iC-PTxxyy/ iC-PT-Hxxyy in A/B operation x1 interpolated with iC-HF


Rev D3, /41

iC-MH16, iC-MH8, iC-MHM

Figure 29 shows an example driving iC-MH16, a 12bit angular Hall encoder (iC-MH16, iC-MH8, iC-MHMcan also be used). iC-HF provides reverse polarityprotection.

In this example, FMSEL1 and FMSEL2 are low andA/B/Z and U/V/W mode is selected. All 6 channels workas RS-422 line drivers. OEN is set hi and all channelsare enabled. iC-MH16 has no complementary outputs,therefore pins NX1 . . . NX3 from iC-HF are kept discon-nected.

After a valid Encoder Link Sequence all connected sig-nals at X1 to X6 will be directly linked to outputs Q1 toQ6.

NERR output from iC-MH16 is connected to input pinNERRI of iC-HF. Any error occurring either on iC-MH16or on iC-HF will be signaled through NERR output pinfrom iC-HF.

iC-MH16 iC-HF


ERRORMONITOR

INCRINTERFACE

ENCODERLINK

POWERDOWN

RS422output

RS422output

RS422output

RS422output

RS422output

DETECTION

INTERFACE

OVERTEMP

CONTROL REQUEST

NERRFMSEL2

FMSEL1

4.5..5.5V

SERIAL

1

RS422

LOGIC

NERRI

GNDS

VDDS

NERR

NERR

BYPR10kΩ

PoDo

PoDo

EBIS

ECM

VDD

GND

VNDOEN

VPD

VPA

VNA

SLO

NQ4

PTC

OVT

NQ2

NQ1

NQ5

OVT

NQ3

NQ6

NQ1

BYP

1uF 1uF

NX2

NX3

NX1

MA

W

TRI

TRI

SLI

Q3

Q1

Q5

Q4

Q6

Q2

Q1X1

X5

X6

X4

X3

X2

A

V

U

B

Z

W

mto C

V

U

A

B

1

Z

SLO

VNA

Q6X6

Q4

X5Q5

VDD

NX1

NQ6

Q1

VDDS

Q1

NERR

MA

OEN

EBIS

Q3

NQ1

U

FMSEL2

V

TRIZX1

VPA

NERR

W

NQ3

SLI

GND

X3

X4

ECM

NQ1

NX2 NQ2

PTC

NERRI

A

GNDS

VPD

FMSEL1

X2

NX3

NQ5

NQ4

Q2

B

VND

Figure 29: Example application with iC-MH16 in A/B/Z and U/V/W modeMind voltage and current requirements for programming/zapping OTP devices with iC-HF use.


Rev D3, /41

iC-MH16 is a BiSS slave. If FMSEL1 from iC-HF is sethi, A/B/Z and BiSS/SSImode is selected and iC-HF canbe used to communicate through BiSS with iC-MH16.This is shown in figure 30.

Signals U, V, and W are replaced by BiSS signals MA,SLO, and SLI. Input RS-422 signals at channels 5 and6 in the example include the adaptation resistors, to-gether with the RS-422 bus termination resistor. Seepage 24 for more information about RS-422 receiverconfiguration.

iC-MH16 iC-HF


ERRORMONITOR

INCRINTERFACE

ENCODERLINK

POWERDOWN

RS422Output

RS422Output

RS422Output

RS422Output

DETECTION

INTERFACE

OVERTEMP

RS422Input

RS422Input

CONTROL REQUEST

NERRFMSEL2

FMSEL1

SERIAL

1

SLO

4..5.5V

RS422

LOGIC

NERRI

VDDS

GNDS

NERR

NERR

tomC

10kΩ BYPR

PoDo

PoDo

MA

SLI

ECM

EBIS

GND

VDD

VNDOEN

VPD

VPA

VNA

SLO

PTC

NQ1

NQ5

NQ2

NQ1

OVT

OVT

NQ4SLO

NQ3

NQ6

1uF

NX1

NX2

1uF

NX3

BYP

MA MA

SLI

TRI

TRI

TRI

TRI

SLI

Q4

Q5

Q3

Q6

Q1

Q1

Q2

X3

X4

X2

X6

X5

X1

A

B

WZ

A

V

B

U

+

Z

_

1

_

+NQ6

Q4

A

GNDS

SLI

ECM

NQ5X5

NERR

Q6

Q1

X3

X4

Q1

NX3

TRI

NX2

GND

MA

NERR

VDD

PTC

FMSEL1

VDDS

NQ1

VPA

X6

OEN

VNA

EBIS

NX1

FMSEL2

WNQ3

NQ2

NERRI

TRI

Q2

V

UX2

TRI

Z

VND

NQ4

Q5

Q3

NQ1

VPD

X1

SLO

B

Figure 30: Example application with iC-MH16 in A/B/Z and BiSS/SSI mode


Rev D3, /41

iC-MU

iC-MU is an off-axis nonius encoder with integrated Hallsensors. An example of iC-MU with iC-HF is shown infigure 31.

In this example, iC-MU is in ABZ function and iC-HFin A/B/Z and U/V/W mode. These signals are deliv-

ered through output pins PB0 to PB2, and PB3. iC-HFprovides reverse polarity protection.

A microcontroller communicates with iC-MU. It can au-tomatically enable/disable iC-HF output channels bydriving OEN pin. NERR from iC-HF is used as externalinterrupt.

iC-MUseries

EEPROM

iC-HF


uC

ANA/DIGOUTPUT

SERINTERFACE

ENCODERLINK

I2CINTERFACE

POWERDOWN

RS422output

RS422output

RS422output

RS422output

RS422output

RS422output

DETECTION

OVERTEMP

CONTROL REQUEST

FMSEL2

FMSEL1

1

4..5.5V

NER

NER

LOGIC

NERRI

VDDS

GNDS

NERR

BYPR

10kΩ

PoDo

PoDo

EBIS

ECM

GND

VDD

OEN

VPD

SDA

VND

VNA

VPA

NQ1

NQ2

OVT

PTC

OVT

NQ6

SCL

NQ5

NQ4

NQ1

NQ3

PB3

PA2

PA1

PA0

1uF

PB2

1uF

NX2

NX3

PB0

PA3

NX1

BYP

PB1

TRI

TRI

TRI

Q1

Q3

Q2

Q5

Q1

Q4

Q6

X1

X6

X2

X4

X5

X3

A

A

BB

ZZ

1

EBIS

NQ2

Q3

Q6

GND

X4

NQ5

X1

NQ6

PTC

VDD

NX2

FMSEL2

VPA

NQ3X3

PA0

VDDS

VNAFMSEL1

Q1

GNDS

PB0

OEN

X6

ECM

TRI

PB1

SDA

NERRI

Q2

NQ1

PB2

NQ1

PB3

Q1

Q5

VND

Q4

PA3

TRI

X2

PA1

VPD

SCL

NX1

NX3

X5

PA2

NQ4

NERR

Figure 31: Example application with iC-MU and microcontroller with iC-HF in A/B/Z and U/V/W mode


Rev D3, /41

Since ECM pin is held hi, it is possible to enter EncoderLink State with the Encoder Link Sequence at pinsQ1/NQ1. iC-HF is in A/B/Z and U/V/W mode, therefore9 Encoder Link lines are in use.

In Encoder Link State, I2C bus lines SCL and SDA aretransmitted in the example through pins NQ1 and NQ2.

A command can be sent to the microcontroller throughI2C to modify the state of iC-MU and select analogmode. In this mode, positive and negative sine, andpositive and negative cosine signals are output via pinsPB0 to PB3. These analog signals are directly linked toiC-HF output pins Q1 to Q4.

iC-MUseries

EEPROM

iC-HF


uC

ANA/DIGOUTPUT

SERINTERFACE

ENCODERLINK

I2CINTERFACE

POWERDOWN

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

CONTROL REQUEST

FMSEL2

FMSEL1

4.5..5.5V

PCMPCM

NCMNCM

NSM

PSMPSM

NSM

1

SDA

LOGIC

SCL

NERRI

GNDS

VDDS

NERR

BYPR

PoDo

PoDo

EBIS

ECM

VDD

GND

SDA

OEN

VPD

VND

VPA

VNA

NQ4

OVT

NQ2

NQ1

NQ1

PTC

OVT

SCL

NQ3

NQ6

NQ5

PA2

PA0

NX3

PB3

NX2

1uF

NX1

PB2

PB1

PB0

BYP

PA1

PA3

1uF

TRI

Q4

Q5

Q6

Q2

Q1

Q1

Q3

X1

X3

X4

X2

X6

X5

1

NQ4

NERRI

VNA FMSEL2

PA1

FMSEL1

Q3

NX2

Q5

PTC

X2

Q1

OEN

NX3

VPD

GND

Q6

NQ2

X6

VPA

Q2

PA3

PB0

VDDS

SCL

X1

PA0

Q1

X3

NQ1

NQ6

EBIS

NQ1

PA2

NERR

PB1

ECM

NQ3

GNDS

VDD

X4

SDA

NQ5

VND

PB3

X5

NX1

Q4

PB2

Figure 32: Example application with iC-MU and microcontroller with iC-HF in Encoder Link State


Rev D3, /41

As shown in figure 33 iC-MU can also be operated as aBiSS slave. Master clock MA is input through, channel5, data input SLI though channel 6, and data outputSLO is sent through channel 4.

iC-MU is initially in ABZ function, and signals are outputin RS-422 protocol by pins Q1, NQ1, Q2, NQ2, and Q3,NQ3. In ABZ function, PB3 provides the error signal

from iC-MU. In the example, this signal is connected toNERRI from iC-HF and transferred through NERR.

PB3 is also connected to NX3 from iC-HF. If iC-MUchanges to analog function and iC-HF enters EncoderLink State, analog signals at PB0 to PB3 will be linkedinside iC-HF and output through pins Q1, Q2, Q3, andNQ3.

iC-MUseries

EEPROM

iC-HF


ANA/DIGOUTPUT

SERINTERFACE

ENCODERLINK

I2CINTERFACE

POWERDOWN

RS422output

RS422output

RS422output

RS422output

DETECTION

OVERTEMP

RS422Input

RS422Input

CONTROL REQUEST

NERR

4.5..5.5V

FMSEL1

FMSEL21

NER

SLO

SLO LOGIC

NERRI

GNDS

VDDS

NERR

BYPR

10kΩ

PoDo

PoDo

MA

MASLI

SLIEBIS

ECM

VDD

GND

SDA

VPD

VND

OEN

VPA

VNA

OVT

NQ5

OVT

SCL

NQ2

PTC

NQ4

NQ1

NQ1

NQ6

NQ3

PB1

PA2

PB3

NX1

BYP

PA3

1uF

PB0

PA1

NX2

NX3

1uF

PB2

PA0

TRI

TRI

TRI

TRI

Q6

Q4

Q3

Q1

Q5

Q2

Q1X1

X6

X5

X4

X2

X3

AA

BB

ZZ

1

_

+

+

_

FMSEL2

PA1

Q2

X5

Q1

NQ4

VPD

X4

EBIS

SDA

Q5

TRI

VDDS

PB3

Q3

NQ2

PB0

PA0

NERR

VND

Q6

X1

NQ1

GNDS

X3

GND

FMSEL1

X2

NERRI

VNA

X6

VPA

TRI

PB2

OEN

NX3

Q1

TRI

Q4

PTC

SCL

NQ1

NX1

NQ5

NQ6

PB1

VDD

PA2

ECM

NQ3

NX2

PA3

Figure 33: Example application with iC-MU and iC-HF in A/B/Z and BiSS/SSI mode


Rev D3, /41

If it is desired to use only three channels of iC-HF (chan-nels 1, 2, and 3), it is possible to implement BiSS com-munication with no need for extra channels. This canbe achieved by using pins NQ1, NQ2, and NQ3. Figure34 shows this example.

To achieve this, iC-HF must be configured either inA/B/Z and U/V/W mode (as in this example) or in A/B/Zand BiSS/SSI mode. In default state, iC-HF is a set

of line drivers and signals. PB0, PB1, and PB2 fromiC-MU are output through channels 1, 2 and 3 as differ-ential signals. With the Encoder Link Sequence at pinsQ1/NQ1, iC-HF enters Encoder Link State. Pins NQ1,NQ2 and NQ3 are directly connected to NX1, NX2 andNX3 respectively. It is possible to access the BiSS in-terface of iC-MU through these three lines, as shown infigure 34.

iC-MUseries

EEPROM

iC-HF


ANA/DIGOUTPUT

SERINTERFACE

ENCODERLINK

I2CINTERFACE

POWERDOWN

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

REQUESTCONTROL

NERRFMSEL2

4.5..5.5V

FMSEL1

1

NERSLO

LOGIC

NERRI

GNDS

VDDS

NERR10kΩ

BYPR

PoDo

PoDo

MA

SLI

ECM

EBIS

VDD

GND

OEN

VND

SDA

VPD

VNA

VPA

NQ2

SLO

PTC

OVT

NQ4

SCL

NQ1

NQ6

NQ5

NQ1

NQ3

OVT

NX3

NX2

PA2

PA1

PA0

NX1

PB3

PA3

1uF 1uF

PB2

BYP

PB1

PB0

MA

SLI TRIQ1

Q4

Q1

Q5

Q6

Q3

Q2X2

X5

X4

X6

X1

X3

AA

BB

ZZ

1

X5NQ5

VDD

NERRI

EBIS

Q6

NX3

VNA

Q4

NQ6

NQ4

PA3

VPA

PTC

PA0

PB1

GNDS

PB2

Q1

X1

Q2

OEN

FMSEL1 NERR

PA1

PA2

X4

X6

NQ2

Q3

Q1

NX2

VND

ECM

Q5

PB0

X2

SDASCL

NX1

GND

PB3

FMSEL2

X3

NQ1

VPD

NQ1

VDDS

NQ3

Figure 34: Example application with iC-MU in A/B/Z mode and iC-HF in Encoder Link State with BiSS atchannels 1,2, and 3


Rev D3, /41

iC-NQC

iC-NQC is a 13-bit sin/cosine-to-digital converter withcalibration and can also be driven by iC-HF, as shownin figure 35. iC-HF provides reverse polarity protectionto the sensor side interface through pins VDDS andGNDS.

In the example, iC-NQC is a BiSS slave node. iC-HF isconfigured in A/B/Z and BiSS/SSI mode through pinsFMSEL2 and FMSEL1. BiSS signals SLO, MA andSLI are carried through iC-HF channels 4, 5 and 6,respectively.

In Encoder Link State the TMA mode of iC-NQC canbe activated to bypass analog sine/cosine signals on A,B, SDA and SCL signals.

In a default mode, channels 1, 2 and 3 from iC-HF areoperated as RS-422 line drivers, outputting A, B andZ signals from iC-NQC. An EEPROM is used in theexample and it is accessed via I2C bus. I2C signals arealso connected to iC-HF input pins NX1 and NX2. IfiC-HF enters Encoder Link State, signals at X1 to X3and NX1 to NX3 will be directly linked to output pins Q1to Q3 and NQ1 to NQ3. Therefore, in this configurationthe I2C bus will be available at pins NQ1 and NQ2.

Error signal from iC-NQC is connected to NERRI ofiC-HF. This allows combining an error event fromiC-NQC with an error event of iC-HF that is signaled atNERR output of iC-HF.

iC-NQCiC-HF


EEPROM

CONTROLLOGIC

ENCODERLINK

INCREMENTAL

POWERDOWN

RS422Output

DETECTIONINTERFACE

INTERFACE

OVERTEMP

RS422Input

RS422Input

CONTROL REQUEST

NERR

E2PROM

4.5..5.5V

OUTPUT

FMSEL1

FMSEL21

SDA

SLO SLO

RS422

RS422

RS422

LOGICSCL

NERRI

VDDA

GNDS

VDDS

GNDA

NERR

NERR

BYPR

10kΩ

PoDo

PoDo

MA

MA

SLI

SLI

EBIS

BISS

ECM

GND

VDDVDD

GND

OEN

SDA

SDA

NQ2

NQ4

OVT

NQ5

NQ1

SCL

OVT

NQ6

SCL

PTC

NQ1

NQ3

SLO

NX1

BYP

NX3

BYPBYP

NX2

1uF1uF

MA

TRI

TRI

TRI

TRI

SLI

TRI

Q3

Q1

Q5

Q1

Q4

Q6

Q2X2

X3

X6

X5

X4

X1

A

A

BB

ZZ

A

B

+

Z

_

_+

1

X4

TRI

NQ5

NERR

NQ6

NQ1

PTC

NQ2

NX1

GNDA

Q3

Q1

EBIS

TRI

NERRI

SCL

NERR

X3

SLI

X5

NQ3

NQ4

ECM

FMSEL1

GNDS

Q4

FMSEL2

OEN

GND

NX3

A X1

X6

BYP

SDA Q6

GND

NQ1

VDDS

Q2

VDD

Z

Q1

B

TRI

TRI

MA

SLO

VDD

X2

NX2

VDDA

Q5

Figure 35: Example application of iC-NQC with iC-HF


Rev D3, /41

ADDITIONAL EXAMPLES

All figures indicate only the basic operation with iC-HF and do not contain all details, connections, configurationsand options for a working system.

8 lines encoder operation for ABZ, BiSS and 5 V power supply

iC-HF iC-HF

REVERSEPOLARITYPROTECTIONREVERSEPOLARITYPROTECTION

ENCODERLINKENCODERLINK

POWERDOWN POWERDOWN

RS422Output

RS422Output

RS422Output

RS422Output

RS422Output

RS422Output

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

DETECTIONDETECTION

OVERTEMP OVERTEMP

REQUEST CONTROLCONTROL REQUEST

FMSEL1

FMSEL2

FMSEL1

FMSEL211

3..5.5V3..5.5V

LOGIC LOGIC

NERRINERRI

VDDS

GNDS

VDDS

GNDS

NERR NERR

BYPRBYPR

PoDoPoDo

PoDoPoDo

ECM

EBISEBIS

ECM

VDD VDD

GNDGND

OEN OEN

NQ1

OVTOVT

NQ2

NQ3

NQ5

NQ4

NQ6

PTC

OVT

NQ5

NQ1

PTC

NQ2

NQ3

OVT

NQ1

NQ6

NQ1

NQ4

SLO SLO

1uF

NX2

NX1

BYP

NX3

NX1

1uF

NX2

BYP

1uF

NX3

1uF

MAMA

TRI

SLI SLI

TRI

Q1

Q1

Q2

Q6

Q4

Q2

Q3 Q3

Q4

Q5

Q6

Q5

Q1

Q1

X6

X2

X1

X5

X3

A+

X6

X4

B+

X1

X2

X4

X5

X3 Z+

B-

A-

Z-

A

B

Z

1 1

Q2

Q3

X4

PTC

X3

FMSEL2

NERRI

NQ5

PTC

Q2

Q1

FMSEL1

X1

X5

NQ4

OEN

GNDS

VDD

ECM

NQ4

NERR

NQ1

X3

X4

Q6

NQ1

NQ6

FMSEL2

NQ2

EBIS

NQ3

EBIS

NERRI

X2

Q6

NX3

NERR

NX1

NQ1

Q1

Q5

X6

NX1

Q4

FMSEL1

GND

X1

NQ5

Q5

NX3

VDD

X5

Q3

NQ3

NQ2NX2

Q4

NQ1

GNDS

X6

Q1

NQ6

VDDS VDDSGND

NX2

OEN

ECM

X2

Q1

Figure 36: iC-HF with BiSS + A/B/Z using only 8 linesThe left side of figure 36 shows the standard operationof the incremental encoder with differential lines ofA+/A-, B+/B-, Z+/Z-, and 5 V power supply. With activeEncoder Link State figure 36 on the right side showingthe Encoder Link State operation of the incrementalencoder with TTL lines of A, B, Z, BiSS(MA), BiSS(SLI),BiSS(SLO), and 5 V power supply.

The NERR signal is optional and incorporates a sen-sor’s NERR signal and the iC-HF line driver error status.

The SLI signal is only required if the sensor needs tobe operated in a BiSS bus structure or if MO control isrequired.


Rev D3, /41

iC-MU with P2P BiSS and iC-HF in Encoder Link State

iC-MUseries

iC-HF


ANA/DIGOUTPUT

SERINTERFACE

ENCODERLINK

POWERDOWN

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

REQUESTCONTROL

NERRFMSEL1

FMSEL2

4.5..5.5V

1

SLO

SLO LOGIC

NERRI

GNDS

VDDS

NERR

BYPR

10kΩ

PoDo

PoDo

n.c.

MA

MA

ECM

EBIS

VDD

GND

SDA

OEN

VND

VPDVPA

VNA

PTC

NQ1

NQ2

NQ6

NQ1

OVT

OVT

SCL

NQ4

NQ5

NQ3

PA1

PB0

PB1

PA2

PA3

BYP

PA0

1uF

NX1

PB2

1uF

NX2

PB3

NX3

TRIQ1

Q6

Q1

Q3

Q2

Q5

Q4

X2

X4

X3

X5

X1

X6

A

B

Z

1

PA3

PB0

NQ6

X4

NERRI

PB2

X1

X2

VND

PA1

NQ5

EBIS

X6

VDDS

NQ4

NX3

FMSEL1

Q6

PTC

Q1

NX2

X5

NX1

Q5

Q3

NQ1

PB3

Q2

VDD

NQ1

SCL

X3

Q4

SDA

GNDS

FMSEL2

NERR

NQ2

NQ3

PA0

VNA

VPD

ECM

GND

OEN

PA2

Q1

VPA

PB1

Figure 37: iC-MU with TTL ABZ and TTL BiSS (MA + SLO)The iC-MU is forced to be operated with BiSS by PA0to GND.

The iC-MU SLI input can be forced to GND if the BiSScommunication is point-to-point.

With active Encoder Link State figure 37 shows the En-coder Link State operation of the incremental encoder

with TTL lines of A, B, Z, BiSS(MA), BiSS(SLO), and5 V power supply.

The NERR LED signal is optional and incorporates asensor’s NERR signal and the iC-HF line driver errorstatus.


Rev D3, /41

iC-LNB with SPI and iC-HF in Encoder Link State

iC-LNB

iC-HF


uC

ENCODERLINK

POWERDOWN

LEDCONTROL

SINE/COSINE

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

EncoderLink

DETECTION

OVERTEMP

CONTROL REQUEST

Power-On

NERR

MOSI

MISO

FMSEL1

FMSEL21

4..5.5V

SCK

MISO1

LOGIC

MOSI1

MOSI2

MISO2

NERRI

PCOS

NCOS

GNDS

VDDS

DOUT

NERR

SCK1

NCS1

SCK2

NCS2

BYPR

PoDo

PoDo

TEST

MISO

MOSI

INCB

INCA

PSIN

ECM

NSIN

EBIS

VDD

GND

VDD

GNDGND

VDD

INCZ

SCK

OEN

POKPAR

SER

ERR

OVT

OVT

NQ4

PTC

NQ2

NQ3

TPC

CLK

NQ1

TNC

NQ6

NQ5

LED

NQ1

BYP

NX2

1uF

1uF

TNS

TPS

NSL

NX1

NX3

XJD

DIN

INC

SPI

GB

TRI

GA

CS

Q4

Q5

Q2

Q6

Q3

Q1

Q1

X2

X5

X4

X3

X6

X1 A

B

Z

1

X2

X1

GND

PCOS

FMSEL1

NX1

NSIN

SCK

VDD

Q5

ECM

NQ6

LED

MOSI1

SCK1

TPS

CS

GA

PSIN

VDD

TNC NQ3

Q6

NCS1

XJD

TPC

NQ4

DOUT

GBNERR

Q3

Q2

GND

TNS

NERRI

MOSI2

VDDS

FMSEL2

NQ1

X3

OEN

MISO2

INCZ

Q4

NQ2

GND

DIN

VDD

POK

Q1

MISO1

X4

NCS2

ERR

NX2

NCOS

MISO

SCK2

NX3

NSL

PTC

CLK

INCB

Q1

X6

NQ5

NQ1

GNDS

EBIS

INCA

MOSI

X5

Figure 38: iC-LNB with TTL ABZ and TTL SPI in Encoder Link StateThe iC-LNB is configured by the sensor’s microcon-troller via SPI where iC-LNB is the SPI slave and themicrocontroller is the SPI master.

The microcontroller and its flash ROM is configuredand accessed by an additional 3 wire capable SPIcommunication where microcontroller is the SPI slaveand the external host is the SPI master.

With active Encoder Link State figure 38 shows theEncoder Link State operation of the incremental en-coder with TTL lines of A, B, Z, SPI(CLK), SPI(MISO),SPI(MISO), and 5 V power supply.

The NERR signal is optionally available and incorpo-rates a sensor’s NERR signal and the iC-HF line drivererror status.


Rev D3, /41

DESIGN REVIEW

iC-HF YNo. Function, parameter/code Description and application notes

None at time of release.

Table 13: Notes on chip functions regarding iC-HF chip release Y.


Rev D3, /41

REVISION HISTORY

Rel. Rel. Date∗ Chapter Modification PageA1 2014-03-21 Initial release.

Rel. Rel. Date∗ Chapter Modification PageB1 2014-12-10 ABSOLUTE MAXIMUM RATINGS Item G009: increased from 2 kV to 4 kV 6

ELECTRICALCHARACTERISTICS

Item 506: R Termination = 120Ω added 8

ELECTRICALCHARACTERISTICS

Item 901: Optional CPTC 10nF added 8

CHANNEL DESCRIPTION OEN and TRI description added 9INTERNAL PROTECTION ANDERROR SIGNALING

Internal signal TRI description added 16

ENCODER LINK SEQUENCE Time diagram of the Encoder Link Sequence updated and FMSELx signals removed 20ENCODER LINK SEQUENCE iC-PTxxyy mode control updated and iC-PT-Hxxyy mode control added 21ENCODER LINK SEQUENCE External capacitor CPTC option added 21APPLICATION EXAMPLES Figure 27 example application of iC-PTxxyy/ iC-PT-Hxxyy updated and OTP devices

application detail added25

TRI added in relevant figures on pages 1, 9, 11. . . 14, 16. . . 19, 25. . . 35 1. . . 35

Rel. Rel. Date∗ Chapter Modification PageC1 2016-04-08 ELECTRICAL

CHARACTERISTICSItem 303: Ilk range updated from ±12µA to ±35µA 8

APPLICATION EXAMPLES Figure 29: iC-MH16 added 28APPLICATION EXAMPLES Figure 38: updated wiring quadrature encoder application only 37

Rel. Rel. Date∗ Chapter Modification PageD1 2018-05-17 All Figures updated, blue body 1 . . . 36

APPLICATION EXAMPLES iC-MH replaced by iC-MH16 3, 17, 25,27, 28

PACKAGING INFORMATION Thermal Paddle TP renamed to Backside Paddle BP 4ELECTRICALCHARACTERISTICS

Item 009, 010 and 011 added 7

APPLICATION EXAMPLES NERRI detail on pull resistor in figures added 26 . . . 33FUNCTION DESCRIPTION Figure ?? and Figure ??BBL) updated ?? and

??

Rel. Rel. Date∗ Chapter Modification PageD2 2018-10-12 ELECTRICAL

CHARACTERISTICSItem 303: symbol updated to Vi(Qx), Vi(NQx) 8

RS-422 RECEIVERCONFIGURATION

Table 10: Vi updated to Vi(Qx), Vi(NQx) 24


Figure 26 input pins Vi updated to Vi(Qx), Vi(NQx) 25


Note regarding 5 V RS422 and full RS422 voltage range added 25


Example layout for RS422 input receivers added 25

DESIGN REVIEW Chapter added 38

Rel. Rel. Date∗ Chapter Modification PageD3 2018-12-21 ENCODER LINK SEQUENCE Figure 22 and related description updated 22

∗ Release Date format: YYYY-MM-DD


Rev D3, /41

iC-Haus expressly reserves the right to change its products and/or specifications. An Infoletter gives details as to any amendments and additions made to therelevant current specifications on our internet website www.ichaus.com/infoletter and is automatically generated and shall be sent to registered users by email.Copying – even as an excerpt – is only permitted with iC-Haus’ approval in writing and precise reference to source.

The data specified is intended solely for the purpose of product description and shall represent the usual quality of the product. In case the specifications containobvious mistakes e.g. in writing or calculation, iC-Haus reserves the right to correct the specification and no liability arises insofar that the specification was froma third party view obviously not reliable. There shall be no claims based on defects as to quality in cases of insignificant deviations from the specifications or incase of only minor impairment of usability.No representations or warranties, either expressed or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunderwith respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. Inparticular, this also applies to the stated possible applications or areas of applications of the product.

iC-Haus products are not designed for and must not be used in connection with any applications where the failure of such products would reasonably beexpected to result in significant personal injury or death (Safety-Critical Applications) without iC-Haus’ specific written consent. Safety-Critical Applicationsinclude, without limitation, life support devices and systems. iC-Haus products are not designed nor intended for use in military or aerospace applications orenvironments or in automotive applications unless specifically designated for such use by iC-Haus.iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trademark rights of a third party resulting from processing or handling of the product and/or any other use of the product.

Software and its documentation is provided by iC-Haus GmbH or contributors "AS IS" and is subject to the ZVEI General Conditions for the Supply of Productsand Services with iC-Haus amendments and the ZVEI Software clause with iC-Haus amendments (www.ichaus.com/EULA).

http://www.ichaus.com/infoletter

http://www.ichaus.com/EULA


Rev D3, /41

ORDERING INFORMATION

Type Package Options Order Designation

iC-HF QFN32 5 mm x 5 mm iC-HF QFN32-5x5

EvaluationBoard

100 mm x 80 mm eval board iC-HF EVAL HF1D

Please send your purchase orders to our order handling team:

Fax: +49 (0) 61 35 - 92 92 - 692E-Mail: [email protected]

For technical support, information about prices and terms of delivery please contact:

iC-Haus GmbH Tel.: +49 (0) 61 35 - 92 92 - 0Am Kuemmerling 18 Fax: +49 (0) 61 35 - 92 92 - 192D-55294 Bodenheim Web: http://www.ichaus.comGERMANY E-Mail: [email protected]

Appointed local distributors: http://www.ichaus.com/sales_partners

mailto:[email protected]

http://www.ichaus.com

mailto:[email protected]

http://www.ichaus.com/sales_partners

iC-HF 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER

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Transcript of iC-HF 6-CH. ENCODER LINK, RS-422 DRIVER/RECEIVER