IAF 0610 Hardware test design coursework

8/10/2019 IAF 0610 Hardware test design coursework

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Design of a combinational circuit for the following functionality

if x = 0, z = 0, then Y = k1A + k2B, else

if x = 0, z = 1, then Y = k3A - k1C, else

if x = 1, z = 0, then Y = (k1A !k1B "k2C) !(k3C !NOT (k3A) "k1B), else

if x = 1, z = 1, then Y = k4A2

+ k5A + k6

In order to avoid confusion, then using the boolean operation priority (from high to

low: NOT, "(AND), !(OR) ) I add parenthesis in the following way:

if x = 0, z = 0, then Y = k1A + k2B, else

if x = 0, z = 1, then Y = k3A - k1C, else

if x = 1, z = 0, then Y = (k1A !(k1B "k2C)) !(k3C !(NOT (k3A) "k1B)), else

if x = 1, z = 1, then Y = k4A2

+ k5A + k6

Then, given variant 12I use the following coefficients k1=0;k2=k3=1; k4=1,5;

k5=0,8; k6=0,5. Because 1 means inversion and 0 means the lack of inversion on every

bit of the word, the functionality the following form:

1. if x = 0, z = 0, then Y = A + NOT(B), else

2. if x = 0, z = 1, then Y = NOT(A) - C, else

3. if x = 1, z = 0, then Y = (A !(B "NOT(C) )) (NOT (C) !(A "B)), else

4. if x = 1, z = 1, then Y = 1,5*A2

+ 0,8 *A + 0,5


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Quadratic equation function (fourth)

I started with findingout the last (x=1, z=1) function's Y = 1,5*A2 + 0,8 *A + 0,5limit:

A A(3 downto 0) Y Y round Y (3 downto 0)

0 0000 0,5 1 0001

1 0001 2,8 3 0011

2 0010 8,1 8 1000

3 0011 16,4 15 1111

4 0100 27,7 15 1111

5 0101 42 15 1111

6 0110 59,3 15 1111

7 0111 79,6 15 1111

8 or

higher1000

102,915 1111

Because every bit of Y can have either 0 or 1, we need to build a total of 4 Karnaugh

maps for Y(0) to Y(3).


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Y(0):

Karnaugh map:

Y(0)A(3)A(2)

00 01 10 11

A(1)A

(0)

00 1 1 1 1

01 1 1 1 1

10 0 1 1 1

11 1 1 1 1

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Y(1):

Karnaugh map:

Y(0)A(3)A(2)

00 01 10 11

A(1)A

(0)

00 0 1 1 1

01 1 1 1 1

10 0 1 1 1

11 1 1 1 1

A*&(-?%B

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8IJ#(%'0IB


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Y(2):

Karnaugh map:

Y(0)A(3)A(2)

00 01 10 11

A(1)A

(0)

00 0 1 1 1

01 0 1 1 1

10 0 1 1 1

11 1 1 1 1

A*&(-?%B

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8IJ#(%'0IB


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Y(3):

Karnaugh map:

Y(0)A(3)A(2)

00 01 10 11

A(1)A

(0)

00 0 1 1 1

01 0 1 1 1

10 1 1 1 1

11 1 1 1 1

A*&(-?%B

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Logic function (third)

The implementation of third function was analogous to quadratic equation functions

one. At first reusable logic 1bit function was exported as cellview.

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ttbist -ginit 00000000000001 -gpoly

10000000001101 -ainit 00000000000001 -apoly

10000000001101 -simul cstp -optimize maincircuit4

23 56.9%


11001011110001 -ainit 00000000000001 -apoly


45 92.2%


10010101001001 -ainit 00000000000001 -apoly


174 97.6%


10001100010010 -ainit 00000000000001 -apoly


72 93.4%


00110011100101 -ainit 00000000000001 -apoly00110011100101 -simul cstp -optimize maincircuit4

60 91.5%


11001100011101 -ainit 00000000000001 -apoly


35 85.1%


10011011001010 -ainit 00000000000001 -apoly


112 98.7%


11110110101001 -ainit 00000000000001 -apoly


163 98.9%


10001100110010 -ainit 00000000000001 -apoly


83 93.9%


01001100110010 -ainit 00000000000001 -apoly


178 99.7%

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IAF 0610 Hardware test design coursework

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