Microcontroller 8051

Input/output Pins, Ports & Circuits

Rohith.P.N

IV th Sem ECE ‘B’ Sec

• As we know Microprocessor doesn't have inbuilt Input/output ports.

• It must add an additional chip to interface with the external circuitry/devices.

• This disadvantage is overcome by the Microcontroller 8051.

• MC 8051 has inbuilt I/O ports/circuits.• This helps the MC 8051 to connect with the external

devices/memory etc..

Pin Description of the 8051

1234567891011121314151617181920

4039383736353433323130292827262524232221

P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7RST

(RXD)P3.0(TXD)P3.1

(T0)P3.4(T1)P3.5

XTAL2XTAL1

GND

(INT0)P3.2(INT1)P3.3

(RD)P3.7(WR)P3.6

VccP0.0(AD0)P0.1(AD1)P0.2(AD2)P0.3(AD3)P0.4(AD4)P0.5(AD5)P0.6(AD6)P0.7(AD7)EA/VPPALE/PROGPSENP2.7(A15)P2.6(A14)P2.5(A13)P2.4(A12)P2.3(A11)P2.2(A10)P2.1(A9)P2.0(A8)

8051

Pin details of MC 8051The Microcontroller 8051 has 40 Pins.

I/O Port 0 Pins 32-37I/O Port 1 Pins 1-8I/O Port 2 Pins 21-28I/O Port 3 Pins 10-17

Pin 40 - VccPin 20 - GndPin 19 & 18 – XTAL1 & XTAL2Pin 9 – ResetPin 31 – EA (External Access)Pin 29 – PSEN ( Program Store Enable)Pin 30 – ALE (Address Latch Enable)

• Vcc （ pin 40 ）：–Vcc provides supply voltage to the chip. –The voltage source is +5V.

• GND （ pin 20 ）： ground• XTAL1 and XTAL2 （ pins 19,18 ）

• RST （ pin 9 ）： reset– It is an input pin and is active high （ normally low ） .• The high pulse must be high at least 2 machine cycles.

– It is a power-on reset.• Upon applying a high pulse to RST, the

microcontroller will reset and all values in registers will be lost.• Reset values of some 8051 registers

RESET Value of Some 8051 Registers:

0000DPTR

0007SP

0000PSW

0000B

0000ACC

0000PC

Reset ValueRegister

RAM are all zero.

• /EA （ pin 31 ）： external access

– There is no on-chip ROM in 8031 and 8032 .– The /EA pin is connected to GND to indicate the code is

stored externally.– /PSEN ＆ ALE are used for external ROM.– For 8051, /EA pin is connected to Vcc.– “/” means active low.

• /PSEN （ pin 29 ）： program store enable– This is an output pin and is connected to the OE pin of the

ROM.

• ALE （ pin 30 ）： address latch enable– It is an output pin and is active high.– 8051 port 0 provides both address and data.– The ALE pin is used for de-multiplexing the address

and data by connecting to the G pin of the 74LS373 latch.

• I/O port pins– The four ports P0, P1, P2, and P3.– Each port uses 8 pins.– All I/O pins are bi-directional.

• The 8051 has four I/O ports– Port 0 （ pins 32-39 ）： P0 （ P0.0 ～ P0.7 ）– Port 1 （ pins 1-8 ） ： P1 （ P1.0 ～ P1.7 ）– Port 2 （ pins 21-28 ）： P2 （ P2.0 ～ P2.7 ）– Port 3 （ pins 10-17 ）： P3 （ P3.0 ～ P3.7 ）– Each port has 8 pins.• Named P0.X （ X=0,1,...,7 ） , P1.X, P2.X, P3.X• Ex ： P0.0 is the bit 0 （ LSB ） of P0 • Ex ： P0.7 is the bit 7 （ MSB ） of P0• These 8 bits form a byte.

• Each port can be used as input or output (bi-direction).

Port Pin Circuit

Port 0 :-• When used as input,a ‘1’ must be written to

corresponding port latch• Used as an output,’0’ must be be programmed• Logic ‘1’ in address bit will turn Upper FET on & lower FET

off• After address has formed & latched into External circuitry

by ALE pulse,the External Bus is turned ON• Port 0 now reads data from External Memory• Port 0 pins can be accessed by address P0.0,P0.1,….,P0.7• It can also be addressed as AD0,AD1,…….AD7

Port 0 with Pull-Up Resistors

Port 1 :-

• Port 1 pins have no Dual functions• If used as input a ‘1’ is written to latch which

turns upper FET on• Used as output,lower FET is On & the Pullup is Off• Output latch is directly connected to gate of

Lower FET• Port 1 can be accessed as P1.0,P1.1,. . . . .P1.7

Port 2 :-

• It can be used as i/p or o/p which is similar in operation of Port 1

• The alternate use of port 2 is to supply a high-order address byte in conjunction with port 0 low-order byte to address external memory

• Port 2 latches remain stable when External Memory is addressed

• They do not have to be turned around (Set to 1) For Data i/p as in Port 0• It can be accessed as P2.0,P2.1,. . . . . ,P2.7

Port 3 :-• It is similar to port 1,but has alternate Uses• Each pin may be individually Programmed as I/O

or for alternate Functions as shownPin Alternate Use SFR

P3.0-RXD Serial data input SBUF

P3.1-TXD Serial data Output SBUF

P3.2-INT0 External interrupt 0 TCON.1

P3.3-INT1 External interrupt 1 TCON.3

P3.4-T0 External timer 0 input TMOD

P3.5-T1 External timer 1 input TMOD

P3.6-WR External Memory Write Pulse -

P3.7-RD External Memory Read Pulse -

Writing “1” to Output Pin P1.X

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pinP1.X

8051 IC

2. output pin is Vcc1. write a 1 to the pin

1

0 output 1

TB1

TB2

Writing “0” to Output Pin P1.X

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pinP1.X

8051 IC

2. output pin is ground1. write a 0 to the pin

0

1 output 0

TB1

TB2

Reading “High” at Input Pin

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pin

P1.X

8051 IC

2. MOV A,P1

external pin=High1. write a 1 to the pin MOV

P1,#0FFH

1

0

3. Read pin=1 Read latch=0 Write to latch=1

1

TB1

TB2

Reading “Low” at Input Pin

D Q

Clk Q

Vcc

Load(L1)

Read latch

Read pin

Write to latch

Internal CPU bus

M1

P1.X pin

P1.X

8051 IC

2. MOV A,P1

external pin=Low1. write a 1 to the pin

MOV P1,#0FFH

1

0

3. Read pin=1 Read latch=0 Write to latch=1

0

TB1

TB2