Hybrid Memory Platform - OpenPOWER Foundation · Hybrid Memory Simulation Results Hybrid Mem:...
Transcript of Hybrid Memory Platform - OpenPOWER Foundation · Hybrid Memory Simulation Results Hybrid Mem:...
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Kenneth Wright, Sr. DriectorRambus / Emerging Solutions Division
Join the Conversation #OpenPOWERSummit
Hybrid Memory Platform
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• The problem / The opportunity• Project goals• Roadmap - Sub-projects/Tracks
• Performance Modeling• Hardware Prototyping• Heterogeneous Memory
• Industry Collaboration / Common Goals• Summary
Outline
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CAGR -32%
CAGR -48%
CAGR -35%
Cost gap between DRAM and NAND continues to increaseNeed cost-effective emerging memory to fill this gap.
1990s 2000s
CAGR -25%
20202010s 2015
Sources: IDC
Moore’s Law is slowing –but the demand for cost effective capacity increases
Emerging memory
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CPU
Big Opportunities Expected in Memory Systems:
Attachment strategies• OpenCAPI• DIMM Extension• GenZ• CCIXModule Buffer Architectures• DDIMM• NVDIMM• LRDIMM• RDIMM
Emerging Memories• RRAM• MRAM• PCM• Flash
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Mainstream Memories vs EM
• DRAM is hard to displace due to its low latency, write energy, high endurance, and relatively low cost
• DRAM will continue as a level of hierarchy in system memory • EM offers the promise of continued cost per bit reduction
DRAM NAND Flash
PCRAM RRAM MRAM
Latency ++ - - +
Endurance ++ - - - -
Write Energy ++ - - - -Cost per bit ++ - → + ? - → + ?? -Capacity + - → - →
* Projected information since EM is not in commercial volume production yet
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Project Goals
CPU(Register)
SRAM(Cache)
DRAM
Storage
Emerging Memories
• Research: Investigate future memory subsystem architectures around flash, emerging memories and attachment strategies. Specifically:• Multiple Memory types in a memory subsystem managed by hardware or
software (Hybrid or Heterogeneous)• Multiple Memory attachment types including: Direct attach on common
interface, Direct attached on unique interfaces, and Serially attached• Manage emerging and flash based memory to reduce cost / bit while
optimizing performance in both persistent and volatile memory subsystems• Collaborate with industry partners to develop prototype solutions and
explore the path forward for hybrid memory subsystems
Emerging Memories (RRAM, MRAM, PCM) and flash have the promise of lower cost / bit and thus could continue the $/GB improvement of memory systemsMany Emerging Memories have issues with latency, bandwidth and endurance that if unmanaged can greatly affect system performance
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Performance Modeling
•Results to date very promising
•Challenges: slow, limited scenarios, sim assumptions
Hardware Prototyping
• Custom Memory board and host board development
• Run real world applications• POWER9 CPU• OpenCAPI interface
Heterogeneous Memory
• Trace analysis• Data placement• Data movement
Hybrid memory research roadmap3 tracks to validate ideas and quantify management impact
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Memory Management Options
Hardware Managed(Hybrid Memory)
Software Managed(Heterogeneous
Memory)
Direct AttachedManagement by CPU and buffers
Serial AttachedManagement by
Media Controller/Buffer
Prototype ResearchSimulation Research
CPU
Media Controller
DDR 4/ DDR 5/ LPDDR 4/ Flash / RRAM / MRAM / PCM
OpenCAPI
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• Performance Modeling of improved EM as main memory increase cost effective capacity
• Explored Multiple configurations for DRAM + Flash/EM
• Read performance and write performance evaluated• Flash device modifications identified
• Endurance is an issue as expected• Ongoing work on evaluating solutions
Hybrid Memory Simulation Results
Hybrid Mem: latency 7.5us read/25us write
Lower values better No
management Rambus techniques Workload DRAM 3DXPoint
Data Caching 1 1.27 20.06 3.10Data Serving 1 1.64 23.61 4.85Graph Analytics 1 1.41 38.53 2.84In-memory Analytics 1 1.5 24.24 3.54Media Streaming 1 1.06 1.55 1.13Web Search 1 1.23 6.24 1.96
Reference
Issue: Poor bandwidth, latency and endurance cause performance degradation in the absence of management
Focus: Management policies that enable improved performance at low cost per bit
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Hardware Platform for Hybrid Memory Research• Processor
▪ IBM POWER9▪ Joint work to develop memory subsystem
for research on hybrid memory▪ Demo planned in Q4 2018
• Memory▪ Low latency access from OpenCAPI ▪ In conversation with several SCM providers
▪ Looking for collaboration on SCM parts, specifications, and controllers
• System▪ Starting discussions with leading datacenter
players
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Hardware Platform for Hybrid Memory Research
FPGA
• Low latency access from• OpenCAPI
• Memory Types• DDR4 DIMMs• Emerging Memory
custom DIMMs• Enhanced Flash custom
DIMMs• NVDIMM-P
• Management Policies: implemented in FPGA
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Modularity for flexible and rapid experimentation
Interface
Applications and application interfaces
SW Management /
policy
Processor
Management HW / Policy
EM control
Hybrid Controler
DRAM control
Interface controlEM
and DRAM
Architecture
InterfaceInterface
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• Rambus Labs is looking for collaboration opportunities with key partners • Including the use of Emerging Memories on the HW Platform to prove system
benefit of DRAM and Emerging Memory• Rambus is working to provide:
• Hardware research platform access• Benchmarking• Management policies/algorithms
Potential Samsung Partnership
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Rambus
• Study IS protocols (OpenCAPI)
• Study any emerging memory and hybrid
• Run real world applications
• Study Serial vs direct attach
Processor Leaders
• Programming models
• Resource sharing / partitioning / provisioning
• Interface comparisons
Memory Leaders
• Analysis of EM types
• Demo Emerging Memories
• Estimate direct attach performance
• Real world application testing
System Leaders
• Functional testing of IS Protocols (OpenCAPI)
• Functional testing of NVDIMM
• Designs that can be modified to be a product
Common Research Goals Hybrid
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THANK YOU