HPC FuturesThe technology challenges

Jonathan FollowsSTFC Daresbury Laboratory

Tuesday April 17th, 2012Jonathan.follows@stfc.ac.uk

Background

• This presentation results from an internal PRACE “deliverable” in which an analysis of the likely challenges and implications for high performance computing based on technology trends with likely applicability in the 2012-2015 time period was performed.

The road to Exascale

The challenges

• Energy• Memory• Interconnect• Cooling• Operating system• Hardware reliability• Application reliability

• Management• Processor• Packaging• Storage• File system• Archive• Application

Extrapolations to Exascale

The energy challenge

• 500MW target for 1Eflop/s system using current technology– 200MW compute– 150MW memory– 150MW communication

• To get to 50Gflop/s/W• Today the Blue Gene/Q prototype is

~2Gflop/s/W

The cooling challenge

• Liquid cooling, especially warm water cooling, 45 degree Celsius inlet temperature?

• Not just cooled rear doors on racks – direct liquid cooling of processor and memory chips

• Reduce processor clock speed to reduce cooling requirement

• 3-D stacking of components may require microfluidics technologies to cool

The hardware reliability challenge

• Mean time between failure must be reduced• “System on a Chip” reduces the number of

chips in a system• Additional redundancy points – more

processor cores both for yield and reliability

The application reliability challenge

• Today’s applications do not cater for failure of system components

• Will tomorrow’s applications have to?• Or will tomorrow’s systems transparently

migrate applications away from failing components?

The processor challenge

• CMOS technology got us to 2-5GHz• Increasing power by increasing number of

cores per chip from here on• 100MW “brute force rather than elegance” of

huge complex multi-core processors today• Future low power, low clock speed embedded

technologies– GPUs and other accelerators– FPGAs

The application challenge

• Heterogeneity and multi-level programming techniques: all of– MPI– OpenMP– OpenCL

• Resilience and how to cater for failure• New programming languages

– Partitioned global address space (PGAS) languages such as co-array Fortran are slowly developing

– Easier models for code development but require maturity and better hardware support for good performance

Things we will see by 2015• 15nm fabrication• New memory

technologies• More many-core chips• Many low-power floating

point cores• Field Programmable Gate

Arrays• Configurable silicon

• System-on-chip• Network-on-chip• CPU+FPU integration• New interconnect

technologies• Flexible topologies• 3D stacking• Hot water cooling• Desk-side Petaflop/s

systems

Summary

• Although there are many technical challenges, Exascale systems will be built

• Applications and algorithms will require major development efforts to take advantage of these systems

• Today’s capability computing is tomorrow’s capacity computing

• Is the era of commodity HPC over, though?