How MIPS Pipeline works

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PC Instruction memory Instruction Add Instruction [20–16] MemtoReg ALUOp Branch RegDst ALUSrc 4 16 32 Instruction [15–0] 0 0 M u x 0 1 Add Add result Registers Write register Write data Read data 1 Read data 2 Read register 1 Read register 2 Sign extend M u x 1 ALU result Zero Write data Read data M u x 1 ALU control Shift left 2 RegWrite MemRead Control ALU Instruction [15–11] 6 EX M WB M WB WB IF/ID PCSrc ID/EX EX/MEM MEM/WB M u x 0 1 MemWrite Address Data memory Address

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Flow Chart of How MIPS Pipeline works.This document helps you about MIPS Pipeline Stages and pipeline cycle time also include harvard architecture and explanation of every stage of MIPS Pipeline with some exercises.Feel free to ask about Parallel Processing

Transcript of How MIPS Pipeline works

Page 1: How MIPS Pipeline works

PC

Instruction memory

Inst

ruct

ion

Add

Instruction [20–16]

Mem

toR

eg

ALUOp

Branch

RegDst

ALUSrc

4

16 32Instruction [15–0]

0

0

M u x

0

1

Add Add result

RegistersWrite register

Write data

Read data 1

Read data 2

Read register 1

Read register 2

Sign extend

M u x1

ALU result

Zero

Write data

Read data

M u x

1

ALU control

Shift left 2

Reg

Write

MemRead

Control

ALU

Instruction [15–11]

6

EX

M

WB

M

WB

WBIF/ID

PCSrc

ID/EX

EX/MEM

MEM/WB

M u x

0

1

Mem

Write

AddressData

memory

Address