High Voltage Current Mode PWM Controller for ... - APD-SEMI
Transcript of High Voltage Current Mode PWM Controller for ... - APD-SEMI
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AP207
FEATURES
⚫ Integrated with 700V High Voltage Circuit
⚫ Patent Light Load Mode for Ultra-low
Standby: <30mW
⚫ Integrated Brownout Protection (BOP) and
X-Cap Discharge Function
⚫ Wide VDD Operation Range: 8V-70V
⚫ Medium Load Quasi-resonant Control for
Good Efficiency
⚫ Adaptive Loop Gain Control
⚫ Green Mode and Burst Mode Control
⚫ External Precise Output OVP (DEM Pin)
⚫ Adjustable CS OTP
⚫ Internal Slope Compensation and Over
Current Compensation
⚫ Built-in Complete Protections:
◼ Patent Overload Protection (OLP)
◼ Short Circuit Protection (SCP)
◼ Leading Edge Blanking (LEB)
◼ Over Temperature Protection (OTP)
◼ Over Voltage Protection (VDD OVP)
◼ VDD Short Protection
⚫ Available with SOP-8 Package
APPLICATIONS
⚫ PD Charger and Adapter
GENERAL DESCRIPTION
The AP207 is a current mode PWM controller
with high performance for offline flyback converter
applications. It integrates a high-voltage start-up
circuit with AC line unplugged detection and X-
Cap discharge functions, which can achieve the
requirements of quick start and ultra-low standby
(typically <30mW@230Vac). The AP207 can
adaptively work in green mode, burst mode and
medium load QR control mode to reduce the
switching loss, which can easily meet DOE 6
efficiency.
The AP207 is equipped with a high-precision
oscillator, so the switching frequency is fixed to
65kHz. With the functions of internal slope
compensation, soft start, frequency shuffling and
adaptive loop gain regulation, the stability,
reliability and electromagnetic compatibility of the
system are greatly improved. Moreover, the
operating voltage of VDD can support 8V-72V,
which is very suitable for wide range output
applications, especially for adapter together with
USB PD or smart charging.
The AP207 integrates protections of Under
Voltage Lockout (UVLO), VDD over Voltage
Protection (VDD OVP), Brownout Protection(BOP),
X-CAP Discharge, Output OVP/UVP, Cycle-by-
cycle Current Limiting (OCP), Over Load
Protection (OLP), Short Circuit Protection (SCP), ,
On-Chip Thermal Shutdown (OTP), External OTP,
Abnormal OCP (AOCP), Soft Start, Leading Edge
Blanking (LEB), CS Pin Open Protection, VDD
Clamping, etc.
High Voltage Current Mode PWM Controller for Wide Output
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AP402B
TYPICAL APPLICATION CIRCUIT
EMI
FilterAC IN
Vo
TL431
NCFB
GATE
VDDCS3
7
6
5GND4
2
HVDEM1 8
GATEGND
VDDRW3
5
4
2
HVVO1 6
NTC
Q1
Q2
AP207
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AP207
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Pin Configuration
-8
Pin Description
Pin Number Pin Name I/O Description
1 DEM I Multi-functional pin, which can realize demagnetization detection, output OVP detection, output short circuit detection, etc
2 FB I Feedback pin. The loop regulation is achieved by connecting a photo-coupler to this pin. PWM duty cycle is determined by this pin voltage and the current sense signal at Pin 3.
3 CS I Current sense input pin. It implements over voltage protection as well
4 GND P The ground of the IC
5 GATE O Totem-pole gate driver output to drive the external MOSFET.
6 VDD P IC power supply pin.
7 NC - No connection floated in application.
8 HV P Connected to the line input via resistors and diodes for startup, X-cap discharge and AC Brownout detection as well.
Ordering Information
Part Number Description
AP207 SOP-8,Halogen free, 4000Pcs/Reel
DEM
FB
CS
GND
1
2
3
8
6
AP207
4 5
7
GATE
VDD
NC
HV
SOP8SOP8SOP8
3
AP207
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Block Diagram
CS
GATE
S
R
Q
FB
PWM
LEB
75ms
Debounce
GND
OLP
Soft drive
VDD 5
VDD OVP
80V
VDD OVP
75V
Zener
Jitter
Slope
Compensation5V
5.0V
FB_int
3.6V
Control Logic
&
Fault
management
FB_int
Internal
OTP
HV
Frequency
control
Burst
Mode
Soft Start
12V/7.5V
Brownout
Protection
BOP
AC OFF
Detection
AC OFF
POR
Debounce
Sample DEM
VTH_OLP
Valley
Detection
3.6V
0.45V
DebounceOVP
UVP
Vcs_ovp
Dmax
Debounce
CS_OVP
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AP207
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Absolute Maximum Ratings (Note 1)
Parameter Value Unit
HV Voltage -0.3 to 700 V
VDD DC Supply Voltage -0.3 to 80 V
VDD DC Clamp Current 10 mA
FB, CS, SEL Voltage Range -0.3 to 7 V
GATE Voltage Range -0.3 to 20 V
Package Thermal Resistance (SOP-8) 150 oC/W
Maximum Junction Temperature 150 oC
Power Dissipation (SOP-8 @ Ta=85 oC) 250 mW
Storage Temperature Range -65 to 150 oC
Lead Temperature (Soldering, 10sec.) 260 oC
ESD Capability, HBM (Human Body Model) 3 kV
GATE Output Current +300/-600 mA
Recommended Operation Conditions
Parameter Value Unit
Supply Voltage, VDD 10 to 70 V
Operating Ambient Temperature -40 to 125 oC
HV Resistor Value 10 to 51 kΩ
Electrical Characteristics (TA = 25OC, VDD=18V, if not otherwise noted)
Symbol Parameter Test Conditions Min Typ. Max Unit
High Voltage Startup Section (HV Pin)
IHV1 HV Current Source HV=600V, VDD=0V 0.2 0.5 0.8 mA
IHV2 HV Current Source HV=600V, VDD>2V 1.5 2 2.5 mA
IHV_Leakage HV Leakage Current HV=600V, VDD=18V 10 uA
VBOP AC Brown-out Threshold Voltage
63 70 77 VAC
VBOP_Re AC Brownout Release Voltage 70 77 84 VAC
TBOP_debounce BOP Debounce Time 80 ms
Tdetect AC Unplugged Detection Time 47 ms
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AP207
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Tdischarge Single Discharge Time 47 ms
Idischarge Discharge Current HV=600V 5 mA
Supply Voltage Section (VDD Pin)
IVDD_ST Start-up current into VDD pin HV=600V 50 100 uA
IVDD_OP VDD Operation Current VFB=3V,GATE=1nF 1.2 2 mA
IVDD_Standby VDD Standby Current VFB=0V 0.3 0.5 mA
VDDON VDD Under Voltage Lockout Exit 12.0 12.5 13.0 V
VDDOFF VDD Under Voltage Lockout Enter
6.6 6.8 7.0 V
VDDHV_Clamp VDD Low Clamp by HV 7.8 V
TVDD_Error HV Continuous Supply Protection Time
VFB>1V 80 ms
VDDOVP VDD OVP Threshold 73 75 78 V
VDDClamp VDD Zener Clamp Voltage I(VDD ) = 7 mA 80 V
IVDD_Discharge VDD Discharge Current Trigger Protection @ VDD>20V
2 mA
TRecovery Protection Recovery Time 1.3 s
TSoftstart Soft Start Time 3 4 5 ms
Feedback Input Section (FB Pin)
VFB_Open FB Open Voltage 5.0 V
IFB_Short FB Short Circuit Current VFB=1V 0.17 mA
ZFB_IN FB Input Impedance 25 Kohm
VSkip in Burst in Threshold 0.8 V
VSkip out Burst out Threshold 1.0 V
VFB_OLP Power Limiting FB Threshold Voltage
3.6 V
TOLP_Delay Power Limiting Debounce Time 75 ms
Current Sense Input Section (CS Pin)
TLEB CS Leading Edge Blanking Time 250 ns
Vcs(max) Max Current Limiting Threshold Don>50% 0.97 1.00 1.03 V
Don<11% 0.76 V
Vcs_AOCP AOCP Threshold 1.7 V
Vcs(min) Min Current Limiting Threshold 0.26 0.28 0.30 V
TDelay_OCP Over Current Detection Delay GATE=1nF 70 ns
Vcs_OVP CS Pin over Voltage Threshold @ second side demag 0.47 0.5 0.53 V
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AP207
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Oscillator Section
FOSC Normal Oscillation Frequency 60 65 70 KHz
ΔF(shuffle) /FOSC
Frequency Shuffling Range -4 4 %
T(shuffle) Frequency Shuffling Period 16 ms
DMAX Maximum Switching Duty Cycle 70 75 80 %
FBurst Burst Mode Base Frequency 22 KHz
Multi-function Pin (DEM Pin)
VDEM_OVP DEM OVP Threshold 3.4 3.6 3.8 V
VDEM_UVP DEM UVP Threshold 0.45 0.5 V
NOVP_Trigger Number of Consecutive OVP Faults to Trigger
6 Cycles
TUVP_debounce Debounce Time to Trigger UVP 75 ms
Tsample Sample time after PWM for DEM and CS_OVP Protection
VFB<1.5V (Note 2) 1.9 us
VFB>1.5V (Note 2) 2.5 us
VZCD_in ZCD in Threshold 50 mV
VZCD_out ZCD out Threshold 80 mV
On-Chip Thermal Shutdown
TSD Thermal Shutdown (Note 2) --- 145 -- °C
TRC Thermal Recovery (Note 2) 115 -- °C
GATE Driver Section (GATE Pin) (Note 2)
VOL Output Low Level Igate_sink=20mA 0 1 V
VOH Output High Level Igate_source=20mA 7.5 15 V
VG_Clamp Output Clamp Voltage Level VDD=24V 13 V
IDRV_source Gate Source Capability (Note 2) 300 mA
IDRV_sink Gate Sink Capability (Note 2) 600 mA
TDRV_rise Gate Rising Time GATE=1nF 150 ns
TDRV_fall Gate Falling Time GATE=1nF 60 ns
Note 1. Stresses listed as the above "Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to maximum rating conditions for extended periods may
remain possibility to affect device reliability.
Note 2. Guaranteed by the Design.
AP207
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Characterization Plots
VDD_ON vs Temperature
15 45
VD
D_O
N(V
)
Temperature( )
30 60 75 90 105 120 13511.8
12.2
12.6
13.0
13.4
VDD_OFF vs Temperature
VD
D_O
FF(V
)
Temperature( )
6.5
6.6
6.7
6.8
6.9
7.0
15 30 45 60 75 90 105 120 135
FOSC vs Temperature
FO
SC(k
Hz)
Temperature( )
61
62
63
64
65
66
15 30 45 60 75 90 105 120 135
VDD_OVP vs Temperature
15 30 45 60 75 90 105 120 13575.0
75.5
76.0
76.5
77.0
77.5
VD
D_
OV
P(V
)
Temperature( )
VCS(max)_H vs Temperature
VC
S(m
ax)_
H(V
)
Temperature( )
0.98
0.99
1.00
1.01
1.02
1.03
15 30 45 60 75 90 105 120 135
VCS(max)_L vs Temperature
VC
S(m
ax)_
L(V
)
Temperature( )
0.72
0.73
0.74
0.75
0.76
0.78
15 30 45 60 75 90 105 120 135
AP207
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Operation Description
The AP207 is a current mode PWM controller with
high performance for offline flyback converter
applications. It integrates a high-voltage start-up
circuit with AC line unplugged detection and X-Cap
discharge functions, which can achieve the
requirements of quick start and ultra-low standby.
The AP207 can adaptively work in green mode,
burst mode and medium load QR control mode to
reduce the switching loss, which can easily meet
DOE 6 efficiency. Moreover, the operating voltage
of VDD can support 8V-72V, which is very suitable
for wide range output applications, especially for
adapter together with USB PD or smart charging.
⚫ High Voltage Start-Up Operation
In AP207 , a high voltage startup cell is integrated.
Fig.1 shows the startup circuit for AP207
applications. The HV pin is connected to the line
input via two diodes and a resistor. During startup,
the internal startup circuit is enabled and a HV
current source charges the VDD hold up capacitor
Cdd through Rst.
AC IN
Cbulk
Cdd
Np
Na
NC
GATE
2 FB
DEM
VDDCS3
1
7
6
8
4 5GND
HV
Rst1
Fig.1
As shown in Fig.2. During start−up, the HV supply
circuit turns on and charges the VDD capacitor with
IHV1 when VDD is below 2V, the lower charge
current limits power dissipation on the device in the
event that the VDD pin is shorted to ground. As the
voltage exceeds 2V, the current increases to IHV2,
in order to shorten the start-up time.
When the VDD voltage reaches VDDon, the startup
cell is turned off, then the hold-up capacitor Cdd
continues to supply VDD. When the controller starts
switching, the auxiliary windings take over the
supply. It should be noted that the controller will not
start switching until the HV voltage exceeds the
BOP threshold (VBOP_Re).
When the VDD voltage drops to VDD_HV_clamp
(typically 7.8V), the HV supply circuit is turned on
again to maintain the VDD voltage. However, the
controller will trigger protection if the duration of HV
low clamp supply lasts more than 80ms as well as
the system works under heavy load.
2V
VDD_off
VDD_HV_clamp
VDD_on
VBOP_Re
VDD
HV
GATE
Ivdd_standbyIHV1
IHV2
IHV
t1 t2 t3 t4 t5 t6
Ivdd_op
t7
Fig.2
⚫ Brownout Protection (BOP)
As shown in Fig.3. A timer is enabled once HV
drops below BOP threshold (VBOP). The controller
is disabled and enter into self-recovery mode if HV
doesn’t exceed VBOP before the brownout timer
(typically 80ms) expires.
AP207
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VBOP
time
HV
BOP Timer<80ms BOP Timer=80ms
T_BOP_debounce
Error timer in
progress
Error timer elapsed
and HV reaches
BOP_Re
Error timer
elapsed
and initialization
GATE
Fig.3
⚫ X-CAP Discharge
As shown in Fig.4. In order to avoid electrical shock
when the user unplugs the power supply and
inadvertently touches the ac input terminals, the
time constant of the CX1 and its associated
discharge resistors (R1, R2) must be less than 1s.
However, the resistors are always on the line and
will increase standby power. To save the power
consumption on X-CAP discharge resistors, the
AP207 integrates the function of ac line unplug
detection and X-CAP discharge.
By detecting the voltage variation on HV Pin, the
AP207 can automatically identify the states of AC
line off and enable the discharge function. The
timer of detection and discharge is set to 47ms.
The discharge path is from HV pin to GND, the
discharge current is about 5mA. For safety reasons,
the detection and discharge are carried out
alternately.
AC IN
NCFB
GATE
VDDCS3
7
6
5GND4
2
HVDEM1 8V_HV
RhCX1
D1
D2
R1
R2
Fig.4
⚫ Demagnetization Detection and Medium Load QR Mode Control
In order to improve the working efficiency of the
system under medium load, the IC adopts the QR
mode to reduce the switching loss. The controller
turns on at valley position by sampling the auxiliary
winding. As shown in Fig. 5, Vds is the waveform of
switch drain-source, Vaux is the waveform of
auxiliary winding and Vzcd is the sampling
waveform of DEM pin. When demagnetization
signal is detected by DEM pin, the system can
enter QR mode operation. he valley is detected
once the DEM pin voltage falls below the
demagnetization threshold (typically 50 mV) and
the exited threshold is about 80mV.
Vds
Vaux
Vzcd
α
td
Tring
Fig.5
⚫ Built-in Slope Compensation
In the conventional application, the problem of the
stability is a critical issue for current mode
controlling, when it operates in higher than 50% of
the duty-cycle. In AP207 the slope compensation
circuit is integrated by adding voltage ramp onto the
current sense input voltage for PWM generation.
This greatly improves the close loop stability at
CCM and prevents the sub-harmonic oscillation
and thus reduces the output ripple voltage.
⚫ Output OVP/UVP
As shown in Fig. 6, the IC samples the voltage of
AP207
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the auxiliary winding through the DEM pin to trigger
over voltage protection (OVP) and under voltage
protection (UVP) of output. Since the DEM signal is
a switch signal, it needs to sample at a suitable
time.
An internal 2.5us (it is reduced to 1.9us if
VFB<1.5V) sampling delay after PWM off
guarantees a clean plateau, provided that the
leakage inductance ringing has been fully damped.
The threshold voltage for output OVP is 3.6V. If the
sampled plateau voltage exceeds the OVP
threshold, an internal counter starts counting
subsequent OVP events. If OVP events are
detected in successive 6 cycles, the controller
assumes a true OVP and it stops all switching
operations. Output OVP will enter auto recovery
mode.
Likewise, If the sampled plateau voltage is below
the UVP threshold (0.45V), the system will trigger
UVP after debounce time (typically 75ms).
VauxDEM
R2
R1
control
sampling
3.6V
0.45V
6cycleOVP
UVP
U1
U2
debounce
Fig.6
⚫ CS_OVP
As shown in Figure 7, the voltage is sampled on CS
pin when the secondary windings conducting. The
sampled voltage is compared with the given
CS_OVP threshold (typically 0.5V). This function
can be used for external OTP. When the
temperature rises, the RT resistance decreases,
and the sampling voltage on CS pin rises, the
conditions for triggering CS_OVP are as follows:
3( )* 0.5
3+ 4
R RcsVaux Vd V
R Rcs R RT
+−
+ +
Vaux
Rcs
R3
CS
RT
采样保持Debounce
CS_OVP
Vcs_OVP
U3
R4
Fig.7
⚫ Green Mode Operation
Since the main power dissipation at light/zero load
in a switching mode power supply is from the
switching loss which is proportional to the PWM
switching frequency. To meet green mode
requirement, it is necessary to reduce the switching
cycles under such conditions either by skipping
some switching pulses or by reducing the switching
frequency.
⚫ Smooth Frequency Foldback
In AP207 , a Proprietary “Smooth Frequency
Foldback” function is integrated to foldback the
PWM switching frequency when the loading is light.
Compared to the other frequency reduction
implementations, this technique can reduce the
PWM frequency smoothly without audible noise. As
shown in Fig.8.
VFB
Switching Frequency
65kHz
0
Burst
mode
22kHz
Smooth Frequency Foldback
(No audio noise generated)
Frequency
Foldback mode
Normal
mode
Fig.8
⚫ Burst Mode Control
AP207
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When the loading is very small, the system enters
burst mode. When VFB drops below Vskip_in, the
AP207 will stop switching and output voltage
starts to drop (as shown in Fig.9), which causes the
VFB to rise. Once VFB rises above Vskip_out,
switching resumes. Burst mode control alternately
enables and disables switching, thereby reducing
switching loss in standby mode.
Vout
VFB
GATE
GATE
OFFGATE
OFF
Vskip
Fig.9
⚫ Constant Power Limiting
A proprietary “Constant Power Limiting” block is
integrated to achieve constant maximum output
power capability over universal AC input range.
Based on the duty cycle information, the IC
generates OCP threshold according to a proprietary
analog algorithm.
⚫ Soft Start
The AP207 features an internal 4ms soft start that
slowly increases the threshold of cycle-by-cycle
current limiting comparator and the switching
frequency during startup sequence. It helps to
prevent transformer saturation and reduce the
stress on the secondary diode during startup. Every
restart attempt is followed by a soft start activation.
⚫ Low Standby
Through patented technology, the IC greatly
reduces the standby current and standby loss.
⚫ Oscillator with Frequency Shuffling
PWM switching frequency in AP207 is fixed to
65KHz and is trimmed to tight range. To improve
system EMI performance, AP207 operates the
system with ± 4% frequency shuffling around
setting frequency.
⚫ Leading Edge Blanking (LEB)
Each time the power MOSFET is switched on, a
turn-on spike occurs across the sensing resistor.
The spike is caused by primary side capacitance
and secondary side rectifier reverse recovery. To
avoid premature termination of the switching pulse,
an internal leading edge blanking circuit is built in.
During this blanking period (typically 250ns), the
PWM comparator is disabled and cannot switch off
the gate driver.
⚫ On Chip Thermal Shutdown
When the IC temperature is over 145 oC, the IC
shuts down. Only when the IC temperature drops to
115 oC, IC will restart.
⚫ Abnormal Over current Protection (AOCP)
When the CS sampling voltage reaches the value
of AOCP threshold (typically 1.7V), the system
enters abnormal over current protection, which
reduce the frequency of system.
⚫ Short Circuit Protection (SCP)
When the IC detects that the DEM pin voltage is
lower than the UVP value set by the system, it will
enter the short-circuit protection mode and start to
restart automatically until the fault disappears.
AP207
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⚫ Over Load Protection (OLP)
If over load occurs, a fault is detected by FB
voltage is over 3.7V. If this fault is present for more
than 75ms (typical), the protection will be triggered,
the IC will experience an auto-recovery mode
protection as mentioned above. The 75ms delay
time is to prevent the false trigger from the power-
on and turn-off transient.
⚫ VDD Over Voltage Protection (OVP) and Zener Clamp
When VDD voltage is higher than 75V (typical), the
IC will stop switching and enter into auto recovery
protection mode. The VDD will decrease to 7.8V
clamped by HV current source during the protection
mode. Then the system will restart up again when
the auto recovery timer (typically 1.3s) expires. An
internal 80V (typical) zener clamp is integrated to
prevent the IC from damage.
⚫ Protections with Auto-Restart
In the event of protections, the IC enters into auto-
restart and an internal timer begins counting,
wherein the PWM switching is disabled. When the
1.3s timer expires, the IC will reset and start up the
system again. However, if the fault still exists, the
system will experience the above mentioned
process.
⚫ Soft Gate Driver
The output stage of AP207 is a totem-pole gate
driver with +300mA/-500mA capability. Cross
conduction has been avoided to minimize heat
dissipation, increase efficiency, and enhance
reliability. An internal 13V clamp is added for
MOSFET gate protection at higher than expected
VDD input. A soft driving waveform is implemented
to minimize EMI.
AP207
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Package Dimension
SOP-8
e
EE1
θ
C
b
A2 A
A1
D
Symbol Dimensions In Millimeters Dimensions In Inches
Min Max Min Max
A 1.350 1.750 0.053 0.069
A1 0.100 0.250 0.004 0.010
A2 1.350 1.500 0.053 0.061
b 0.330 0.510 0.013 0.020
c 0.170 0.250 0.006 0.010
D 4.700 5.100 0.185 0.200
E 3.800 4.000 0.150 0.157
E1 5.800 6.200 0.228 0.244
e 1.270 0.050
L 0.400 1.270 0.016 0.050
θ 0º 8º 0º 8º
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AP207