High-Speed Serial Interface Circuits and Systemstera.yonsei.ac.kr/class/2020_2_2/lecture/Lecture 10...

High-Speed Serial Interface Circuits and Systems

Woo-Young ChoiDept. of Electrical and Electronic Engineering

Yonsei University

Lecture 10: Bit Errors

W.-Y. Choi2High-Speed Serial Interface (2020/2)

Bit Errors

- Delivery of digital bits from Tx to Rx without error

Tx Rx

Serializer...

123

n

Tx Driver

PLL FIREqualizer

Channel CTLE FFE/DFE

Clock Recovery

Deserializer ...

123

n

- How to quantify ‘error’?- What causes bit errors?


Bit Errors

() = • Most important performance metric


Bit Errors

Assuming Gaussian distribution

(1/ 0)P =

(0 /1)P =

20200

( )1 exp22

sv v dvg ss p

¥ é ù--ê úë û

ò 00

12 2

sverfc gs

æ ö-= ç ÷ç ÷

è ø

21211

( )1 exp22

sv v dvg

ss p-¥

é ù--ê úë û

ò 11

12 2

sverfc gs

æ ö-= ç ÷ç ÷

è ø

22( ) exp( )x

erfc x y dyp

¥

= -ò

Assuming equal probability for 1 and 0

BER = 0 1

0 1

14 2 2

s sv verfc erfcg gs s

é ùæ ö æ ö- -+ê úç ÷ ç ÷ç ÷ç ÷ê úè øè øë û


Bit Errors

BER = 0 1

0 1

14 2 2

s sv verfc erfcg gs s

é ùæ ö æ ö- -+ê úç ÷ ç ÷ç ÷ç ÷ê úè øè øë û

Select g so that BER is minimized

1 0 0 1

1 0

s sv vs sgs s

+=

+It can be shown BER minimized with

It can be also shown that the optimal BER12 2

Qerfc æ ö= ç ÷è ø

1 0

1 0

s sv vQs s-

=+

è Signal-to-Noise Ratio


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+

2exp( / 2)~2Q

Q p-


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+

What causes bit errors?

(1) ISI

... ...


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(1) ISI

Larger bandwidth always better?

Smaller ISI but more white noises delivered to Rx

Optimal bandwidth depends on noise types, typically 0.7~0.8 of data rate

In addition, more bandwidth needs more power consumption


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(2) Sampling Time Noises: Jitters

CR should provide optimal sampling time


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(2) Sampling Time Noises: Jitters

Data duty cycle important

Data duty distortion

è Timing margin reduction


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises

(a) Power Supply Noises

– IR drop in power-supply rail

Device#1

Device#2

Device#3

VDD

I1 I2 I3VDD1 VDD2 VDD3

• Use as wide supply rails as possible

• Avoid serial power supply configuration


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises


– Inductive coupling due to bonding wires

• As short bonding wire as possible

• Better packages

( )( ) di tv t Ldt

=


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises


– Power supply itself

• Good filtering

InterfaceChip

DC-DCConverter

Digital Signal Processing

Chip

220V AC

Bead BeadCAP CAP

LC-typeSupply filter

(Ferrite bead, Ferrite choke)


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises


– Power supply itself

• Differential signaling

Internal VDD reduced

Large on-chip capacitor needed

• On-Chip Supply Regulator


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises

(b) Cross Talk

– Neighboring channels (on-chip, on-board) cause capacitive and inductive coupling


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises

(b) Cross Talk

Near-End Cross Talk (NEXT) Far-End Cross Talk (FEST)


Bit Errors

TD

2TD

~Tr

~Tr

far end crosstalk

Near end crosstalk


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises

(b) Cross Talk


• On-Board

Enlarge space between channels

Adjust transition timing for different lanes

Compensate coupling at Tx side


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(3) Coupling Noises

(b) Cross Talk


• On-ChipSeparate sensitive signals

Shield signal lines with grounds

Use different metal layers for adjacent lanes

(Minimum spacing within a metal layer much smaller than metal

layer separation)

Perpendicular routing for vertical metal layers (Manhattan routing)

Limit maximum parallel routing distance


Bit Errors

Optimal BER12 2


1 0

1 0

s sv vQs s-

=+


(4) Noises in semiconductor devices

(Summary of MOSFET noises in https://www.nikhef.nl/~jds/vlsi/noise/sansen.pdf)

è Homework (Due 11/16 2 pm)Hand-in one-page summary of MOSFET noises


Bit Errors

How to measure BER?

PRBS (Pseudo Random Bit Sequence)

24-1 bit PRBS

2 1b

N

ffD =-


Bit Errors

2N-1 bit PRBS generation

29-1 bit PRBS generation


Bit Errors

... ...

Measure errors in Rx

How to measure BER?

Add PRBS generator in Tx


Bit Errors

... ...

Measure error rate in Rx

How to measure BER?

Add PRBS generator in Tx

BER contour

High-Speed Serial Interface Circuits and Systemstera.yonsei.ac.kr/class/2020_2_2/lecture/Lecture 10...

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