High-Speed Optoelectronic Receivers in SiGekona.ee.pitt.edu/steve/Recent...
Transcript of High-Speed Optoelectronic Receivers in SiGekona.ee.pitt.edu/steve/Recent...
High-Speed Optoelectronic Receivers in SiGe
Amit GuptaUniversity of Pittsburgh
Advisors:Dr. Steven P. Levitan
Dr. Donald M. Chiarulli
Goals
• Investigate SiGe HBT as Photodetectors in IBM Blue LogicTM technology– Study the micro fabrication steps of the IBM process– Analyze intrinsic absorption mechanism in SiGe
• Use analog mixed signal design tools to optimize optical receiver circuit– Investigate circuit topologies for transimpedance
amplifiers (TIAs)– Design, simulate, layout and verify several TIAs and
receiver circuits in the IBM process• Test the SiGe optoelectronic receiver chip
Why SiGe for Optical Receivers?• SiGe HBT and CMOS process
compatibility
• Less expensive than GaAs
• Lower power at higher speeds than Silicon
• Possibility of integrating photodetectors at longer wavelengths of 1300nm
• Operation at oscillation frequencies above 65 GHz
SiGe transistor Trade excess
speed forLow power
Sitransistor
Wavelength (µm)
Power1.3µm
Abs
orpt
ion
Coe
ffici
ent α
(cm
-1)
Spee
d
Photon Energy (eV)
Cadence and
Neolinear
Fabricate through MOSIS Test receiver configuration
Build key sub-circuitsfor receiver design
Identify and analyze SiGe photodiode/phototransistor
structures in the IBM SiGe process
Project Flow
Simulation, optimization and verification of receiver circuits based on IBM SiGe BiCMOS process
Investigation and selection of SiGe based high speed
receiver circuits
Photodetector Structure: The Plan
M3 M3
M2 M2 M2 M2
M1 M1 M1 M1 M1 M1 M1
S2 S2S2
S1 S1S1S1
CB CE CC CS CG CD CC
P- Substrate P- SubstrateDT DT DT
ST ST ST ST STN+
N+ N+P+ P+P+
N-WellN-CollectorN-Sub Collector
N+
P+-SiGe
Cross section of the IBM SiGe BiCMOS process
B.S. Meyerson, “Silicon: germanium-based mixed-signal technology for optimization of wired and wireless telecommunications”, IBM J. Res. Develop., Vol. 44, No. 3, pp. 391-407, May 2000 .
Light
Cross section of the IBM NPN transistor with emitter
removed
EMITTER
SiGe Base and Emitter formationEmitter pedestal is created to define emitter opening and to protect the base
Formation of emitter structure over the SiGe base
Emitter opening is created to form emitter structure
Thin Oxide Thin Nitride Thin Polysilicon
Emitter Pedestal
N+
N+P-P+
P-Well
P+ P-P+
Si1-xGex
N-Collector
Subcollector
N+ N+ P-P+
P-Well
P+ P-P+
N-CollectorSubcollector
P+P+P+
Emitter opening SiGe Base
Emitter formation
Harame, D.L., et al., “Si/SiGe epitaxial-base transistors - II. Materials, physics, and circuits”, IEEE Transactions on Electron Devices, Volume: 42 Issue: 3, pp. 455 -468, March 1995.
Photodetectors: Layout• Use the layout of SiGe
NPN transistor as a design start– npn1 p-cell
• Two photodetector designs:– Photo diode:
• Removed emitter– Photo transistor:
• With complete emitter• With emitter partially
removed
BASE
EMITTER
COLLECTOR
Layout of photodetectors was performed by Leo Selavo, CS Department
⊥
Key Components-Optical Receivers
Phototransistor / Photodiode
Transimpedance Amplifier
Output
MultistageDifferential
Amplifier
Decision Circuit
RF
CF
hυ -+
C
EB
hυC
B Vref
Front-End Amplifier-Optical Receiver
• Front-end configurations– Low, high and transimpedance amplifier
• TIAs with same maximum oscillation frequency (fMAX) and designed in other custom SiGe and GaAs processes
• Evaluation of analog CAD tools to optimize TIAs
R R
Rf
Low impedance Transimpedance High impedance
Simulations of TIAs
66.641.84GHz21.498.59GHz21.49700 (Ω)9.9921.57TIA#8
73.532.72GHz47.502.97GHz47.50680 (Ω)3.3346.73TIA#7
69.285.21GHz29.126.01GHz29.12680 (Ω)6.4129.99TIA#6
67.759.49GHz24.419.54GHz24.41630 (Ω)10.9325.52TIA#5
56.678.45GHz6.828.41GHz6.82700 (Ω)10.346.70TIA#4
65.622.19GHz19.119.84GHz19.11700 (Ω)9.9619.60TIA#3
63.269.86GHz14.5610.14GHz14.56430 (Ω)9.9915.04TIA#2
56.329.12GHz6.5510.18GHz6.55700 (Ω)10.116.56TIA#1
4.22GHz
5.78GHz
7.96GHZ
5.45GHz
2.97GHz
8.12GHz
Bandwidth(GHz)
63.69
68.94
63.38
60.03
54.08
55.22
Gain (dB Ω)
Physical Verificationby DIVA
DRC EXT LVS
8.34GHz
7.70GHz
9.04GHZ
7.96GHz
2.94GHz
8.33GHz
Bandwidth(GHz)
15.29
28.01
14.76
10.04
5.06
5.77
Output(mV)
690 (Ω)
580 (Ω)
700 (Ω)
700 (Ω)
100 (Ω)
700 (Ω)
Feedback Resistance
Rf (Ω)
15.29
28.01
14.06
10.04
5.06
5.77
Output(mV)
14.60
31.06
15.03
10.25
5.57
5.70
Output(mV)
12.83TIA#14
11.44TIA#13
10.66TIA#12
10.48TIA#11
5.1TIA#10
10.06TIA#9
Bandwidth(GHz)
Circuit/Topology
66.641.84GHz21.498.59GHz21.49700 (Ω)9.9921.57TIA#8
73.532.72GHz47.502.97GHz47.50680 (Ω)3.3346.73TIA#7
69.285.21GHz29.126.01GHz29.12680 (Ω)6.4129.99TIA#6
67.759.49GHz24.419.54GHz24.41630 (Ω)10.9325.52TIA#5
56.678.45GHz6.828.41GHz6.82700 (Ω)10.346.70TIA#4
65.622.19GHz19.119.84GHz19.11700 (Ω)9.9619.60TIA#3
63.269.86GHz14.5610.14GHz14.56430 (Ω)9.9915.04TIA#2
56.329.12GHz6.5510.18GHz6.55700 (Ω)10.116.56TIA#1
4.22GHz
5.78GHz
7.96GHZ
5.45GHz
2.97GHz
8.12GHz
Bandwidth(GHz)
63.69
68.94
63.38
60.03
54.08
55.22
Gain (dB Ω)
Physical Verificationby DIVA
DRC EXT LVS
8.34GHz
7.70GHz
9.04GHZ
7.96GHz
2.94GHz
8.33GHz
Bandwidth(GHz)
15.29
28.01
14.76
10.04
5.06
5.77
Output(mV)
690 (Ω)
580 (Ω)
700 (Ω)
700 (Ω)
100 (Ω)
700 (Ω)
Feedback Resistance
Rf (Ω)
15.29
28.01
14.06
10.04
5.06
5.77
Output(mV)
14.60
31.06
15.03
10.25
5.57
5.70
Output(mV)
12.83TIA#14
11.44TIA#13
10.66TIA#12
10.48TIA#11
5.1TIA#10
10.06TIA#9
Bandwidth(GHz)
Circuit/Topology
Pre-SimulationPost-Simulation
(RCX)Post-Simulation
(RCX with I/O Pads)
SiGe Optoelectronic Receiver Chip
1 of 16 Transimpedance Amplifiers
2 of 3 SiGe Photodetector Arrays
1 of 3 Receiver Circuits
Input Pad
Output Pad
Ground Pad
Power Supply Pad
Test Setup
Circuit layout
Ground
Probe
Output
Probe
Input
Probe
Supply
Probe
Transimpedance Amplifier # 4
Rc
RF
C1
E1
B1
C2
E2
RE
B2
Q1
Q2
t
Circuit Topology TIA#4
output
Vss
Input
Substrate
Test Results TIA#4 @ 200MHz
0
2
4
6
8
10
12
14
0 20 40 60 80 100
Current(micro-amps)
Vola
tge(
mill
i-vol
ts)
41.6511.595
40.928.980
42.074.737
41.512.521
Gain(dBΩ)
Output Voltage(millivolts)
Input Current(microamps)
41.6511.595
40.928.980
42.074.737
41.512.521
Gain(dBΩ)
Output Voltage(millivolts)
Input Current(microamps)
Current versus voltage characteristics
Current (micro-amps)
Volta
ge (m
illi-v
olts
)
(Simulation 56.67dBΩ@8.45GHz)
Transimpedance Amplifier # 6
Q1
Q2Q3
Q4
Rf
Q5
Re2Re1
t
Circuit Topology TIA#6
output
Vss
Input
Substrate
RERE RE RE
Test Results TIA # 6 @ 50MHz
0.00E+002.00E-014.00E-016.00E-018.00E-011.00E+001.20E+001.40E+001.60E+001.80E+002.00E+00
-2.00E-01 -1.50E-01 -1.00E-01 -5.00E-02 0.00E+00 5.00E-021.00E-01
1.20E-01
1.40E-01
1.60E-01
1.80E-01
2.00E-01
2.20E-01
2.40E-01
-2.00E-01 -1.50E-01 -1.00E-01 -5.00E-02 0.00E+00 5.00E-02
Input waveform at 50MHz Output waveform at 50MHz
(Simulation 69.28dBΩ@5.21GHz)
Volta
ge (V
)
Time (µsec)
Test Results TIA#6 @ 200MHz
Input waveform at 200MHz Output waveform at 200MHz
Volta
ge (V
)
Time (µsec)
4.00E-01
6.00E-01
8.00E-01
1.00E+00
1.20E+00
1.40E+00
1.60E+00
-2.00E-01 -1.50E-01 -1.00E-01 -5.00E-02 0.00E+00 5.00E-021.20E-011.30E-011.40E-011.50E-011.60E-011.70E-011.80E-011.90E-012.00E-012.10E-01
-2.00E-01 -1.50E-01 -1.00E-01 -5.00E-02 0.00E+00 5.00E-02
Receiver Circuit # 1
Q1 Q2 Q3 Q4 Q5 Q6
Q8Q7
N1 N2 N3
P1
N4
TransimpedanceAmplifier # 6
Three Cascaded Differential Amplifying Stages
Buffer
StageDecision
Circuit
Output Results-Receiver #1Output -TIA
Output1- Differential Amplifier1
Output2- Differential Amplifier1
Output- Differential Amplifier2
Output- Differential Amplifier3
Output- Buffer
Output- Decision Circuit
Output -TIA
Output1- Differential Amplifier1
Output2- Differential Amplifier1
Output- Differential Amplifier2
Output- Differential Amplifier3
Output- Buffer
Output- Decision Circuit
Input Current-10µA
Conclusion• SiGe Photodetector intrinsic absorption in IBM
process is predicted up to 1150nm • NeoCircuit successfully automated the
transistor sizing and bias voltages• NeoCell efficiently performed auto place and
route• SiGe 5HP CMOS (0.5micron) lacks 10 GHz
performance• Preliminary testing of transimpedance amplifiers
show promising results