HIGH-SPEED DIGITAL SIGNAL PROCESSING PLATFORM
2
HIGH-SPEED DIGITAL SIGNAL PROCESSING PLATFORM www.hhi.fraunhofer.de Products and Solutions AT A GLANCE Micro-TCA platform for real-time testing of digital signal processing algorithms Various plug-in boards, such as ADC, DAC, Multi-100G-Interface or FPGA processors Specifications 56 GSa/s, 8-bit ADC and 65 GSa/s, 8-bit DAC plug-in boards with real-time data interface Multiple ADC/DAC boards can be combined in one platform, to generate synchronized multi-chan- nel (1 to 16) ADCs and DACs Free-programmable internal Virtex Ultrascale/Ultrascale+ FPGA plug- in boards High-speed interfacing between boards within the platform and to external FPGA boards Platform based on Micro-TCA standard Built-in Gigabit Ethernet (GbE) connection for data exchange and FPGA programming Ready-to-use IP Cores available Benefits Test of DSP algorithms in realtime Online transmission performance evaluation of coherent optical transmission systems Online measurement and debugging Prototyping of FPGA-based real-time transceivers
Transcript of HIGH-SPEED DIGITAL SIGNAL PROCESSING PLATFORM
HIGH-SPEED DIGITAL SIGNAL PROCESSING PLATFORM
www.hhi.fraunhofer.de Products and Solutions
AT A GLANCE
Micro-TCA platform for real-time testing of digital signal processing algorithms
Various plug-in boards, such as ADC, DAC, Multi-100G-Interface or FPGA processors
Specifications
56 GSa/s, 8-bit ADC and 65 GSa/s, 8-bit DAC plug-in boards with real-time data interface
Multiple ADC/DAC boards can be combined in one platform, to generate synchronized multi-chan-nel (1 to 16) ADCs and DACs
Free-programmable internal Virtex Ultrascale/Ultrascale+ FPGA plug-in boards
High-speed interfacing between boards within the platform and to external FPGA boards
Platform based on Micro-TCA standard
Built-in Gigabit Ethernet (GbE) connection for data exchange and FPGA programming
Ready-to-use IP Cores available
Benefits
Test of DSP algorithms in realtime
Online transmission performance evaluation of coherent optical transmission systems
Online measurement and debugging
Prototyping of FPGA-based real-time transceivers
20170103_PN_High-Speed_Digital-Signal-Processing-Platform.indd 1 19.01.2017 15:12:26
Contact
Photonic Networks and SystemsFraunhofer Heinrich Hertz Institute
Einsteinufer 37 | 10587 Berlin | Germany
Tel +49 30 31002-414Fax +49 30 [email protected]
http://www.hhi.fraunhofer.de/dsp-platform
www.hhi.fraunhofer.de High-Speed DSP Platform
© F
raun
hofe
r H
einr
ich
Her
tz In
stit
ute,
Ber
lin 2
017The Fraunhofer HHI
One of the prime research and development foci of the Fraunhofer Heinrich Hertz Institute lies in photonic networks, components and systems and their application in fi elds such as digital media.
DSPP 114x plug-in board plug-in board plug-in board plug-in board
Type of boardDigital-to-Analog
Converter
Analog-to-Digital
Converter
High-Speed
External InterfaceFPGA Processor
Number of channels per board 1 up to 2 up to 6 x 100G (QSFP28) -
Sampling rate per channel 54-65 GSa/s 56 GSa/s - -
Nominal resolution 8 bit 8 bit - -
Analog 3dB-bandwidth 15 GHz 15 GHz - -
Internal FPGAsVirtex Ultrascale
(XCVU190)
Virtex Ultrascale
(XCVU190)
on-board FPGA
on request
Virtex Ultrascale+
(XCVU13P)**
Total* available CLB LUTs 1,074,240 1,074,240 on-board FPGA
on request
1,728,000**
Total* available CLB Flip-flops 2,148,480 2,148,480 on-board FPGA
on request3,456,000**
Total* available Block RAMs (36 Kb each)
3,780 3,780 on-board FPGA
on request
2,625 + 10,000
UltraRAM**
Total* available DSP slices 1,800 1,800 on-board FPGA
on request
12,288**
Interface speed up to 560 Gb/s up to 560 Gb/s up to 560 Gb/s up to 1120 Gb/s
Datasheet
Principle setup of High-Speed Digital Signal Processing Platform in Receiver Confi guration
*sum of all on-board FPGAs; **other FPGAs available on request
Xilinx VU190 FPGA
Back
plan
e ADC XI
(28/32 Gbaud) XQ
(28/32 Gbaud)
Custom processing
blocks
2 x 56G @ 8bit
Xilinx VU190 FPGA
ADC Custom
processing blocks
2 x 56G @ 8bit
e.g. Xilinx VU13P FPGA
Custom processing
blocks
Principle setup of High-Speed Digital Signal Processing Platform in Receiver Configuration
YI (28/32 Gbaud)
YQ (28/32 Gbaud)
20170103_PN_High-Speed_Digital-Signal-Processing-Platform.indd 2 19.01.2017 15:12:26
