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High-efficiency isolated SEPICconverter with reduced conductionlosses for LED displaysWoo-Young Choia & Min-Kwon Yanga

a Division of Electronic Engineering, Chonbuk National UniversityEngineering Building 7 -328, Deokjin-Dong, Jeonju-City, Jeonbuk,561-756, South KoreaAccepted author version posted online: 16 Dec 2013.Publishedonline: 08 Jan 2014.

To cite this article: Woo-Young Choi & Min-Kwon Yang (2014) High-efficiency isolated SEPICconverter with reduced conduction losses for LED displays, International Journal of Electronics,101:11, 1495-1502, DOI: 10.1080/00207217.2013.874044

To link to this article: http://dx.doi.org/10.1080/00207217.2013.874044

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High-efficiency isolated SEPIC converter with reduced conductionlosses for LED displays

Woo-Young Choi* and Min-Kwon Yang

Division of Electronic Engineering, Chonbuk National University Engineering Building 7 -328,Deokjin-Dong, Jeonju-City, Jeonbuk, 561-756, South Korea

(Received 25 June 2012; accepted 27 October 2013)

This paper proposes a high-efficiency isolated bridgeless single-ended primary induc-tor converter (SEPIC) for light-emitting-diode (LED) displays. The proposed isolatedSEPIC converter can supply LED back-light power with reduced conduction losses.Switching power losses as well as conduction losses are reduced. The proposedconverter is theoretically analysed. Experimental results based on a 28 V, 300 Wback-light power are discussed to verify the performance of the proposed converter.

Keywords: light-emitting diode (LED); back-light; ac-dc converter; power factorcorrection (PFC); single-ended primary inductor converter (SEPIC)

1. Introduction

Nowadays, the light-emitting diode (LED) has been substituted for the cold cathodefluorescent lamp for liquid-crystal display (LCD) back-lighting (Hsia & Kue, 2010; Lin& Tseng, 2009; Tiwari, 2011). In a large-sized LCD, a bunch of LED arrays providessufficient brightness. The back-light power to drive LED arrays should be provided by thepower supply unit (Liu, Yang, & Wang, 2010). The power supply unit should be designedwith high efficiency, which strongly affects the entire efficiency of the LED back-lightdriving system (Chen, Wu, Chen, & Wu, 2007; Wu, Wu, Tsai, Chen, & Chen, 2008).

Generally, the LED back-light power supply requires an isolated dc-dc converter witha power factor correction (PFC) circuit. In order to design the LED back-light powersupply, two-stage converters (Choi, 2013; Choi, Kwon, & Kwon, 2007) have been widelyused in the market. However, the two-stage converter design raises switching powerlosses and system cost. In efforts to reduce the component count and manufacturingcost, single-stage converters have been researched in Chiu and Cheng (2007); Choi,Kwon, Do, and Kwon (2005); Choi, Kwon, Lee, Jang, and Kwon (2009); Kim, Kwon,and Kwon (2011); Li and Chen (2012) and Ribero and Boryes (2011). Recently, single-stage ac-dc converters, which do not have the full-bridge diode rectifier, have beenproposed (Choi, & Chai, 2011; Choi & Yoo, 2011). Figure 1 shows the circuit diagramof the single-stage ac-dc converter. An isolated dc voltage is obtained from the ac linevoltage. By utilising the half-bridge converter topology, the converter in Figure 1 achievesa high efficiency with reduced conduction losses.

In this paper, differently from the previous converter in Figure 1, a new isolatedsingle-stage ac-dc converter is proposed. The proposed converter adopts the single-endedprimary inductor converter (SEPIC) (Jozwik & Kazimierczuk, 1989). The SEPIC PFC

*Corresponding author. Email: wychoi@jbnu.ac.kr

International Journal of Electronics, 2014Vol. 101, No. 11, 1495–1502, http://dx.doi.org/10.1080/00207217.2013.874044

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converter can provide a high power factor regardless of its output voltage due to its stepup/down capability. In Ismail (2009) and Mandevi and Farzanehfard (1989), severalSEPICs have been proposed, which do not use the full-bridge diode rectifier. However,they are all non-isolated ac-dc converters, which are not suitable for LED back-lightdisplays needing an electrical isolation. Figure 2 shows the circuit diagram of theproposed isolated single-stage SEPIC converter. Zero-voltage switching (ZVS) of powerswitches are achieved. Conduction losses as well as switching power losses are reducedby the proposed converter. The operation of the proposed converter is described.Experimental results based on a 28 V, 300 W back-light power are discussed. Theproposed converter achieves a high efficiency of 93.5%. It also achieves an almostunity power factor at 100 Vrms line voltage.

S1

S2

D1

D2

vi

Lb

Cd Vd

Cb

Vo

Do1

Do2

Co

ii

iLb

CS2DS2

CS1DS1

Vb

io

Ro

ip

Lm

iLmT

Llk

Figure 1. Circuit diagram of the previous converters in Choi and Yoo (2011).

S1

S2

D1

D2

vi

Lb

Cb

Vo

Do

Coii

iLb

CS2DS2

CS1DS1

VS1

VS2

VbiS1

iS2

ioiDo

Ro

iLmT

Llk

Lm

ip

Figure 2. Circuit diagram of the proposed converter.

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2. Proposed converter

Figure 2 shows the circuit diagram of the proposed converter. The proposed converter hasthe primary inductor Lb and diodes D1 and D2, power switch S1 and S2, primary capacitorCb, transformer T, output diodes Do, and output capacitor Co. DS1 and DS2 are body diodesof S1 and S2, respectively. CS1 and CS2 (CS = CS1 = CS2) are the output capacitors of S1and S2, respectively. The capacitors Cb and Co are large enough so that the voltages Vb

and Vo are considered constant. The transformer T has the same magnetising inductor Lm.The turns ratio of T is defined as N = Np/Ns. Llk is the leakage inductor of T. Ro is theoutput resistor.

Figure 3 shows the operation modes of the proposed converter during one switchingperiod Ts for a positive half period of ac line voltage. As shown in Figure 3(a), S1 iscontrolled with the duty ratio D for a positive half period. The on times of S1 and S2 areDTs and (1–D)Ts, respectively. When S1 is turned on, the input current ii flows through Lb,D1 and S1. When S1 is turned off, the input current it flows through Lb, D1, Cb, T and S2.Similarly, S2 is controlled with the duty ratio D for a negative half period, as shown inFigure 3(b). When S2 is turned on, the input current it flows through S2, D2 and Lb. WhenS2 is turned off, the input current it flows through S1, Cb, T, D2 and Lb. Due to thesymmetric operation for each half line period, only the operation modes for the positivehalf line period are described. The proposed converter has two distinct operation modesduring Ts in the steady-state condition. vi is considered to be constant during Ts. It isassumed that both switches operate complementarily with a small dead-time period.

Mode 1 [t0, t1]: At t = t0, the gating signal vgs1 is applied to the gate of S1. The primaryinductor current iLb increases as iLb(t) = vi (t – t0)/Lb. As the voltage across the

S1

S2

D1

D2

vi

Lb

Cb

Vo

Do

Coii

CS2DS2

CS1DS1

Ro

TLlk

Lm

S1

S2

D1

D2

vi

Lb

Cb

Vo

Do

Coii

CS2DS2

CS1DS1

Ro

TLlk

Lm

Mode 1 Mode 2(a)

S1

S2

D1

D2

vi

Lb

Cb

Vo

Do

Coii

CS2DS2

CS1DS1

Ro

TLlk

Lm

S1

S2

D1

D2

vi

Lb

Cb

Vo

Do

Coii

CS2DS2

CS1DS1

Ro

TLlk

Lm

Mode 1 Mode 2(b)

Figure 3. Operation modes of the proposed converter: (a) for a positive half time period and (b) fora negative half time period.

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magnetising inductor Lm is Vb, Lm stores energy from the primary capacitor Cb. Theprimary current ip increases as

ipðtÞ ¼ ipðt0Þ þ Vd � Vb

Lm þ Llkt � t0ð Þ: (1)

Mode 2 [t1, t2]: At t = t1, S1 is turned off. After a short dead-time, the gating signalvgs2 is applied to the gate of S2. S2 is turned on at zero-voltage. The input current ii flowsthrough Lb, D1, Cb, T and S2. The primary inductor current iLb decreases as iLb(t) =iLb(t2) – (Vb + Vo / N – vi)(t – t2) / Lb. When Do is turned on, the diode current iDo flowsthrough Co, T and Do. The primary current ip decreases as

ipðtÞ ¼ ipðt1Þ þ Vo=N � Vb

Lm þ Llkt � t1ð Þ: (2)

Between Mode 1 and Mode 2, the primary current ip charges CS1 and discharges CS2. Thevoltage VS2 across S2 decreases from vi + Vb to zero. The voltage VS1 across S1 increasesfrom zero to vi + Vb. The time interval during this mode is negligible compared to theswitching period Ts. The primary inductor current iLb and the magnetising current iLm1 areconsidered constant. ZVS of S2 can be assured as the switch S2 is turned on before theprimary current ip changes its direction. The next switching period begins when S1 isturned on at zero-voltage.

3. Experimental results

The proposed converter has been implemented to verify its performance. It has been builtfor the following electrical specifications as vi = 60 Hz / 100 Vrms line voltage, Vo = 28 Vand fs = 50 kHz. The circuit components are Lb = 100 µH, Cb = 1 µF, and Co = 1360 µF.The switching devices are D1 = D2 = SFR305PT, S1 = S2 = 20N60C3 and Do =DSEK6002. The magnetising inductor Lm is chosen as Lm = 200 µH. It was realised byusing PQ3230 core with Np = 65 and Ns = 10. The measured leakage inductor Llk is2.0 µH. It has been tested for a 300 W back-light power to verify its operation and toevaluate efficiency improvement. The complementary modulation control of the powerswitches are achieved by a conventional voltage mode control (Choi, 2013). Proportionaland integral control is employed to ensure the system stability and transient response. Thedead-time for the power switches was set to be 540 nsec to ensure for ZVS operation byusing the high and low side driver IR21094S.

Figure 4 shows the gating voltage (vgs1, vgs2) and drain voltage (VS1, VS2) of S1 and S2for full load condition. Before the switches S1 and S2 are turned on, the drain voltage isdecreased to zero. Thus, the switches S1 and S2 are turned on at ZVS condition.

Figure 5 shows the primary current ip and output voltage Vo for full load conditionfrom 60 Hz/100 Vrms line voltage. The output voltage is regulated as Vo = 28 V. A constantisolated output voltage is obtained from 100 Vrms line voltage without using the conven-tional full-bridge diode rectifier.

Figure 6 shows the line input voltage vi and line input current ii for 300 W outputpower. The measured power factor is 0.99. The proposed converter draws almost sinu-soidal line current from 100 Vrms line voltage. High power factor is achieved for full loadcondition. Figure 7 shows the experimental results for the comparison of measured power

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efficiency. The two-stage converter (Choi et al., 2007), single-stage converter (Choi et al.,2005) and previous bridgeless single-stage converter (Choi & Yoo, 2011) have been builtand tested for 28 V/300 W output power level in the laboratory. The two-stage converterhas the PFC circuit and half-bridge converter. It achieves the efficiency of 91.5% for 300W. The single-stage converter based on the half-bridge converter obtains the efficiency of92.6% for 300 W. The previous bridgeless single-stage converter obtains the efficiency of93.0% for 300 W. The proposed converter achieves the efficiency of 93.5% for 300 W.The proposed converter improves the efficiency by 2.0% compared to the two-stageconverter. Another reference design employing two-stage converter has been found in

Figure 5. Measured waveforms of the primary current ip and output voltage Vo for full loadcondition.

Figure 4. Measured waveforms of the gating voltage (vgs1, vgs2) and drain voltage (VS1, VS2) of S1and S2 for full load condition.

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Jimmy, Pony, and Yoshio (2011) for LED back light LCD TV power supply. The designconsists of a primary ac-dc stage for PFC and a secondary isolated dc-dc converter for theLED backlight. The boost converter has been used for the ac-dc stage. The LLC resonantconverter has been used for the isolated dc-dc converter. Compared to the single-stageconverter, the proposed converter improves the efficiency by 0.9%. Conduction losses arereduced without using the full-bridge diode rectifier. By reducing both conduction lossesand switching losses, the proposed converter improves the power efficiency.

Figure 7. Measured power efficiency.

Figure 6. Measured waveforms of the line input voltage vi and line input current ii for 300 Woutput power.

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Table 1 shows the thermal performance of the converters at the ambient temperatureTamb = 20°C. Table 2 shows the thermal performance of the converters at the ambienttemperature Tamb = 25°C. For achieving high power density and achieving prolongedreliability of switching power converters, the temperature of switching power devices forreliability requirement is conventionally given as T = 75°C at Tamb = 25°C (de-Jong,Ferreria, & Bauer, 2006). From the measured experimental results, it can be seen that theproposed converter show a better thermal performance compared to the previouslyreported converter.

4. Conclusion

This paper proposes a high-efficiency isolated SEPIC converter for LED displays. Theproposed isolated SEPIC converter has no full-bridge diode rectifier. It can supply LEDback-light power with reduced conduction losses. Switching power losses as well asconduction losses are reduced by the proposed converter. To evaluate its performance, a28 V, 300 W prototype circuit of the proposed converter has been designed and tested.The validity of the proposed converter has been confirmed by the experimental results.The proposed converter achieves a high efficiency of 93.5% with an almost unity powerfactor at 100 Vrms line voltage. The proposed converter can reduce the manufacturing costand improves the power efficiency, providing a cost-effective power conversion schemefor LED back-light driving system.

FundingThis work was supported by Basic Science Research Program through the National ResearchFoundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning [2011-0013025] and also by the National Research Foundation of Korea (NRF) grant funded by the Koreagovernment (MISP) [2010-0028509].

Table 2. Thermal performance at Tamb = 25°C.

Component

T[°C] (Tamb = 25°C)

Proposed converter Previous converter (Choi et al., 2005)

Power switch S1 66 69Power switch S2 67 70Output diode Do1 72 75Output diode Do2 73 77

Table 1. Thermal performance at Tamb = 20°C.

Component

T[°C] (Tamb = 20°C)

Proposed converter Previous converter (Choi et al., 2005)

Power switch S1 60 62Power switch S2 72 64Output diode Do1 66 70Output diode Do2 68 73

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