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HIGH EFFICIENCY AC-DC LED DRIVER WITHOUT ELECTROLYTIC CAPACITORS

FOR STREET LIGHTING

Madrid, 24-25 de Marzo de 2011

University of Oviedo Electronic Power Supply System Group

2

Partners

University of Oviedo

FIREFLY PROJECT PATENT PENDING

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- Introduction

- Proposed topology

- First stage & second stage

- Load analysis

- Third stage

- Experimental results

- Conclusions

OutlineO

UT

LIN

E

4

INTRODUCTION

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Aim of the project

Ac-dc converter for LED-based street lighting application

4 LED strings of 40 W (350 mA) each

Other mandatory conditions

-PFC-No electrolytic capacitor- Galvanic isolation-Efficiency > 93%-Universal range-Constant frequency-Dimming-180x60x45 (mm)-Cost (of course)IN

TR

OD

UC

TIO

N

6

PROPOSED TOPOLOGY

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Chosen topology

CC/CC

CC/CC

CC/CC

AC/DC CC/CC

Two output voltages!!

3 stage topology

KEY ISSUEEach stage is OPTIMIZED for JUST ONE task

High efficiency is possible

Regulation of the LED string current

Galvanic isolation

Power Factor Correction

INT

RO

DU

CT

ION

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First stage

- PFC Boost converter operating at constant frequency without electrolytic capacitors

PFC & Continuous Conduction Mode

SiC Schottky diodes are the solution. The increase in cost is acceptable for AEG POWER SOLUTIONS.

No electrolytic capacitors

Output voltage ripple is high and one of the next stages will have to cancel it…

PROVIDED BY AEG POWER SOLUTIONS

FIR

ST

STA

GE

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Second stageElectronic transformer Galvanic isolation at very high efficiency but with unregulated outputs (fixed duty cycle)

SE

CO

ND

STA

GE

Vout_2_high

Vout_2_low

npri:nhigh:nhigh

Vout_1=Vin_2

C1

C2

M1

M2

D1_H

D1_L

D2_L

D2_H

npri:nlow:nlow

High efficiency

ZCS in diodes[Secondary leakage inductance-output capacitors] resonance

ZVS in MOSFETs Energy stored in the primary leakage inductance (aided by the magnetizing current)

ZCS implies no output voltage regulating

capabilities, hence…

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Second stageElectronic transformer Galvanic isolation at very high efficiency but with unregulated outputs (fixed duty cycle)

SE

CO

ND

STA

GE

Vout_2_high

Vout_2_low

npri:nhigh:nhigh

Vout_1=Vin_2

C1

C2

M1

M2

D1_H

D1_L

D2_L

D2_H

npri:nlow:nlow

Unregulated output voltages

Vout_high=Vin · Ghigh

Vout_low=Vin · Glow

Fixed gains

Low-frequency ripple (PFC) needs to be canceled by third

stages

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Before analyzing the third stages…Vled

Iled

light

V1

V2

I1I2

L1

L2

L=0The design of the third stages should take this into

account

Vdrop

TH

IRD

STA

GE

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V3_high

V3_low

Vout_3

Vfilter

V 3_high

V 3low

Vfilter

Third stages

Maximum output voltage (D=1) V3_high

Minimum output voltage (D=0) V3_low

Not a real drawback if V3_low is wisely chosen

And the advantages…?

MOSFET and diodes only have to withstand V3_high-V3_low

EFFICIENCY IS CONSIDERABLY HIGHER THAN IN BUCK CONVERTERTH

IRD

STA

GE

13EXPERIMENTAL RESULTS

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Prototype

Second stage

-200 W-Outputs 140 V & 80 V- ETD 34

Third stages (4x)

-50 W each-E20- Total Current DimmingE

XP

ER

IME

NTA

L R

ES

ULT

S

15

a)

(500 mA/div)

Second stageE

XP

ER

IME

NTA

L R

ES

ULT

S

a)

VGS (10 V/div)

VDS (100 V/div)

ZCS in the diodes of the ET ZVS in the MOSFETs of the ET

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Third stageE

XP

ER

IME

NTA

L R

ES

ULT

S

a)

VMOSFET (50 V/div)

Vdiode (50 V/div)

Vfilter (25 V/div)

a)

b)

OS (50 /d )

VGS (10 V/div)

Vfilter (25 V/div)

Voltage withstood by MOSFET and diode Input voltage of the filter

140 V 80 V

140 V - 80 V = 60 V

V3_high – V3_low

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Second + third stageE

XP

ER

IME

NTA

L R

ES

ULT

S

b)a)

Input voltage (100 V/div)

Output current (100 mA/div)

Input voltage (100 V/div)

Output current (100 mA/div)

Constant input voltage in second stage:400 V

Ripple in the input voltage of second

stage: 70 Vpp

c)

/div)

Input voltage (100 V/div)

Output current (100 mA/div)

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Efficiency of second and third stagesE

XP

ER

IME

NTA

L R

ES

ULT

S

60 80 100 120 14092

93

94

95

η (%)

Pin (W)

Peak efficiency=95.9% at nominal current

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SUMMARY&

CONCLUSIONS

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Summary & Conclusions

-A three-stage topology has been developed for LED-based street lighting applications

-Efficiency is high due to the optimization of each stage for just one task

-SiC technology allows us to develop a constant frequency application

-Third stages have been optimized taken into account the special features of the load (i.e.,LEDs) without losing total dimming

CO

NC

LUS

ION

S

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THANKS!ANY QUESTION?

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PFC

Two-stage topology

CC/CC

CC/CC

CC/CC

Main features- Low switching losses (BCM)- No electrolytic capacitor

- Variable frequency- Large output-voltage ripple

Main features- Galvanic isolation- Ripple cancelation- Current regulation (dimming)

- N transformers (expensive)

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Three-stage topology

CC/CC

CC/CC

CC/CC

PFC CC/CC

Main features Main featuresMain features- Low switching losses- No electrolytic capacitor

- Variable frequency- Large output-voltage ripple

- Galvanic isolation- Ripple cancelation

- Variable frequency (typically)

-Current regulation (dimming)

- Reduces efficiency