H.264 SDVR 4CH RDK Source Reference...

MultiStream Multi-channel H.264 CODEC

February , 2008

3F,Humax Village, 11-4, Sunae-dong, Bundang-gu, Seongnam-si, Gyeonggi-do, Korea 463-825

Tel: +82-31-713-4170 Fax: +82-31-713-4174 http://www.pentamicro.com

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H.264 SDVR 4CH RDK SOURCE Reference MANUAL

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Revision History

Revision No.

Date Modification List

Version 1.0.0 02/29/2008 First release of sDVR RDK Source Manual

Version 1.0.1 04/17/2008 Add chinese font

Version 1.0.2 04/29/2008 Add OSD API

Version 1.0.3 05/16/2008 Change bootloader figuration

Version 1.0.4 06/11/2008 Modify kernel configuration(sata harddisk configuration)

We, Pentamicro Inc. reserve the right to change any products described herein at any time and

without notice. Pentamicro Inc. assumes no responsibility or liability arising from the use of the

product described herein, except as expressly agreed to in writing by Pentamicro Inc. The use and

purchase of the product does not convey a license under any patent rights, copyrights, trademark

rights, or any other intellectual property rights of Pentamicro Inc.

Pentamicro Inc.

3F, Humax Village, 11-4, Sunae-dong, Bundang-gu, Seongnam-si, Gyeonggi-do, Korea 463-825

TEL +82-31-713-4170 FAX +82-31-713-4174 E-mail [email protected] Web. www.pentamicro.com

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Contents

1. About This Manual .................................................................................... 7

1.1. Who Should Use This Manual ................................................................. 7

2. Hareware Architecture ................................................................................ 8

2.1. Hardware Installation ........................................................................... 8

2.2. Hardware Composition......................................................................... 9

2.3. Memory map and Interrupt/GPIO............................................................10

2.4. Peripheral connection .........................................................................13

2.5. Clock and reset distribution ..................................................................15

3. Cross-Compile ToolChain .......................................................................... 17

3.1. What You Need.................................................................................17

3.2. Configure the Building Environment ........................................................17

4. Bootloader............................................................................................. 19

4.1. Installation and Compile ......................................................................19

4.2. Composition ....................................................................................20

4.3. Bootloader source code ......................................................................20

4.4. Bootloader upgrade ...........................................................................24

5. Kernel and Device Driver ............................................................................ 26

5.1. Installation and Compile ......................................................................26

5.2. Composition ....................................................................................26

6. AT206x Device Driver ................................................................................ 34

6.1. Installation.......................................................................................34

6.2. Composition ....................................................................................35

6.3. API................................................................................................44

7. Application ............................................................................................ 55

7.1. Installation.......................................................................................55

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7.2. Composition ....................................................................................55

7.3. Procedure for testing function ...............................................................65

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List of Figures

Figure 2-1 Architecture of AT2061 Standalone DVR RDK .......................................... 9

Figure 2-2 Remap and address map change ...................................................... 10

Figure 2-3 Rear output ................................................................................... 14

Figure 2-4 Clock layout................................................................................... 15

Figure 2-5 Reset ........................................................................................... 16

Figure 4-1 Directory Hierarchy .......................................................................... 20

Figure 5-1. kernel option about System Type ........................................................ 27

Figure 5-2. kernel option about USB 2.0.............................................................. 28

Figure 5-3. kernel option about GPIO.................................................................. 29

Figure 5-4. kernel option about GPIO IR .............................................................. 30

Figure 5-5. kernel option about I2C core.............................................................. 31

Figure 5-6. kernel option about AT206x I2C.......................................................... 31

Figure 5-7. kernel option about AT206x I2C.......................................................... 32

Figure 6-1. the stream flow diagram of AT206x device driver..................................... 36

Figure 6-2. a flow chart of AT206x device driver loading .......................................... 36

Figure 6-3. a flow chart of AT206x device driver open ............................................. 37

Figure 6-4. Ring buffer structure........................................................................ 38

Figure 6-5. a flow chart of interrupt operation ................................................. 39

Figure 6-6. a flow chart of interrupt function ................................................... 39

Figure 6-7. Interrupt service routine .................................................................... 42

Figure 6-8. Semaphore in Multiplex data buffer...................................................... 43

Figure 6-9. Semaphore in De-multiplex data buffer ................................................ 44

Figure 7-1. Application Structure ....................................................................... 56

Figure 7-2. Start-Up sequence ......................................................................... 58

Figure 7-3. Encoding Sequence ........................................................................ 59

Figure 7-4. Decoding Sequence ........................................................................ 62

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List of Tables

Table 2-1 Address map of other peripheral devices............................................. 10

Table 2-2 Interrupt signal assignments ............................................................ 11

Table 6-1 Source file list ................................................................................. 35

Table 6-2. Encoder data ready messages............................................................ 40

Table 6-3. Decoder data request messages ......................................................... 41

Table 7-1. Thread Description .......................................................................... 57

Table 7-2. Global chip ready messages .............................................................. 58

Table 7-3. Encoder start ................................................................................. 60

Table 7-4. Encoder data ready message ............................................................. 60

Table 7-5. Acknowledge for data ready message................................................... 61

Table 7-6. Encoder stop ................................................................................. 61

Table 7-7. Decoder start ................................................................................. 62

Table 7-8. Decoder data request message........................................................... 63

Table 7-9. Acknowledge for data request message ................................................ 63

Table 7-10. Decoder stop ............................................................................... 63

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1. About This Manual This book describes the AUCUBA Stand-alone DVR software.

1.1. Who Should Use This Manual

This book is for software developers who need to support software development

for Stand-alone DVR.

Users should understand hardware and software development concept, tools, and

environment. Specifically, users should understand.

DVR(Digital Video Recorder) concept

The Linux/device driver software model

ARM Architecture and its implementation in AT2061 ARM9 core

C language programming

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2. Hareware Architecture

2.1. Hardware Installation

Do install according to method described next to prevent damage by impact and so on that

is biographical while install S-DVR circuit board.

To Install the S-DVR circuit board

1. Take out S-DVR circuit board in pack for static electricity prevention.

2. Connect 40 pin flat cables to hard disk.

3. Prepare ATX power supply and connect each S-DVR and hard disk.

4. Connect camera and monitor of necessary number degree.

5. Turn on power switch.

6. After Linux is booted, comfirm whether 4 screens are dlsplayed.

# If camera A is not linked, blue screen look.

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2.2. Hardware Composition

4CHVIDEO ADCAUDIO ADC

QUAD/MUX

(TW2835)

AT206x

VGAController

SPOT

monitoring path

recording path

Local Bus

PCI Bus

I2C Bus

I2C Bus

EthernetEthernet

P/T/ZP/T/Z

RemoconRemocon

Sensor I/OSensor I/O

audio path

PHY

FLASH USBPORT

ATP865PS/2 MOUSEPS/2 MOUSE

HOST DDR SDRAM

CODECDDR SDRAM

PCI BUS and IDE can only be used SWITCHABLE of AT206x

Figure 2-1 Architecture of AT2061 Standalone DVR RDK

The above S-DVR is composed as follows.

- Video/Audio decoder that input 4 video camera and microphone.

- AT2061 that multiplex the video/audio input signal and display monitoring

video/audio signal.

- AT2061 that encoding and decoding 4 channel multiplexed signal.

- AT2061 host processor for system control.

The video/audio input signal that input from 4 video camera and microphone is

multiplexed by TW2835 and input to the AT2061. And the video signal is output to the

Monitor to real time monitoring.

For the stream backup, USB2.0 is used.

The encoding bitstream is stored to the Hard Disk through AT2061 device driver. The

bitstream that stored in Hard Disk is transfered to the AT2061 through device driver

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and is decoded. The decoded video signal is displayed in the Monitor through video

encoder.

2.3. Memory map and Interrupt/GPIO

Configuration of Memory address is listed below.

[25:0]64MBSSMC(SMCSN3)0x4C0_00000

[25:0]64MBSSMC(SMCSN2)0x480_00000

[25:0]64MBSSMC(SMCSN1)0x440_00000

[25:0]64MBSSMC(SMCSN0)0x400_00000

[25:0]64MBSSMC(SMCSN7)0x5C0_00000

[25:0]64MBSSMC(SMCSN6)0x580_00000

[25:0]64MBSSMC(SMCSN5)0x540_00000

[25:0]64MBSSMC(SMCSN4)0x500_00000

1Gb

1Gb

Size

0x000_00000

0x200_00000

0x280_00000

Base Address Addr BitRegion

[14:0]DDR SDRAM (MCSN0)


[25:0]64MBSSMC(SMCSN3)0x4C0_00000

[25:0]64MBSSMC(SMCSN2)0x480_00000

[25:0]64MBSSMC(SMCSN1)0x440_00000

[25:0]64MBSSMC(SMCSN0)0x400_00000

[25:0]64MBSSMC(SMCSN7)0x5C0_00000

[25:0]64MBSSMC(SMCSN6)0x580_00000

[25:0]64MBSSMC(SMCSN5)0x540_00000

[25:0]64MBSSMC(SMCSN4)0x500_00000

1Gb

1Gb

Size

0x000_00000

0x200_00000

0x280_00000

Base Address Addr BitRegion



ReMap ReMap = 0= 0

ReMap ReMap = 1= 1

Figure 2-2 Remap and address map change

In the Figure 2-2, total size of SDRAM is 128Mbyte. FLASH is assigned in CS0 and 8Mbyte

is configured.

The address map of other peripheral devices is as follows.

Table 2-1 Address map of other peripheral devices

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Cursor OSD0x607_00000

CODEC0x800_00000

IDE0x700_00000

Watchdog

Timers0

Timers1

Timers2

GPIO_E ~GPIO-A

RTC

I2C

PS2KMI

UART0

UART1

Interrupt Controller

0x607_10000

0x607_20000

0x607_30000

0x607_40000

0x607_90000 ~0x607_50000

0x607_A0000

0x607_B0000

0x607_C0000

0x607_D0000

0x607_E0000

0x607_F0000

0x607_x0000

PCI Reg0x606_00000

0x600_00000

0x601_00000

0x602_00000

0x603_00000

0x604_00000

0x605_00000 Ethernet MAC Reg

USB Reg

DMAC Reg

MPMC Reg

SSMC Reg

APB

0x60x_00000

PCI0xDFF_FFFFF0xC00_00000

CODEC_MEM0x1FF_FFFFF0x900_00000

System Config. Reg

Base Address RegionEnd Address

Cursor OSD0x607_00000

CODEC0x800_00000

IDE0x700_00000

Watchdog

Timers0

Timers1

Timers2

GPIO_E ~GPIO-A

RTC

I2C

PS2KMI

UART0

UART1

Interrupt Controller

0x607_10000

0x607_20000

0x607_30000

0x607_40000

0x607_90000 ~0x607_50000

0x607_A0000

0x607_B0000

0x607_C0000

0x607_D0000

0x607_E0000

0x607_F0000

0x607_x0000

PCI Reg0x606_00000

0x600_00000

0x601_00000

0x602_00000

0x603_00000

0x604_00000

0x605_00000 Ethernet MAC Reg

USB Reg

DMAC Reg

MPMC Reg

SSMC Reg

APB

0x60x_00000

PCI0xDFF_FFFFF0xC00_00000

CODEC_MEM0x1FF_FFFFF0x900_00000

System Config. Reg

Base Address RegionEnd Address

Configuration of IRQ and GPIO is listed below.

Table 2-2 Interrupt signal assignments

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126GPIO_C

127GPIO_D

128GPIO_E

29Reserved *

30Reserved *

31Reserved *

120PCI

121USB_EHCI

022USB_OHCI

123IDE

116CODEC

17Reserved*

118ETH_Rx

119ETH_Tx

GPIO_B

GPIO_A

Unit Name PolarityInterrupt Number

125

124

126GPIO_C

127GPIO_D

128GPIO_E

29Reserved *

30Reserved *

31Reserved *

120PCI

121USB_EHCI

022USB_OHCI

123IDE

116CODEC

17Reserved*

118ETH_Rx

119ETH_Tx

GPIO_B

GPIO_A


125

124

110RTC_Periodic

111I2C

112PC2KMI

113UART0

114UART1

115DMAC

14Timer2

15Timer3

16Timer4

17Timer5

10Timer0

11Timer1

12CommRx

13CommTx

RTC_Alarm

Watchdog


19

18

110RTC_Periodic

111I2C

112PC2KMI

113UART0

114UART1

115DMAC

14Timer2

15Timer3

16Timer4

17Timer5

10Timer0

11Timer1

12CommRx

13CommTx

RTC_Alarm

Watchdog


19

18

Do not enable “Reserved” interrupt signal.

Pin Name AT2061 Pin No Type Description

GPIO Group A

LI_FSYNC K5 GPIO_A0

LI_VSYNC L2 GPIO_A1

LI_HSYNC L1 GPIO_A2

LI_VVALID M2 GPIO_A3

LI_HVALID L5 GPIO_A4

I2CSCL V24 GPIO_A5

I2CSDA V22 GPIO_A6

KMICLK Y23

I/O

GPIO_A7

GPIO Group B

RI_FSYNC AC6 GPIO_B0

RI_VSYNC AB7 GPIO_B1

RI_HSYNC AD5 GPIO_B2

RI_VVALID AF2 GPIO_B3

RI_HVALID AB8

I/O

GPIO_B4

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KMIDATA AB24 GPIO_B5

UART0TXD AA26 GPIO_B6

UART0RXD Y25 GPIO_B7

GPIO Group C

UART0CTS AB26 GPIO_C0

UART0RTS W22 GPIO_C1

UART1TXD V23 GPIO_C2

UART1RXD W24 GPIO_C3

UART1CTS AA25 GPIO_C4

UART1RTS AC26 GPIO_C5

UART1DCD AB25 GPIO_C6

UART1DSR Y24

I/O

GPIO_C7

GPIO Group D

UART1RI W23 GPIO_D0

UART1DTR AC25 GPIO_D1

UART1OUT1 AD26 GPIO_D2

UART1OUT2 AA24 GPIO_D3

nSMCS2 H5 GPIO_D4

nSMCS3 J1 GPIO_D5

nSMAS K2 GPIO_D6

nSMBLAST K3

I/O

GPIO_D7

GPIO Group E

GPIO0/nSMCS4 U23 GPIO_E0

GPIO1/nSMCS5 W25 GPIO_E1

GPIO2/nSMCS6 U22 GPIO_E2

GPIO3/nSMCS7 Y26 GPIO_E3

GPIO4 W26 GPIO_E4

GPIO5 V25 GPIO_E5

GPIO6 T22 GPIO_E6

GPIO7 T23

I/O

GPIO_E7

2.4. Peripheral connection

The peripheral connector is listed in Figure 2-3.

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- five Dual BNC connector for 4 channel video input, loop back video output,

composite video output and spot out.

- six port RCA connector for 4 channel audio input and 1 channel audio output

- Combination of 2 USB connector for USB 2.0 & USB Mouse

and 1 RJ-45 connector for network

- RS-232C connector for serial communication

- D-SUB connector for VGA

- PS/2 connector for Mouse

CH

1

CH

1_L

OO

P

CH

2

CH

2_L

OO

P

CH

3

CH

3_L

OO

P

CH

4

CH

4_L

OO

P

VID

EO

_OU

T

SPO

T_O

UT

AU

DIO

CH

1

AU

DIO

CH

3

AU

DIO

_O

UT

AU

DIO

CH

4

AU

DIO

CH

2

RS-232

VG

A

ETH

ERN

ET

USB

2.0

USB

MO

USE

NTSC

/PAL

PS/2

MO

USE

Figure 2-3 Rear output

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2.5. Clock and reset distribution

PCI SLOT

CLOCKBUFFER

4CHVIDEO ADCAUDIO ADCQUAD/MUX(TW2835)

AT206x

54MHz

48MHz

33MHz

ATP865

MDIN 180 RTL8201CL

25MHz27MHz

Figure 2-4 Clock layout

2.5.1. AT2061 clock

The clock used in AT2061 is listed below.

- VCLKR_IN for Video encoding

- VCLKL_IN for Video Live

- VCLK_OUT for TW2835 Playback & MDIN180 VGA

- ACLKX_IN, ACLKR_IN for audio encoding

- CLK_48M for AT2061 core logic

- USB_CLK for USB 2.0

- PCI_CLK for PCI Controller

CLK_48M for AT2061 is 48.00MHz and VCLKL_IN, VCLKR_IN is used 27 MHz that

is output from TW2835. ACLKX_IN and ACLKR_IN is 2.048MHz.

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2.5.2. TW2835 clock

The clock used in TW2835 is listed below.

- CLK_54M for operating TW2835

- CLKVDOX for Video Live

- CLKVDOY for Video encoding

- PBCLK for video Playback

- ACLKR, ACLKP for audio encoding

CLK_54M is 54MHz and CLKVDOX, CLKVDOY is 27MHz output clock.

2.5.3. Reset

Figure 2-5 Reset

To implement Power on reset, resister and capacitor is used. And external reset

switch is implemented in this system.

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3. Cross-Compile ToolChain

3.1. What You Need

In the following chapter, we assume you already have the following materials:

The DENX Embedded Linux Development Kit (ELDK) 3.1.1 for ARM

(www.denx.de)

3.2. Configure the Building Environment

Before the drivers and applications software can be build, the first step is to

configure the building environment. The environment consists of two parts:

the DENX Embedded Linux Development Kit (ELDK) 3.1.1

the driver and application source release

3.2.1. mount

- In case of mounting CD image

# mount –t iso9660 –o loop arm-2005-03-06.iso <mount_path>

-> Mount the CD image. <mount_path> can be /mnt/cdrom or others

- In case of burning arm-2005-03-06.iso in the CD

# mount /dev/cdrom <mount_path>

Ex)

# mount –t iso9660 –o loop arm-2005-03-06.iso /mnt/cdrom

# mount /dev/cdrom /mnt/cdrom

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3.2.2. make directory

# mkdir <install_dir>

-> Generate /opt/eldk or /usr/local/eldk etc...

Ex)

# mkdir /opt/eldk

3.2.3. install

# <mount_path>/install –d <install_dir>

-> Install to the <install_dir>

Ex)

# /mnt/cdrom/install –d /opt/eldk

For reference >>

./install [-d <dir>] [<cpu_family1>] [<cpu_family2>] ...

-d <dir> Specifies the root directory of the ELDK being installed. If omitted, the ELDK goes into

the current directory.

<cpu_family> Specifies the target CPU family the user desires to install. If one or more <cpu_family>

parameters are specified, only the target components specific to the respective CPU

families are installed onto the host. If omitted, the target components for all supported

target architecture CPU families are installed.

In case of PPC ELDK, you must specify the cpu_family as “ppc_4xx, ppc_4xxFP, ppc_6xx,

ppc_74xx, ppc_85xx, ppc_8xx”, but in case of ARM, you need not specify cpu_family.

3.2.4. environment variable

-> Set the environment variable(PATH of the cross compiler <install_path>/usr/bin) in the

/etc/bashrc or .bashrc 에서 cross compiler

Ex) .bashrc

export PATH=$PATH:/opt/eldk/usr/bin

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4. Bootloader

4.1. Installation and Compile

In Bootloader, AT206x rom-less firmware download and basic parameter settings

are performed.

4.1.1. Installation

The software source codes are released as a gzipped tar package. The only

installation step is to unpack the desired directory on your development host platform.

To unpack the software source release on your development host, run the following

command :

#cd where_you_want_to_install

#tar xvzf Bootloader_aucuba-ver-x.x.x.tgz

4.1.2. Compile

After changing to the directory with the bootloader source code you should make

sure that there are no build results from any previous configurations left:

#cd Bootloader_aucuba-ver-x.x.x

#make mrproper

The following command configures bootloader for the aucuba board:

#make aucuba_rdk_config

#make clean

#make

#ls u-boot.bin

Bootloader’s final object, u-boot.bin, is generated.

4.1.3. Initialization

To initialize the bootloader running on your aucuba board, you have to connect a

terminal to board`s serial console port.

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The default configuration of the console port on the aucuba board uses a baudrate

of 115200/8N1 ( 115200 bps, 8bit per character, no parity, 1 stop bit, no handshake )

4.2. Composition

Figure 4-1 Directory Hierarchy

4.3. Bootloader source code

4.3.1. Physical Memory Controller Configuration

[ Bootloader_aucuba/include/aucuba.h ]

: Basic memory bank configuration of network camera

#define CONFIG_BOOTARGS "console=ttySOC0,115200 root=/dev/ram"

Default boot argument, console is serial.

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#define PHYS_SDRAM_1 0x20000000 /* SDRAM Bank #1 */

#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */

Physical sdram start address is 0x2000_000 and, size is 128Mbytes.

#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */

#define PHYS_FLASH_SIZE 0x00800000 /* 8MB */

#define CFG_MAX_FLASH_SECT (128)

Physical flash start address is 0x0000_0000 and size is 8Mbytes.

Physical flash memory sector configuration is 8MB(64Mbit) = 128KB * 64.

#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)

#define CFG_ENV_SIZE 0x40000

Address of the Sector in which environment variables about booting process in

Flash memory are to be located.

4.3.2. Flash driver

[ Bootloader_aucuba/board/aucuba/flash.c ]

Intel 28F640J3A and 29GL device driver.

Please refer to the data sheet of flash.

4.3.3. DDR Sdram configuration

[ Bootloader_aucuba/cpu/arm926ejs/start.s ]

DDR sdram configuration of SDVR.

4.3.4. AT206x setup ( Firmware download )

[ Bootloader_aucuba/ common/main.c, api_at206x.c]

: AT206x rom-less firmware downloading and basic parameter setting.

4.3.4.1. Firmware download

#define AT2061_FIRMWARE_ADDR 0xa0000

#define AT2061_FIRMWARE_SIZE 0x5efff

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Physical memory address(in Flash memory) where the firmware is going to be

downloaded.

#define AT2061_MEM_BASE_ADDR 0x90000000

Physical codec memory address is 0x9000_0000.

…………………….

for (ii = 0; ii < ((Size/4) + 256); ii++) {

if (ii < 0x08) m_MSG ("0x%08x ", *r1_value);

*((volatile unsigned int *)((unsigned int)AT2061_MEM_BASE_ADDR+ii*4)) =

*r1_value;

r1_value++;

}

After reading the firmware from AT2061_FIRMWARE_ADDR, download to

AT2061_MEM_BASE_ADDR in codec memory.

…………………………………….

rdata = at206x_initreg_read(id);

wdata = ( rdata | INIT_SCU_ENABLE);

at206x_initreg_write(

id, // at206x chip number

wdata); // write data

wdata = ( wdata | INIT_APU_ENABLE); // | INIT_VPU_ENABLE);

at206x_initreg_write(

id, // at206x chip number

wdata); // write data

Executes AT206x`s SCU, APU and VPU reset.

……………………………..

do {

/* data read from Tx_FIFO of AT206X */

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ret = at206x_txreg_read(id);

if (ret == rx_id) {

for (cnt = 0; cnt < data_num; cnt++) {

ret = at206x_txreg_read(id); // dummy operation

}

} else {

m_MSG("boot error : can not read chip ready message!!!\n");

m_MSG("\t TxID [0x%x]:[0x%x]\n", rx_id, ret);

}

udelay(2000);

status = at206x_statusreg_read(id);

ii ++;

}while ((status & STAT_TX_FIFO_NOT_EMPTY) && (ii < 100));

AT206x chip Ready status check.

4.3.4.2. basic parameter setting

at206x_GLB_set_operation_mode(

0x3, // codec mode

1024, // sdram size

0x4, // channel size

0x3); // maximum gopm

output video format : NTSC or PAL

at206x_DV_output_video_format(

m_nVFormat); // '0' NTSC, '1' PAL, '2' VGA(640x480), default is

NTSC

at206x_EV_input_video_format(

720, // horizontal size (32 ~ 720), default is

720

m_nVFormat ? 576 : 480, // vertical size (16 ~ 576), default is 480

m_nVFormat ? 3 : 4, // '3' 25, '4' 30000/1001

1); // interlaced

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at206x_EV_monitor_onoff(

1, // '0' off, '1' on, default is '0'

0); // Decoding channel ID to be used for monitor

at206x_DV_video_encoder_output(

1); // '0' off, '1' on, default is '0'

at206x_DA_audio_dac_enable(

1); // '0' disable, '1' enable

at206x_DA_audio_input_bypass(

1); // '0' playback, '1' audio input bypass

4.3.5. Video decoder and Audio ADC setting.

[ Bootloader_aucuba/ common/main.c]

: sets TVP5150 for video input and PCM1870 for audio ADC.

4.4. Bootloader upgrade

This procedure is very important. If the action list below is failed, your system will

not be redownloaded through serial port. In case of that you must use JTAG to

download the program. So please be careful to execute this item.

1) Please access to Aucuba board via serial port(RS-232) by console program like

Token or Hyperterminal.

2) Start the system again after it has been turned off. Press “Enter” key several

times shortly after reboot starts and check the following message.

Hit any key to stop autoboot: 0

3) Set the IP address of your PC ( ex:192.168.1.10 )

=> setenv serverip 192.168.1.10

4) => tftp 20f00000 u-boot.bin.1.1.1

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5) => erase 0 3ffff

6) => cp.b 20f00000 0 40000 ( 40000 is size of u-boot.bin.1.1.1 )

7) => reset

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5. Kernel and Device Driver

5.1. Installation and Compile

5.1.1. Environment Configuration

Run the following command to configure the kernel environment.

Copy linux-2.6.14.7.tgz to /home/USER_ID/work directory

Unzip using command tar xvzf linux-2.6.14.7.tgz

Move to linux-2.6.14.7 directory

After then follow the procedures when compiling.

- Type command make menuconfig then you can see the kernel configuration

screen.

- At the “Load an Alternative Configuration File” menu

Type aucuba_pata_config ---> in case of pata harddisk

Type aucuba_sata_config ---> in case of sata harddisk

- Change the configuration and save then exit the menu.

- In case of sata harddisk , you must define __CONFIG_SATA__ at the Makefile.

5.1.2. Build and Install the Kernel

Once the environment is configured correctly, building and installing the kernel is

trivial task. Run the following command to build and install kernel.


Type command make vmlinux.uboot

Then you can see the vmlinux.uboot

5.2. Composition

5.2.1. ARM Environment configuration

The default architecture of the kernel is x86, when you download it at first. So you

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have to change the environment to the target architecture(ARM). And when

performing cross compilation for other architectures ARCH shall be set to the target

architecture as follow.


Open Makefile file using vi editor

Edit to modify to below contents

SUBARCH := arm

ARCH ?= $(SUBARCH)

CROSS_COMPILE = arm-linux-

5.2.1.1. Option Configuration

You have to change the kernel option as illustrated in the Figure 5-1.

Figure 5-1. kernel option about System Type

The following sequence is to configure the kernel option.

1. Prompt> make menuconfig

2. System Type --->

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3. ARM system type (Aucuba) --->

[*] Support ARM926T processor

5.2.2. AT206x USB 2.0 High Speed Support

You have to change the kernel option for using the USB Host 2.0 function of

AT206x as illustrated in the Figure 5-2 .

Figure 5-2. kernel option about USB 2.0


The following sequence is to configure the kernel option. (Refer to the Figure 5-2)


2. Device Drivers --->

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3. USB support --->

4. <*> Support for Host-side USB

[*] USB device filesystem

<*> EHCI HCD (USB 2.0) support <----- for High Speed & Full Speed

[*] Full speed ISO transactions (EXPERIMENTAL)

[*] Root Hub Transaction Translators (EXPERIMENTAL)

<*> OHCI HCD support <----- for Low Speed

5.2.3. AT206x GPIO Support

You have to change the kernel option for using the GPIO function of AT206x as

illustrated in the Figure 5-3 .

Figure 5-3. kernel option about GPIO


The following sequence is to configure the kernel option. (Refer to the Figure 5-3 )



3. Character devices --->

<*> AT206X GPIO driver support

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5.2.4. AT206x GPIO IR Support

You have to change the kernel option for using the GPIO IR function of AT206x as


Figure 5-4. kernel option about GPIO IR


The following sequence is to configure the kernel option. (Refer to the Figure 5-4)




<*> AT206X GPIO remocon IR driver support

5.2.5. AT206x I2C Support

You have to change the kernel option for using the i2c function of AT206x as

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Figure 5-5. kernel option about I2C core

Figure 5-6. kernel option about AT206x I2C

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3. I2C support --->

<*> I2C support

<*> I2C device interface

I2C Hardware Bus support --->

<*> AUCUBA I2C Driver

5.2.6. AT206x Serial Port(Console) Support

You have to change the kernel option for using the serial port of AT206x as


Figure 5-7. kernel option about AT206x I2C






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4. Serial drivers --->

<*> AUCUBA Serial port support

[*] Support for console on AUCUBA serial port

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6. AT206x Device Driver

6.1. Installation

6.1.1. Build and Install the Drivers

Once the environment is configured correctly, building and installing the drivers is

trivial task. Run the following command to build and install driver module.

For driver module:

cd INSTALL_ROOT/driver

make clean To delete object files and execution files

make To build/install drivers

6.1.2. Create Linux Device Node

To access these drivers in user space applications, there are some Linux device

nodes needed. These nodes should be created manually by running the following

commands on target platform (please make sure you are logged in as root user):

cd /dev

mknod at206x c 247 255

mknod at206x-1 c 247 1




You don’t need to do this, because this node was included in Ramdisk

Circumstance.

6.1.3. Insert the Drivers

The drivers are provided as dynamically loadable Linux modules. You needed to

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load them when the target board has booted up.

cd /sdvr

insmod at206x_drv.ko

You don’t need to do this, because this node was included in Ramdisk

Circumstance.

6.2. Composition

6.2.1. Source Files List

Table 6-1 Source file list

Directory Files Description

driver/src/at206x

api_functions.c, cmem.c,

dispatch.c, driver.c,

isr_func.c, support_func.c

C files

driver/include/at206x

api_functions.h, dispatch.h

driver.h, driver_defs.h,

isr_func.h, support_func.h

Header files

Device Driver

driver/include

func_error.h, penta_ioctl.h,

reg206x-codec.h, reg206x-dma.h,

reg206x-int.h

API interface files

6.2.2. Description of the AT206x Device Driver

AT206x device driver is programmed as character device driver. Figure 6-1 shows

stream the flow diagram of AT206x device driver.

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RXRX

AT206xAT206x

TXTX ENCENC DECDEC

INTINTMessageMessagefifofifo

StreamStreamfifofifo

IOCTL()IOCTL() READ()READ()WRITE()WRITE()

Stream data

Stream data empty

From hard disk(application)

11 111 111 222 222 23 33333

1332334213

Decoder Queue buffer

4

1

332334213

Encoder Queue buffer

to hard disk(application)

ISR()ISR()

Hardware Hardware LayerLayer

Device Driver Device Driver LayerLayer

API LayerAPI Layer

Application Application LayerLayer

Encoder ThreadEncoder Thread Decoder ThreadDecoder Thread

RXRX

AT206xAT206x

TXTX ENCENC DECDEC

INTINTMessageMessagefifofifo

StreamStreamfifofifo


Stream data

Stream data empty


11 111 111 222 222 23 33333

1332334213


4

1

332334213



ISR()ISR()

Hardware Hardware LayerLayer


API LayerAPI Layer



Figure 6-1. the stream flow diagram of AT206x device driver

6.2.2.1. device driver loading

init_module() function call driver loading (insmod)driver loading (insmod)init_module() function call

AddDevice() function call

Count < Max AT206x Num

AddDevice() function call

Y

N

Count < Max AT206x NumY

N

ENDEND

Figure 6-2. a flow chart of AT206x device driver loading

For driver loading, you have to execute insmod command at first. The insmod

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installs a loadable module in the running kernel and tries to link a module into the

running kernel by resolving all symbols from the kernel's exported symbol table.

Figure 6-3 describes device driver loading sequence.

6.2.2.2. device driver open

dispatch_open() function call driver open from application

StartDevice() function call

Device Minor Num ?

END

Get resourcea. interruptb. IO memoryc. DMAd. Queue buffer

Get device_object structure

driver open from applicationdispatch_open() function call

StartDevice() function call

Device Minor Num ?

Get device_object structure

Get resourcea. interruptb. IO memoryc. DMAd. Queue buffer

END

Figure 6-3. a flow chart of AT206x device driver open

If you load the driver using insmod command, you will have to call open function

for the next sequence. The open() system call is used to convert a pathname into a

file descriptor (a small, non-negative integer for use in subsequent I/O as with

read, write, etc.). And then you can use at206x resource through the file descriptor.

6.2.2.3. device driver queue buffer

Since the AT206X is capable of simultaneously encoding and decoding, buffers are

allocated for the encoder and decoder respectively in the device driver. 30 buffers are

assigned to read or write the encoded stream by the AT206X in the device driver. Each

buffer is 100KB. Below figure illustrates the ring structure of 30 buffers.

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N-1 N-2 4 3 2 1 0

Ring Buffer Where, N is the MAX_BUF_NUMEach buffer size is the MAX_BUF_SIZEWrite/read sequence : 0, 1, 2, …, N, 0, 1,…

Condition of the ring buffer

If ring == 0 then rd_cnt <= wr_cnt If ring == 1 then rd_cnt > wr_cnt wr_cnt == MAX_BUF_NUM then ring ++ rd_cnt == MAX_BUF_CNT then ring –-

read operation

If (ring == 0 && rd_cnt <= wr_cnt) {rd_cnt ++;if (rd_cnt == MAX_BUF_NUM) {

ring --;rd_cnt = 0;

} else if (ring == 1){rd_cnt ++;

}

Write operation

If (ring == 0) {wr_cnt ++;if (wr_cnt == MAX_BUF_NUM) {

ring ++;wr_cnt = 0;

} else if (ring == 1 && wr_cnt < rd_cnt){wr_cnt ++;

}

Figure 6-4. Ring buffer structure

If encoded streams are written to the multiplex data buffer as big as

MAX_BUF_NUM, in other words, when wr_cnt(write count) becomes MAX_BUF_NUM,

the values of ring becomes ‘1’. Contrary to the above, if application parts read the

values from the multiplex data buffer as big as MAX_BUF_NUM, in other words, when

rd_cnt(read count) becomes MAX_BUF_NUM, the values of ring becomes ‘0’. This

operation keeps rotating.

If ring is ‘0’, rd_cnt must be equal to wr_cnt or below than wr_cnt. And if ring is ‘1’,

rd_cnt must be bigger than wr_cnt. With these conditions satisfied, overwriting can be

avoided.

6.2.2.4. device driver interrupt operation

The AT206X generates interrupt signals via nIRQ/INT when one frame encoding is

finished or it is ready for the decoding. At that time, interrupt service routine(ISR) of

the device driver is being operated as following process.

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at206x_interrupt() function call

at206x_dma_interrupt() function call

DMA done ?

END

AT206x DMA Interrupt

DMA transfer start

Y

N

AT206x external Interrupt


at206x_dma_interrupt() function call

DMA done ?

END

AT206x DMA Interrupt

DMA transfer start

Y

N

AT206x external Interrupt

Figure 6-5. a flow chart of interrupt operation


Read tx-fifo

Mux or Demux ?

MUX DEMUX

Get stream info. Read tx-fifo(dummy)

Set DMA info. Set DMA info.

Get stream info.a. Stream info.b. Stream size

Set DMA info.a. Source physical address

: AT206x mux fifob. Destination physical address

: memoryc. DMA sized. DMA mode

DMA transfer start

Read only one time


: memoryb. Destination physical address

: at206x mux fifoc. DMA sized. DMA mode


Read tx-fifo

Mux or Demux ?

MUX DEMUX

Get stream info. Read tx-fifo(dummy)

Set DMA info. Set DMA info.

Get stream info.a. Stream info.b. Stream size


: AT206x mux fifob. Destination physical address

: memoryc. DMA sized. DMA mode

Read only one time


: memoryb. Destination physical address

: at206x mux fifoc. DMA sized. DMA mode

DMA transfer start

Figure 6-6. a flow chart of interrupt function

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When interrupt takes place, Tx FIFO reads one data to check if value is ‘output

data ready’ message or ‘input data request’ message. ‘output data ready’ message

means that one frame encoding is finished, and ‘input data request’ message shows

that the AT206X is ready for the decoding. If ‘output data ready’ message is read,

interrupt service routine reads data from Tx FIFO 3 times consecutively. Following

table lists encoder system messages.

Table 6-2. Encoder data ready messages

GID = 0x2, CID = 0, MF = 1

Num. of TxData Name MID

# Pos. Field Description Note

3 Data ready message

3:0

Data type 1: System 2: Video 3: Audio 4~15: Reserved

7:4 Channel ID

8 Motion-less

9 Loss

10 Motion-less mode – 0 : normal, 1 : I frame only when motion less

11 Last flag In case that the output data split into several parts, ‘1’ for the last part and ‘0’ for the other parts

0

13:12 Picture type 1: I picture, 2: P picture, 3: B picture

1 15:0 Output data size (256-bit unit)

0x01

2 30:0 Reserved

The device driver configures wanted parameters to the value firstly read out, and

calculates encoded data size from the value secondly read out. The size of data is

‘output data size’ x 256 bit.

The third Tx FIFO’s value is not currently being used, however, the value should

be read from the device driver for the normal operation. After data calculation,

encoded data is read as big as the size of data read from the multiplex FIFO of the

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AT206X, and is written into multiplex data buffer in the device driver. As shown on

Figure 6-6, in order to simplify the structure of the AT206X device driver, multiplex

data buffer in this device driver consists of Tx FIFO parameter buffer and encoding

stream buffer.

Tx FIFO parameter buffer is comprised of the value listed on Table 6-2, and

encoding stream buffer stores the encoded data as big as the size of data read from

the multiplex FIFO of the AT206X. In the application part, the data size is calculated

by reading the second value of the multiplex data buffer, and Tx FIFO parameter

buffer is deserted and encoding stream buffer is stored into hard disk drive. ‘ACK for

Tx’ message is asserted to Rx FIFO of the AT206X after reading one frame data.

As described above, full_flag is set to ‘1’ if multiplex data buffer is full, and ‘output

data ready’ message is not being sent out. In the application part, if multiplex data

buffer is empty, ‘output data ready’ message is sent out to receive next data coming.

If ring buffer is not fully occupied, ‘output data ready’ message is sent out, and

this procedure keeps repeating until ‘encoding stop’ message transmits. In interrupt

service routine(ISR), single data is read from Tx FIFO when ‘input data request’

message is asserted. This value described as ‘reserved’ for future use, and it is must-

read-value to ensure the normal operation.

Table 6-3. Decoder data request messages

GID = 0x3, CID = 0, MF = 1



2 Data request message

0 Reserved 0x01

1 Reserved

The AT206X checks de-multiplex data buffer in the device driver to see if it is

empty or not. If de-multiplex data buffer is empty, the AT206X sends out ‘Ack for Tx’

message and ‘acknowledge for data request’ message consecutively. At this point the

AT206X doesn’t bring data from de-multiplex data buffer and the AT206X recognizes

the fact that the device driver is empty by confirming stream pointer does not change.

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If de-multiplex data buffer is not empty, data in de-multiplex data buffer is being

transmitted to the de-multiplex FIFO of the AT206X by one frame unit. After data

transmission, ‘Ack for Tx’ message and ‘acknowledge for data request’ message are

being sent out to be ready for the next data transmission. This process keeps

repeating until ‘decoding stop’ message is transmitted as shown on Figure 6-7.

ISR

Figure 6-7. Interrupt service routine

6.2.3. Semaphore in encoding operation

The AT206X device driver supports semaphore structure for the effectiveness of

application software. Initial value of semaphore is ‘0’ and the semaphore increases by

‘1’ after the AT206X wrote encoded stream when interrupt took place. If multiplex

data buffer becomes full by repeating this process, mux_full flag is set to ‘1’, and

Tx data ?

Data read from Tx FIFO

Output data ready message Input data request message




Calculate data size

Read stream data from Multiplex FIFO

Ack for Tx message

Acknowledge fordata ready message

STOP ?

Encoder stop

Y

FIFO empty ?

Y

Set mux _full flag

N

N


Write stream datato De-multiplex FIFO

Ack for Tx message

Acknowledge for data request message

Y

N

STOP ?

Decoder stop

Ack for Tx message

else

ENCODER DECODER

Y

N

Mux full ?

After data read from multiplex data buffer to application area, send ‘acknowledge for data ready ’ message

Not in ISR routine

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‘acknowledge for data ready’ message is not written to Rx FIFO of the AT206X.

Therefore, the AT206X does not generate interrupt signal related to encoder. In the

application part, the semaphore decreases by ‘1’ after reading data from multiplex

data buffer.

When multiplex data buffer becomes empty while the above process keeps

repeating, in other words, the semaphore decreases by ‘1’ from the state of ‘0’,

application part automatically is blocked resulting in not reading data any longer. With

this method, CPU performs effectively without influencing its other operations in case

that there are not data to read.

N - 1

N - 2

N - 3

Figure 6-8. Semaphore in Multiplex data buffer

6.2.4. Semaphore in decoding operation

During decoding process of the AT206X, Initial value of semaphore is

MAX_BUF_NUM. And the semaphore decreases by ‘1’ after the AT206X wrote encoded

stream in the device driver.

When de-multiplex data buffer becomes full while the above process keeps repeating,

in other words, the semaphore decreases by ‘1’ from the state of ‘0’, application part

N - 4

0

wr _cnt

N - 5

N - 6rd_cnt

up( muxfifo _read_ sem ) down( muxfifo _read_ sem )

Initial semaphore is 0

After data write from AT2061to AT2061 ’ s d/d, semaphore is increased by 1 before data read from AT2061 ’s d/d

to application area semaphore is decreased by 1

Where, N is MAX_BUF_NUM

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automatically is blocked resulting in not writing data any longer.

If the device driver writes stream data to de-multiplex FIFO of the AT206X when

interrupt took place, the semaphore increases by ‘1’. When de-multiplex data buffer

becomes empty while the above process keeps repeating, ‘Ack for Tx’ message and

‘Acknowledge for input data request’ message are written to Rx FIFO of the AT206X,

however, actual data are not being transmitted.

If the AT206X receives ‘Acknowledge for input data request’ message, it checks

stream pointer whether there are any change on the conventional value. If there are

no changes, the device driver does not transmit any data.

N - 1

N - 2

N - 3

Figure 6-9. Semaphore in De-multiplex data buffer

6.3. API

N - 4

0

wr _cnt

N - 5

N - 6rd_cnt

down( demuxfifo _write_ sem ) up(demuxfifo _write_ sem )

Initial semaphore is MAX_BUF_NUM

After data write from application area to AT2061 ’s d/d, semaphore is decreased by 1 before data read from AT2061 ’s d/d

to AT2061, semaphore is increased by 1

Where, N is MAX_BUF_NUM

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at206x

driver_api/src

/at206x

drv_api_at206x.c at206x Api C functions

at206x_gpio

driver_api/src

/at206x_gpio

drv_api_at206x_gpio.c at206x gpio Api C functions

Tw2835 driver_api/src

/tw2835

drv_api_tw2835.c,

api_tw2835_tbl.c, api_tw2835_tbl.h

tw2835 Api C functions

driver_api/include drv_api_at206x.h,

drv_api_at206x_gpio.h,

drv_api_tw2835.h,

Header files

6.3.2. AT206x API Function Details List

The AT206x API library functions support the following operations:

device driver open & close operations

register access operations

global parameter configuration operations

encoder system parameter configuration operations

encoder channel parameter configuration operations

decoder system parameter configuration operations

decoder channel parameter configuration operations

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6.3.2.1. AT206X OPEN/CLOSE FUNCTION

at206x_open

Syntax:

RETURN_CODE

at206x_open (

void

);

Description:

The open() system call is used to convert a pathname into a file descriptor (a small, non-negative

integer for use in subsequent I/O as with read, write, etc.). Through the file descriptor it is possible

to access the at206x device driver.

Parameters:

Return Codes:

Code Description

ApiSuccess The function returned successfully The function was passed an invalid device handle ApiFailed

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at206x_close

Syntax:

RETURN_CODE

at206x_close (

void

);

Description:

The close() system call closes a file descriptor, so that it no longer refers to any file and may be

reused. Any locks held on the file it was associated with, and owned by the process, are removed

(regardless of the file descriptor that was used to obtain the lock).

Parameters:

Return Codes:

Code Description

ApiSuccess The function returned successfully

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6.3.2.2. AT206X REGISTER ACCESS FUNCTION

at206x_rxreg_write

Syntax:

RETURN_CODE

at206x_rxreg_write (

uint16_t id,

uint32_t value,

uint16_t done

);

Description:

The host can change the register value and control the AT206x chip by sending the Rx parameters

to Rx FIFO through the at206x_rxreg_write() function. Rx parameters consist of RxID and RxData.

RxID is the discrimination parameters of RxData and RxData is the value of Rx parameter. And RxID

can be independently used without RxData and several RxData can follow one RxID.

Parameters:

id at206x chip number

value write data

done '0' continue, '1' done

Return Codes:

Code Description

ApiSuccess The function returned successfully The function was passed an invalid device handle ApiFailed

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at206x_rxreg_read

Syntax:

RETURN_CODE

at206x_rxreg_read (

uint16_t id,

uint32_t rxid,

uint32_t *data

);

Description:

The host can change the register value and control the AT206x chip by sending the Rx parameters

to Rx FIFO through the at206x_rxreg_write() function. And then the host read the Rx parameters

from Rx FIFO through the at206x_rxreg_read() function.

Parameters:


rxid rx id for read

*data data pointer for read

Return Codes:

Code Description

ApiSuccess The function returned successfully ApiFailed The function was passed an invalid device handle

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6.3.2.3. AT206X OSD FUNCTION

at206x_DV_osd_onoff

Syntax:

void

at206x_DV_osd_onoff(

uint16_t id,

uint32_t onoff

);

Description:

You can control OSD on/off with this function.

Parameters:


onoff '0' off, '1' on, default is '0'

Return Codes:

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at206x_DV_osd_control

Syntax:

void

at206x_DV_osd_control(

uint16_t id,

uint32_t mode,

uint32_t blink_period,

uint32_t transparency

);

Description:

The AT206x supports a full-screen, graphical On-Screen Display (OSD) function with 6 OSD layers

of background/preview/playback/OSD/border/cursor plane for the output video. An alpha blending

function is also supported and foreground color is defined in YCbCr space with 24-bits per pixel.

The AT206x supports two OSD modes. Mode 1 is consisted of 7-bit luminance, 6-bit chrominance,

2-bit transparency and 1-bit blink. User can control transparency grade and frequency of blink.

Transparency value of 0 is opacity and 3 is transparency. Blink frequency is set by register and the

values are set by field unit. For example, the value of 30 indicates OSD object whose blink bit is set

to 1 appear on screen during 30 fields (0.5 sec) and disappear on screen during 30 fields (0.5 sec)

repeatedly. Mode 2 is consisted of 8-bit luminance, 7-bit chrominance and 1-bit blink.

Transparency is set by register and applied to all OSD object at the same time. Blink attribute is

exactly same to blink of Mode 1.

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Parameters:


mode '0' mode1, '1' mode2, default is '1'

blink_period Number of field counter, default is '0'

transparency Transparency for mode2, '0' 0%, '1' 50%, '2' 75%, '3' 100%, default is '2'

Return Codes:

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at206x_DV_read_osd_frame_memory_address

Syntax:

void

at206x_DV_read_osd_frame_memory_address(

uint16_t id,

uint32_t *top_addr,

uint32_t *bot_addr

);

Description:

You can get frame memory address form AT206x by this function. You have to get the address

after system boot.

Parameters:


top_addr top field osd memory address of frame buffer

bot_addr bottom field osd memory address of frame buffer

Return Codes:

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at206x_osd_write

Syntax:

RETURN_CODE

at206x_osd_write(

uint16_t id,

uint32_t addr,

uint32_t data,

uint32_t clear,

uint32_t done

)

Description:

You can write at the OSD frame memory by this function. Description about each parameter as

following Parameters section.

Parameters:


addr offset form frame memory address

data osd data with YCbCr modified format

clear osd clear bit

done if done is ‘1’, the host write osd data to AT206x OSD frame memory.

Return Codes:

Code Description

ApiSuccess The function returned successfully ApiFailed The function was passed an invalid device handle

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7. Application

7.1. Installation

7.1.1. Build and Install the Drivers

Once the environment is configured correctly, building and installing the drivers is

trivial task. Run the following command to build and install applications.

For applications:

cd INSTALL_ROOT/app_rdk

make clean To delete object files and execution files

make To build/install applications

7.2. Composition



app_rdk

main.c, main_support.c,

pthread_dec.c, pthread_enc.c,

support_functions.c

C files

app_rdk/include

func_error.h, main.h,

pthread_dec.h, pthread_enc.h,

pmsp_control_server_todo.h,

pmsp_tcp_server_todo.h

typedef.h

Header files

app_rdk/network network.c Network Initialize files

Application

app_rdk/streaming pmsp_control_server_todo.c,

pmsp_tcp_server_todo.c

Network Streaming &Control

files

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App_rdk/osd osd_todo.c, osd_todo.h,

dlist.c, dlist.h,

osd_screen.c

OSD Control files

7.2.2. Description of the Application

Overview of the Application is consisted of Main task and total 4 threads.

main() main() functonfuncton--device opendevice open--InitializeInitialize--network startnetwork start


Stream data

Stream data empty


11 111 111 222 222 23 33333

1332334213


4

1

332334213




API LayerAPI Layer



Streaming ThreadStreaming Thread

OsdOsd functonfuncton--display stringdisplay string--display imagedisplay image

main() main() functonfuncton--device opendevice open--InitializeInitialize--network startnetwork start

Network ControlNetwork Control


Stream data

Stream data empty


11 111 111 222 222 23 33333

1332334213


4

1

332334213




API LayerAPI Layer



Streaming ThreadStreaming Thread

OsdOsd functonfuncton--display stringdisplay string--display imagedisplay image

Network ControlNetwork Control

Figure 7-1. Application Structure

Network control thread is executed at boot. And others(encoder, decoder and

streaming threads) are executed when we need. Each threads function summarized in

Table 7-1.

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Table 7-1. Thread Description

Num Name of Thread Description

1 Network Control Manage Remote Network Input Data

Manage Global, Encoding, Decoding and System Configuration

Manage Live and Monitoring Video Display

Control Stop and Start for ENC and DEC thread

Manage Files List for playback

2 Encoder Control AT206X Encoding (recoding) Sequence

3 Decoder Control AT206X Decoding (playback) Sequence

4 Streaming Send the stream encoded at AT206x to network PC client

From next section , the Major function of application depicted in detail.

7.2.3. Start-up Sequence

After power ON operation or system reset, the host should interface to the AT206x

as illustrated in the below flowchart.

Power up

F/W + 512bit(0) upload

Wait for Chip ready message

ROM-less ?

Y

N

A

Global parametersetting

Base reg. settingInit reg setting

A/VPU reset release

SCU reset release

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Figure 7-2. Start-Up sequence

7.2.3.1. ROM-less Boot Sequence at MAIN TASK

Booting after upload firmware to external SDRAM without external SPI serial ROM.

base address setting

HPU COD_POS, HPU_BAS

apu_base_address = 0x0, vpu_base_address = 0x100

hpu_base_address = 0x0

Initial register setting

HPU INIT_REG

rlb_flag_apu = rlb_flag_vpu = 1,

ssu_apu_rstn = ssu_vpu_rstn = ssu_hpu_rstn = 1

ssu_apu_ena = ssu_vpu_ena = ssu_hpu_ena = 1

sdram_scheduler_start = 1

dqs_delay_step = 0 ~ 15

APU/VPU firmware upload

firmware + stuffing (512bits or more)

SCU reset release

HPU INIT_REG

scu_enable = 1

APU/VPU reset release

HPU INIT_REG

apu_enable = 1

Afterwards, the firmware of the AT206x will run.

When the AT206x is ready to interface with the host, it sends ‘chip ready

message’ to the host. The AT206x does not generate interrupt signal for

‘chip ready message’ not like other Tx message. So the host should check

whether ‘Tx FIFO not empty flag’ of STAT_REG of the AT206x is ‘1’, and then

can read ‘chip ready message’.

Table 7-2. Global chip ready messages

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GID = 0x1, CID = 0, MF = 1



2

Chip ready message After reset, the AT206X send this message if ready to interface with the host processor.

This message does not generate interrupt (nIRQ/INT) signal. So, the host should poll the Tx FIFO empty flag of the status register.

0 Reserved

0x01

1 Reserved

7.2.4. H.264 Encoding Sequence at ENC_THREAD

For encoding operation, the host will be interfaced to the AT206x as illustrated in

the below flowchart.

A

Encoder parameter setting

Encoder start

Wait for data ready message

Ack fordata ready message

Stop ?

Encoder stop

Read stream data from MuxFIFO

Y

N

Figure 7-3. Encoding Sequence

If needed, changes encoding parameters.

To start encoding, ‘encoder start’ command should be sent to the AT206x.

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Table 7-3. Encoder start

GID = 0x2, CID = 0

Num. of RxData Name PID RW C

# Pos. Def. Field Description Note

1 Encoder start

0 0

Video encoder start. When write,

1: start, 0: no operation When read,

it means current video encoder state. 1: run, 0: stop

0x02 RW X 0

1 0

Audio encoder start. When write,


it means current audio encoder state. 1: run, 0: stop

The host waits for ‘data ready’ message from the AT206x.

Table 7-4. Encoder data ready message

GID = 0x2, CID = 0, MF = 1



3 Data ready message

3:0

Data type 1: System 2: Video 3: Audio 4~15: Reserved

7:4 Channel ID

8 Motion-less

9 Loss

10 Motion-less mode – 0 : normal, 1 : I frame only when motion less

11 Last flag In case that the output data split into several parts, ‘1’ for the last part and ‘0’ for the other parts

0

13:12 Picture type 1: I picture, 2: P picture, 3: B picture

1 15:0 Output data size (256-bit unit)

0x01

2 30:0 Reserved

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The host reads encoding data of the size (‘output data size’*256 bits) from

Mux FIFO. The data size is included in ‘data ready’ message. For video data,

the data size is corresponding to one of a video frame.

To continue encoding, the host should send out ‘acknowledge for data ready’

parameter to the AT206x. Otherwise, the AT206x generates no more ‘data

ready’ messages.

Table 7-5. Acknowledge for data ready message

GID = 0x2, CID = 0



2 Acknowledge for data ready message

0 0 .

Null flag 0: normal ack 1: null ack. re-issue data ready message for current data after about 10msec

0x01 W O

1 31:0 . Reserved

To stop encoding, the host should send out ‘encoder stop’ parameter to the

AT206x.

Table 7-6. Encoder stop

GID = 0x2, CID = 0



1 Encoder stop

0 . Video encoder stop

1: stop, 0: no operation 0x03 W O

0 1 .

Audio encoder stop 1: stop, 0: no operation

7.2.5. H.264 Decoding Sequence at DEC_THREAD

For decoding operation, host will be interfaced to the AT206x as illustrated in the

below flowchart.

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Decoder parameter setting

Decoder start

Wait for data request message

Ack fordata request message

Stop ?

Decoder stop

Y

N

A

Write stream data + 512 or more bits(0)

to DemuxFIFO

Figure 7-4. Decoding Sequence

If needed, changes decoder parameters.

To start decoding, ‘decoder start’ command is sent to the AT206x.

Table 7-7. Decoder start

GID = 0x3, CID = 0



1 Decoder Start

0 0

Video decoder start. When write,


it means current video decoder state. 1: run, 0: stop

0x02 RW X 0

1 0

Audio decoder start. When write,


it means current audio decoder state.

1: run, 0: stop

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The host waits for ‘data request’ message from the AT206x.

Table 7-8. Decoder data request message

GID = 0x3, CID = 0, MF = 1



2 Data request message

0 Reserved 0x01

1 Reserved

After the host receives message, the host writes decoding data to Demux FIFO

of the AT206x.

Write zero stuffing data more than 512 bit to demux FIFO of the AT206x.

To continue decoding operation, the host must send out ‘acknowledge for data

request’ parameter to the AT206x. Otherwise, the AT206x generates no more

‘data request messages’.

Table 7-9. Acknowledge for data request message

GID = 0x3, CID = 0



2 Acknowledge for data request message

0 1:0

Ack mode 0: continue. This is not the end of the current frame. The remaining data will be continued. 1: last. This is the end of the current frame. 2: null. Re-issue data request message after about 10msec.

0x01 W O

1 30:0 Reserved

To stop decoding, the host must send out ‘decoder stop’ parameter to the

AT206x.

Table 7-10. Decoder stop

GID = 0x3, CID = 0

PID RW C Num. of RxData Name Note

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# Pos. Def. Field Description

1 Decoder Stop

0 . Video decoder stop

1: stop, 0: no operation 0x03 W O

0 1 .

Audio decoder stop

1: stop, 0: no operation

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7.3. Procedure for testing function

7.3.1. OSD

7.3.1.1. Chinese font display

You can see the Chinese character demo in our RDK through using OSD

ON/OFF button.

The following sequence is to display with Chinese font. (Refer to figure 3)

1. modify the source code for tool source(fontextract.c) file for making the font

you want to insert(You must use Uni-code that you want to use Chinese

character). (refer to source line 287 ~ 298)

2. compile the tools(fontextrack)

make clean;make

3. execute as follow for making Chinese font binary file

./fontextract -s 50 -f batang.ttc -t font.txt font_hanyu.bin

Usage: fontextract -s [size] -f "text or file" -t [truetype font] [dest]

Options:

-s font pixel size.

-t text(filename or string).

-f truetype font.

4. And then you can get the font binary file. (font_hanyu.bin)

5. copy the font file to root file system.

cp font_hanyu.bin ~/initrd.3.4.0/root/sdvr

6. make new ramdisk image

./make_ramdisk

7. modify source code for loading Chinese Font data

Source code : ~/app_rdk/osd/osd_todo.c

Function name : load_bmpfont in osd_initialize function

load_bmpfont("/root/font_hanyu.bin", FONT_HANYU);

8. display the Font data to monitor

Source code : ~/app_rdk/streaming/pmsp_control_server_todo.c

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Function name : osd_display_long_string in set_global_param function

str_long[0] = 0x6578; // 數

str_long[1] = 0x5b57; // 字

str_long[2] = 0;

osd_display_long_string(str_long,2,100,100,FONT_HANYU,OSD_

COLOR_WHITE,0,0);

str_long[0] = 0x4e00; // 1

str_long[1] = 0x4e8c; // 2

str_long[2] = 0x4e09; // 3

str_long[3] = 0x56db; // 4

str_long[4] = 0x4e94; // 5

str_long[5] = 0x516d; // 6

str_long[6] = 0x4e03; // 7

str_long[7] = 0x516b; // 8

str_long[8] = 0x4e5d; // 9

str_long[9] = 0;

osd_display_long_string(str_long, 9, 120, 60, FONT_HANYU,

OSD_COLOR_WHITE, 0, 0);

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