Group 05 11 Progress 01
-
Upload
gatrongcon -
Category
Documents
-
view
216 -
download
0
Transcript of Group 05 11 Progress 01
-
8/8/2019 Group 05 11 Progress 01
1/13
LOGO
Pong Gameon FPGA KIT DE2
FPGA Project
Group_05_11
Instructor: Dr. Pham Ngoc Nam
-
8/8/2019 Group 05 11 Progress 01
2/13
Me mb e rs
B ch Th o Ly1
Ngu y n Duy Lon g2
3 P h m Ng c S n
4 H on g Qu c H uy
10/12/2010 4:27 AM 2/12FPGA Project
-
8/8/2019 Group 05 11 Progress 01
3/13
Cont e nts
System Design Details
Description of the work assigned
Following Plan
10/12/2010 4:27 AM 3/12FPGA Project
-
8/8/2019 Group 05 11 Progress 01
4/13
D e scription of th e work assign ed
In the project proposal has been presented before, the group hasset out the non-functional requirements and functions needed for Pong game. Also build a general block diagram for the system,including :
- External control bolck : Keyboard PS /2
- Display block : VGA M onitor
- Audio processing block : IC WM8731
- Main game block.
This report focus describes the system design details. Summarythe structure and relationships between the blocks above.
10/12/2010 4:27 AM 4/12FPGA Project
-
8/8/2019 Group 05 11 Progress 01
5/13
10/12/2010 4:27 AM FP GA Project 5 /12
Sy st e m D e sign D e tails
Flowchart of G ame Play
-
8/8/2019 Group 05 11 Progress 01
6/13
10/12/2010 4:27 AM 6/12FPGA Project
System Design Block Diagram
Sy st e m D e sign D e tails
-
8/8/2019 Group 05 11 Progress 01
7/13
10/12/2010 4:27 AM 7/12FPGA Project
kb_main: This is no RTL in this block. It simply ties together the keyboard_scanand keyboard_convert blocks.
keyboard_scan: This block interfaces directly with the data and clock pins on the PS /2 keyboard. It can detect any key on the keyboard pressed or depressed
and sends scan_code bits to keyboard_convert .
keyboard_convert: This block controls the keyboard_scan block, reads the keyboard codes (scan_code) and converts keyboard codes to ASCII codes (hex, ascii) which can appear in the seven-segment LED display, VGA display or controls any function (i.e. up, down, left, right) .
Sy st e m D e sign D e tails
-
8/8/2019 Group 05 11 Progress 01
8/13
V GA _Controller: This block interfaces directly with the hsync, vsync, red, green, blue video output signal on the DE 1 board. This block should allow for displaying the following on the VGA monitor :
-Shape, size and colour of the playground, paddle and ball
-The movement of the paddle_ 1, paddle_ 2 and ball based on the parameters from the paddle_ 1, paddle_ 2 and ball block.
-Position of the barrages which appear when level up. It based on the parameters from the Pong_main block.
-Scores for each player, which will be from 0 to 15 only.
Sy st e m D e sign D e tails
10/12/2010 4:27 AM 8/12FPGA Project
-
8/8/2019 Group 05 11 Progress 01
9/13
10/12/2010 4:27 AM 9/12FPGA Project
SD_interface: This block interfaces directly with SD Card.
Au dio_controller: This block interfaces directly with WM8731 .
Paddle_ 1, paddle_ 2 : Simple counter which increases /decreases the paddle value if the up /down is asserted. In other words, the paddle moves only in one direction and based on user input from the keyboard.
Sy st e m D e sign D e tails
-
8/8/2019 Group 05 11 Progress 01
10/13
10/12/2010 4:27 AM 10/12FPGA Project
Pong_main: This is the main backbone to the game and is thus a little more complex. With the given specifications, this block should make following :
-Synchronization behavior of kb_main, paddle_ 1, paddle_ 2, ball,
VGA _controller, Audio_controller and SD_interface block. (i.e. at a time, those action has occurred; controlling the postion of paddle by using parameters from kb_main)
-Providing the parameter for movement of the ball.
-Receiving audio data from SD card and sending it to IC WM8731 .
-Counting the scores and show the winner. The score should be provided for the display on the VGA monitor.
Sy st e m D e sign D e tails
-
8/8/2019 Group 05 11 Progress 01
11/13
N ex t w ee k Plan
28/09 05/10 12/10 26/ 10
10/12/2010 4:27 AM 11/12FPGA Project
-
8/8/2019 Group 05 11 Progress 01
12/13
V isual ai d
Pa dd le 1
Pa dd le 2
Numb e r of ball ineve ry se t
Scor e 1 Scor e 2
10/12/2010 4:27 AM 12/12FPGA Project
-
8/8/2019 Group 05 11 Progress 01
13/13
LOGO
Group_05_11