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Fundamental of Computer

Suthida Chaichomchuen : SCCstd@kmitnb.ac.th

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Computer Components

Hardware (architecture) Software (instruction set)

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Basic Hardware

Bits Bytes Registers Memory Processor Data Bus

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Hardware Components

Internal hardware– Microprocessor– Memory– Registers

External hardware– Input/Output Devices

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Software Organization

Programs Data files Operating System

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Computer storage

Bit– On : 1– Off : 0

Byte– data : 8 bits– parity : 1 bit (automatically setting)

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Related bytes

Word Doubleword Quadword Paragraph Kilobyte Megabyte

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Binary numbers

Bit value : 1 1 1 1 1 1 1 1Position value : 128 64 32 16 8 4 2 1Bit number : 7 6 5 4 3 2 1 0

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Binary arithmetic

Decimal Binary 65 01000001 +42 +00101010 107 01101011

Decimal Binary 60 00111100 +53 +00110101 113 01110001

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Negative Binary Numbers

Number +65 : 01000001Reverse the bits : 10111110Add 1 : 1Number -65 : 10111111

Reverse the bit value and add 1

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Hexadecimal Representation

Binary : 1011 1001 1100 1110Decimal : 11 9 12 14Hexadecimal : B 9 C E

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System Unit

A system board– Microprocessor– ROM– RAM

Power supply Expansion slots

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Processors (Intel family)

8088/80188 8086/80186 80286 80386 80486 Pentium (or 80586) PentiumPro (or 6x86)

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Processors : 8088/80188

16-bit registers 8-bit data bus address up to 1 million bytes of memory registers process 2 bytes/time data bus transfer 1 byte/time operate in real mode

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Processors : 8086/80186

16-bit registers 16-bit data bus & run faster address up to 1 million bytes of memory registers process 2 bytes/time data bus transfer 2 bytes/time operate in real mode

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Processors : 80286

16-bit registers 16-bit data bus & run faster address up to 16 million bytes of memory operate in real mode or protected mode

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Processors : 80386

32-bit registers 32-bit data bus address up to 4 billion bytes of memory operate in real mode or protected mode

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Processors : 80486

32-bit registers 32-bit data bus address up to 4 billion bytes of memory operate in real mode or protected mode processor is designed for enhanced

performance

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Processors : Pentium (or 80586)

32-bit registers 64-bit data bus execute more than one instruction/clock

cycle

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Processors : PentiumPro (or 80686)

advances the capacity of registers and the data bus– connected to a build-in storage cache by

a 64-bit wide bus

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Logical Units in Processor

Bus Interface Unit <BIU> – Manage the bus control unit, segment

registers and instruction queue.– Provide access to instructions.

Execution Unit <EU>– Execute instructions and get data that

the BIU delivered.

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Internal Memory

ROM (Read Only Memory) RAM (Random Access Memory)

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Map of Base Memory

64K base system ROM

192K memory expansionarea (ROM)

640K memory (RAM) conventional memory

upper memory

128K video display area (RAM)

Start Address

Dec Hex960K F0000

768K C0000

640K A0000

zero 00000

Purpose

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Addressing data in memory

System stores the data in memory in reverse-byte sequence :– low-order byte : low memory address– high-order byte : high memory address

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memory

Address 7613most significant byte

register 05 29

29 05

Address 7612least significant byte

Addressing data in memory

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Segments

A segment is a special area defined in a program that begins on a paragraph boundary, that is, at a location evenly divisible by 16, or hex 10.

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Main Segments

Code Segment <CS>– contains the machine instructions that

are to execute Data Segment <DS>

– contains a program’s defined data, constants, and work areas.

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Main Segments . . .

Stack Segment <SS>– contains any data and addresses that

you need to save temporarily or for use by your own “called” subroutines.

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Segment Boundaries

Stack Segment

Data SegmentCode Segment

Memory

Relocatable in memory

Address

Address

Address

SS

DS

CSSegmentRegisters

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Segment Offsets

Offset is the distance in bytes from the segment address to another location within the segment.

A 2-byte offset can range from 0000H - FFFFH (0-65,535).

Memory location = segment address + offset value

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Offset 32H

X

Segment address 038E0H

X. . .

DS segment address : 038E0HOffset : +0032HActual address : 03912H

Segment Offsets

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Addressing Capacity

8086/8088 Addressing– 16 bits for addressing

80286 Addressing– 24 bits for addressing

80386/486/Pentium Addressing– In protected mode use 48 bits for

addressing

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Registers

The processor’s registers are used to control instructions being executed, to handle addressing of memory, and to provide arithmetic capability.

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Registers

Segment Registers Pointer Registers General-Purpose Registers Index Registers Flags Register

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Segment Registers

CS register– Contains the starting address of a

program’s code segment. DS register

– Contains the starting address of a program’s data segment.

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Segment Registers . . .

SS register– The system stores the starting address

of a program’s stack segment in the SS register.

ES register– Used by some string operations to

handle memory addressing.

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Segment Registers . . .

FS and GS register– Additional extra segment registers on

the 80386 and later processors.

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Pointer Registers

Instruction Pointer (IP) register– Contains the offset address of the next

instruction that is to execute.– IP indicates the current instruction within

the currently executing code segment.

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Pointer Registers . . .

Stack Pointer (SP) register– Refers to the current word being

processed in the stack. Base Pointer (BP) register

– Facilitates referencing parameters.

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General-Purpose Registers

AX register : Accumulator– Used for operations involving input/outp

ut and most arithmetic.

EAX:

AX: AH AL

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General-Purpose Registers

BX register : Base register– Used as an index to extend addressing.

EBX:

BX: BH BL

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General-Purpose Registers . . .

CX register : Count register– Contains a value to control the number

of times a loop is repeated.– Contains a value to shift bits left or right.

ECX:

CX: CH CL

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General-Purpose Registers . . .

EDX:

DX: DH DL

DX register : Data register– Used for input/output operations– Used for multiply and divide operations

that involve large values.

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Index Registers

SI register– source index register is required for some

string operations– SI is associates with DS register

DI register– destination index register is required for

some string operations– DI is associates with ES register

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Flags Register

Flag: O D I T S Z A P C

Bit no.: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

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Flags Register

OF (overflow)– Indicates overflow of a high-order bit

following arithmetic. DF (direction)

– Determines left or right direction for moving or comparing string data.

IF (interrupt)– Indicates that all external interrupts are to

be processed or ignored.

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Flags Register . . .

TF (trap)– Permits operation of the processor in

single-step mode. SF (sign)

– Contains the resulting sign of an arithmetic operation.

– 0 : positive / 1 : negative

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Flags Register . . .

ZF (zero)– Indicates the result of an arithmetic or

comparison operation.– 0 : nonzero / 1 : zero

AF (auxiliary carry)– Contains a carry out of bit 3 on 8-bit

data, for specialized arithmetic.

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Flags Register . . .

PF (parity)– Indicates even or odd parity of a low-

order 8-bit data operation. CF (carry)

– Contains carries from a high-order bit following an arithmetic operation.

– Contains the contents of the last bit of a shift or rotate operation.