Fully Digital Arrays of Silicon Photomultipliers (dSiPM) – a Scalable Technology for Fast Photon...

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Fully Digital Arrays of Silicon Photomultipliers (dSiPM) – a Scalable Technology for Fast Photon Detection © Philips Digital Photon Counting, 2012 DESY, 27.03.2012

Transcript of Fully Digital Arrays of Silicon Photomultipliers (dSiPM) – a Scalable Technology for Fast Photon...

Page 1: Fully Digital Arrays of Silicon Photomultipliers (dSiPM) – a Scalable Technology for Fast Photon Detection © Philips Digital Photon Counting, 2012 DESY,

Fully Digital Arrays ofSilicon Photomultipliers (dSiPM) –

a Scalable Technology for Fast Photon Detection

© Philips Digital Photon Counting, 2012

DESY, 27.03.2012

Page 2: Fully Digital Arrays of Silicon Photomultipliers (dSiPM) – a Scalable Technology for Fast Photon Detection © Philips Digital Photon Counting, 2012 DESY,

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Who is Philips Digital Photon Counting (PDPC) ?

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Philips Corporate Technologies

PDPC

Research IncubatorsIP&S

Healthcare Lifestyle Technology

Ventures

21 employees(March 27th, 2012)Located inAachen, Germany

Dr. Thomas Frach

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Why did Philips Start Developing dSiPMs ?

Need for faster PET-detectors

Starting point: APD, analog SiPM (aSiPM)

APD has no timing, aSiPM failed due tolack of integration and scalability

Fully digital SiPM (dSiPM) invented within Philips Research HC program

dSiPM Diodes & CMOS- higher degree of integration- more complex production process

VOLUME is needed to sustain techno-logy and reach competitive price points

Scalable dSiPM technology can be used for many other applications

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Acq

uisi

tion

time

3min

1m

in

CRT >1ns 500 ps 250 ps 100 ps

~ 250 ps

~ 600 ps

> 1 ns

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Motivation 1: faster light detector for e.g. fast scintillators

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Graphs courtesy of Spanoudaki & Levin, Stanford, in: Sensors, 10, 2010

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Motivation 2: Faster & Smaller Light Detectors

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Graphics courtesy of Spanoudaki & Levin, Stanford,in: Phys. Med. Biol. (56) 2011

TOF: Time-of-Flight

DOI: Depth of Interaction

High sensitivity long crystalsHigh spatial resolution small cross section

High aspect ratio needs DOI

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PET with TOF & DOI: Improved Image Quality

Nakazawa et.al.,in: Nuclear ScienceSymposiumConference Record (NSS/MIC), 2010 IEEE

PET-detectordesignuses 4-layeredscintillator

t1

t2

t3

t4

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Light Detectors Before dSiPM: the Analog World

Type PMT APD anal. SiPM dSiPM

MR compliance No Yes Yes Yes

ToF capability limited No Yes Yes

Operational stability good good To be det. To be det.

Amplification High (106) Low (102-3) High (106) meaningless

Compactness bulky compact compact compact

Power/Readout HV, ASIC,analog

HV, ASIC, analog

LV, ASIC,analog

LV, simple,digital

Scalability yes difficult ???? yes

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From APD to Single Photon GM-APDs (SPADs)

Single APD

Geiger-mode APD Arrays (SPAD’s):“Silicon Photomultiplier”

B. Dolgoshein, V. Saveliev, V. Golovine, first idea: Russia, early 80‘s

• fully analog• poor timing• high bias voltage (up to 1500 V)• moderate gain (~100)

• single photon resolution• binary, but still analog• better timing• lower bias voltage (25-65 V)• higher gain (106)

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The dSiPM Takes Advantage of the Binary Nature

“Therefore, while the APD is a linear amplifier for the input optical signal with limited gain, the SPAD is a trigger device so the gain concept is meaningless.” (source: Wikipedia)

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Ph

oto

ns

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Now Photons are Counted Directly

Output: > no. of photons> time stamp(s)

No analog post-processing necessary!

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SPAD & CMOS Integration Enable Higher Performance

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The dSiPM is an Integrated, Scalable Solution

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• discrete, limited integration

• analog signals to be digitized

• dedicated ASIC needed

• not scalable

Analog SiPM

• fully integrated

• fully digital signals

• no ASIC needed

• fully scalable

Digital SiPM

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Sub-Summary: Advantages of Digitized SiPMs

• significantly reduced temperature sensitivity

• active quenching reduces afterpulsing &crosstalk

• individually addressable cells enable DC control

• better linearity (&correction)• better intrinsic timing

resolution due to integrated TDCs

• no analog electronics, no ADCs, no ASICs

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dSiPM: From Die Architecture….

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…to Highly Integrated “Intelligent” Sensors

200 MHz ref. clockFPGA

Flash Memory

Detector array8 x 8 dSiPMs

Power & Bias

Serial configurationinterface

Serial Dataoutput (x2)

Temp. sensor

FPGA• Clock distribution• Data collection/concentration• TDC linearization• Saturation correction• Skew correction

Flash• FPGA firmware• Configuration• Inhibit memory maps

32.6 mm

DPC3200-22-44DPC6400-22-44

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dSiPM Arrays: Production Process

• Sensor design (PDPC)

• Silicon processing (180 nm fab, 38 masks, > 500 steps)

• Die testing (PDPC)

• Tile manufacturing (packaging experts)

• Tile testing (PDPC)

• Scintillator attachment (packaging experts)

• Module assembly (packaging experts)

• Final module testing (PDPC), overall system design

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dSiPM: Timing Resolution with Single Short LSO:Ca Crystals

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Timing Resolution of Arrays of Long LYSO Crystals

• LYSO array, 8 x 8 crystals, 4 mm x 4 mm pitch, 22 mm length• DPC3200-22-44• Measurement taken at +10°C

Position x [mm])

Pos

ition

y [

mm

])

Timing Resoution [ps]

0 5 10 15 20 25 30

0

5

10

15

20

25

30 255

260

265

270

275

280

285

290

295

300

305

Timing resolution per pixel Summed histogram over all pixels

-600 -400 -200 0 200 400 6000

10000

20000

30000

40000

50000

60000

70000

Data: ttt_BModel: GaussFWHMWeighting: y No weighting Chi^2/DoF = 10170.08092R^2 = 0.9994 y0 21.21383 ±2.1043w 142.55919 ±0.10222xc -0.20855 ±0.08662A 60860.93608 ±37.68774

Coun

ts

Timestamp difference (ps)

286 ps FWHM

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dSiPM: First Use for Cerenkov Detection

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Light Sensors: going digital?

Type PMT APD anal. SiPM dSiPM

MR compliance No Yes Yes Yes

ToF capability limited No Yes Yes

Operational stability good good To be det. To be det.

Amplification High (106) Low (102-3) High (106) meaningless

Compactness bulky compact compact compact

Power/Readout HV, ASIC,analog

HV, ASIC, analog

LV, ASIC,analog

LV, simple,digital

Scalability yes difficult ???? yes

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PDPC: the Number of Pixels Doubles Every 3 Months

2.4 mm

2.0 mm 4x4x22 mm³crystals !!

Many first time right’s

PDPC-Moore‘s law

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PDPC Technology: Staged Approach for HEP

• take fundamental performance parameters• get familiar with concept and technology

1.) Try current sensors with TEK (next slide)

2.) POC with modified sensors

3.) If 2.) is not sufficient: design your own dedicated sensor

• improved PDE - potentially 60-70%

• reduced dead-time - potentially ~ 20-40 ns

Timing

NOW

PrototypesEnd 2012

Prototypes2013

Product2014

• Philips/NXP provide access to basic technology/IP• Consortium sends staff to Philips to design

dedicated sensor• Philips fabricates customized sensor & electronics

on industrial scale to price target

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PDPC Technology Evaluation Kit (TEK)

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Thank you very much for your attention!

www.philips.com/digitalphotoncounting

[email protected]