FRUGAL IP LOOKUP BASED ON A PARALLEL SEARCH

Author: Zoran Cica and Aleksandra Smiljanic

Publisher/Conf.: IEEE Workshop on High Performance Switching and Routing, HPSR 2009

Speaker: Han-Jhen Guo

Date: 2009.09.16

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OUTLINE

Parallelized Frugal Lookup (PFL) Algorithm Idea Introduction Overall Architecture Level Module

Performance

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- IDEA INTRODUCTION

Based on the multibit trie stride = 8 → IPv4 = 4 levels; IPv6 = 16 levels the operation of a subtree in each level is

performed in parallel Subtree Prefix Subtree Prefix

the sequence of bits that leads to that subtree

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- IDEA INTRODUCTION

eg. search (IP = 110 100 000 010, stride = 3) find the involved subtrees each level find the matched prefix(es) get the nexthop information of

the longest matched prefix

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110* (A)

110 100 00* (B)

110 100

110 100 000

110

0* (C)

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- IDEA INTRODUCTION

eg. add (IP = 110 100 000 000, len. = 8, stride = 3) find the involved subtrees each level update the subtree by prefix length of

inserted prefix update the nexthop information

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110 100 00* (B)

110 100

110 100 000

110

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - OVERALL ARCHITECTURE

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perform the search and update at the corresponding levels

holds the nexthop information

selects the best solution found by the level modules

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - OVERALL ARCHITECTURE

eg. search (IP = 110 100 000 010, stride = 3)

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1, 0, 1, 0 for i= 1…4

B

110* (A)

110 100 00* (B)

110 100

110 100 000

110

0* (F)

100

B

Read

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - OVERALL ARCHITECTURE

eg. add (IP = 110 100 000 000, len. = 8, stride = 3)

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0, 0, 1, 0 for i= 1…4

B

110 100 00* (B)

110 100

110 100 000

110

Write

0

0

1

B

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- LEVEL MODULE

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- LEVEL MODULE

eg. search (IP = 110 100 000 010, stride = 3) (level module)3

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110* (A)

110100110001 110110

comparator

010

2

10100000000000

1 addr(B)

1

00000000000000

00000000001000

00010000000000

110001 100* (C)

110110 01* (D)

110100 0* (E)

110100 00* (B)

0

0

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- LEVEL MODULE

eg. add (IP = 110 100 000 000, len. = 8, stride = 3) (level module)3

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110100110001 110110

comparator

010

2

10000000000000

1 addr(B)

0

00000000000000

00000000001000

00010000000000

110* (A)

110001 100* (C)

110110 01* (D)

110100 0* (E)

110100 00* (B)

10100000000000

10

8 10100000000000

PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- LEVEL MODULE

For saving memory (resources are not used for an empty subtree) associating one counter to each register

for counting the number of prefixes in each subtree with subtree prefix to the register

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM- LEVEL MODULE

eg. add (IP = 110 100 000 000, len. = 8, stride = 3) (level module)3

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110001 110110

comparator

010

2

1 addr(B)

0

00000000000000

00000000001000

00010000000000

110* (A)

110001 100* (C)

110110 01* (D)

110100 00* (B)

00100000000000

10

8

1 10110100

00000000000000

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - PERFORMANCE

Software Quartus II 8.1

Chip Altera Cyclone II and III families, for IPv4 and

IPv6 addresses, respectively Table

32.5K ~ 134K entries

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - PERFORMANCE

PFL for IPv4

Modified PFL for IPv4 only the leaf nodes of the subtrees are

memorized

about 50% memory off lead to slower update speed (may update more than

one leaf nodes with a update operation)

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PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - PERFORMANCE

PFL for IPv6

real-life table (1.6K entries): 60M lookups/sec expand table: 45.37M lookups/sec

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