1

Frequency Stability of Crystal Oscillatorwith GPS PPS Signal

Dinesh Kumar 26361Mo Hyunho 26366

Title

2

Objectives

To learn RTL design using VHDL Finding out one of the parameters of the crystal oscillator.

i,e frequency stability using GPS pps signal. pps signal as a reference signal, and compare the

crystal oscillator output signal. (frequency variation of the crystal oscillator.)

Frequency stability will vary with respect to temperature.(Below is the example table shown for reference )

3

Concepts Learned during the Project

VHDL Coding (VHSIC (Very High Speed Integrated Circuit) Hardware Description Language)Designing of state machines.Designing of Counters.Advantages of state machines.FPGA Design Flow.Writing of Test Bench.Model Sim Simulation.Xilinx ISE

4

Oscillator

An oscillator is a circuit that produces a repetitive signal from a dc voltage. Oscillators are circuits that produce a continuous signal of some

type without the need of an input. These signals serve a variety of purposes. Communications systems, digital systems (including computers)

,and test equipment make use of oscillators

Sine wave

Square wave

Sawtooth wave

5

Crystal Oscillator

Digital applications require the use of oscillators with extremely stable output. Overcome the output fluctuation experienced by conventional

oscillators. Crystals used in electronic applications consist of a quartz wafer

held between two metal plates and housed in a package

6

Crystal Oscillator

The quartz crystal is made of silicon oxide (SiO2) and exhibits a property called the piezoelectric

When a changing an alternating voltage is applied across the crystal, it vibrates at the frequency of the applied voltage. In the other word, the frequency of the applied ac voltage is equal to the natural resonant frequency of the crystal.

The thinner the crystal, higher its frequency of vibration. This phenomenon is called piezoelectric effect.

Piezoelectric Effect

7

Crystal Oscillator

The quartz crystal is made of silicon oxide (SiO2) and exhibits a property called the piezoelectricThe thinner the crystal, higher its frequency of vibration. This phenomenon is called piezoelectric effect.

Piezoelectric Effect

Applications

Radio and television stations require oscillators to develop the basic signal to transmit their information.Cell phones, electronic circuits and remote controls use oscillators to produce the required frequencies for operation.Variable oscillators, known as signal generators, are used to generate frequencies and waveforms needed for troubleshooting and the testing of electronic equipment.

8

Crystal Oscillator

Amplitude

Frequency

Waveform type

Stability

On some oscillators, the capability to change frequency

Output Characteristics

9

Crystal Oscillator

Sometimes referred to as a stable oscillator Source of a signal with consistent amplitude Source of a signal with consistent frequency

Oscillator Stability

10

Various parameters of crystal oscillator

GPS PPS

Sharp rising, abruptly falling that accurately repeats once per second.

Accuracy ranging from a 12 picoseconds to a few nano seconds.

Used for precise timekeeping and time measurement (in our project we are using it to know the start of a second.)

It doesn’t have 50% Duty cycle.

12

FPGA Design Flow

•Synthesize, checks code syntax and analyze the hierarchy of your design which ensures that your design is optimized for the design architecture you have selected. The resulting netlist is saved to an NGC file or an EDIF file

•Implement/Translate, which merges the incoming netlists and constraints into a binary database

•Implement/Map, which maps the design into the available resources on the target device, like LUT, Flip Flops, BRAM,...

•Implement/Place and Route, which places and routes the mapped database and checks the timing constraints

•Generate Programming File, which creates a bitstream file that can be downloaded to the device

13

Block Diagram

14

TOP MODULE ARCHITECTURE

15

ENTIRE DESIGN ARCHITECTURE

16

SUB MODULE ARCHITECTURE

17

Typical counter operation in FPGA

18

sec pulse generator

19

Synchronization

Edge detection

20

Phase detector (sec lead case)

21

Phase detector (pps lead case)

22

FSM for phase detector

23

Phase difference count block

24

Simulation result (phase difference count)

25

Simulation result (synchronization)

26

Application of our project

This IP is used to measure the frequency error of a Crystal Oscillator (DUT) with respective time.

This IP can be used in application where precision clock is required at a minimum cost.

Demonstration

lead_lag : “01” sec pulse lag to pps pulse

Final error = -18 in decimal = -1.8μs [(18 * 100ns (10 Mhz I/P Clock)]

28

Analysis

Critical Path Delay of the implemented design is 5.2 ns so Maximum frequency of the design is 192.3 MHz

f =1/T

Maximal operation frequency

Timing Summary:---------------Speed Grade: -5

Minimum period: 5.200ns (Maximum Frequency: 192.313MHz)Minimum input arrival time before clock: No path foundMaximum output required time after clock: 4.134nsMaximum combinational path delay: No path found

29

Danke schön