Freescale Semiconductor Document Number: MD7IC21100N ... · Input Signal PAR = 7.5 dB @ 0.01%...

MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1

1RF Device DataFreescale Semiconductor, Inc.

RF LDMOS Wideband IntegratedPower AmplifiersThe MD7IC21100N wideband integrated circuit is designed with on--chip

matching that makes it usable from 2110 to 2170 MHz. This multi--stagestructure is rated for 24 to 32 Volt operation and covers all typical cellular basestation modulation formats including TD--SCDMA.

• Typical Single--Carrier W--CDMA Performance: VDD = 28 Volts, IDQ1A +IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA, Pout = 32 Watts Avg.,f = 2167.5 MHz, IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz,Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF.Power Gain 28.5 dBPower Added Efficiency 30%Device Output Signal PAR 6.1 dB @ 0.01% Probability on CCDFACPR @ 5 MHz Offset --38 dBc in 3.84 MHz Channel Bandwidth

• Capable of Handling 5:1 VSWR, @ 32 Vdc, 2140 MHz, Pout = 110 Watts CW(3 dB Input Overdrive from Rated Pout)

• Stable into a 5:1 VSWR. All Spurs Below --60 dBc @ 1 mW to 100 Watts CWPout.

• Typical Pout @ 1 dB Compression Point ≃ 110 Watts CWFeatures• 100% PAR Tested for Guaranteed Output Power Capability• Characterized with Series Equivalent Large--Signal Impedance Parameters

and Common Source S-Parameters• On--Chip Matching (50 Ohm Input, on a per side basis, DC Blocked)• Internally Matched for Ease of Use• Integrated Quiescent Current Temperature Compensation with

Enable/Disable Function (1)

• Integrated ESD Protection• 225°C Capable Plastic Package• In Tape and Reel. R1 Suffix = 500 Units, 44 mm Tape Width, 13 inch Reel.

Figure 1. Functional Block Diagram Figure 2. Pin Connections

Quiescent CurrentTemperature Compensation (1)

VDS1A

RFinA

VGS1A

RFout1/VDS2A

VGS2A

Note: Exposed backside of the package isthe source terminal for the transistors.

Quiescent CurrentTemperature Compensation (1)

VDS1B

RFinB

VGS1B

RFout2/VDS2B

VGS2B

VDS1A

NC

NC

NC

RFout1/VDS2A

1234

78

14

VGS1B91011

VGS2AVGS1A

RFinA

RFinB

VGS2B

NC

VDS1B

RFout2/VDS2B13

6

12

(Top View)

5

1. Refer to AN1977,Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987,Quiescent Current Controlfor theRF IntegratedCircuit DeviceFamily.Go to http://www.freescale.com/rf. SelectDocumentation/ApplicationNotes -- AN1977orAN1987.

Document Number: MD7IC21100NRev. 2, 2/2012

Freescale SemiconductorTechnical Data

2110--2170 MHz, 32 W AVG., 28 VSINGLE W--CDMA

RF LDMOS WIDEBANDINTEGRATED POWER AMPLIFIERS

MD7IC21100NR1MD7IC21100GNR1MD7IC21100NBR1

CASE 1618--02TO--270 WB--14

PLASTICMD7IC21100NR1

CASE 1621--02TO--270 WB--14 GULL

PLASTICMD7IC21100GNR1

CASE 1617--02TO--272 WB--14

PLASTICMD7IC21100NBR1

© Freescale Semiconductor, Inc., 2008, 2011--2012. All rights reserved.

2RF Device Data

Freescale Semiconductor, Inc.


Table 1. Maximum Ratings

Rating Symbol Value Unit

Drain--Source Voltage VDSS --0.5, +65 Vdc

Gate--Source Voltage VGS --0.5, +6.0 Vdc

Operating Voltage VDD 32, +0 Vdc

Storage Temperature Range Tstg --65 to +150 °C

Case Operating Temperature TC 150 °C

Operating Junction Temperature (1,2) TJ 225 °C

Input Power Pin 29 dBm

Table 2. Thermal Characteristics

Characteristic Symbol Value (2,3) Unit

Thermal Resistance, Junction to Case

(Case Temperature 76°C, 32 W CW) Stage 1, 28 Vdc, IDQ1A + IDQ1B = 190 mA(Case Temperature 76°C, 32 W CW) Stage 2, 28 Vdc, IDQ2A + IDQ2B = 925 mA

RθJC

2.70.7

°C/W

Table 3. ESD Protection Characteristics

Test Methodology Class

Human Body Model (per JESD22--A114) 0

Machine Model (per EIA/JESD22--A115) A

Charge Device Model (per JESD22--C101) III

Table 4. Moisture Sensitivity Level

Test Methodology Rating Package Peak Temperature Unit

Per JESD22--A113, IPC/JEDEC J--STD--020 3 260 °C

Table 5. Electrical Characteristics (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

Stage 1 Off Characteristics (4)

Zero Gate Voltage Drain Leakage Current(VDS = 65 Vdc, VGS = 0 Vdc)

IDSS 10 μAdc


IDSS 1 μAdc

Gate--Source Leakage Current(VGS = 1.5 Vdc, VDS = 0 Vdc)

IGSS 1 μAdc

Stage 1 On Characteristics (4)

Gate Threshold Voltage(VDS = 10 Vdc, ID = 50 μAdc)

VGS(th) 1 2 3 Vdc

Gate Quiescent Voltage(VDS = 28 Vdc, IDQ1A + IDQ1B = 190 mAdc)

VGS(Q) 2.9 Vdc

Fixture Gate Quiescent Voltage(VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mAdc, Measured in Functional Test)

VGG(Q) 5.5 6.3 7 Vdc

1. Continuous use at maximum temperature will affect MTTF.2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF

calculators by product.3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.

Select Documentation/Application Notes -- AN1955.4. Each side of device measured separately.

(continued)



Table 5. Electrical Characteristics (TA = 25°C unless otherwise noted) (continued)

Characteristic Symbol Min Typ Max Unit

Stage 2 Off Characteristics (1)


IDSS 10 μAdc


IDSS 1 μAdc

Gate--Source Leakage Current(VGS = 1.5 Vdc, VDS = 0 Vdc)

IGSS 1 μAdc

Stage 2 On Characteristics (1)

Gate Threshold Voltage(VDS = 10 Vdc, ID = 270 μAdc)

VGS(th) 1 2 3 Vdc

Gate Quiescent Voltage(VDS = 28 Vdc, IDQ2A + IDQ2B = 925 mAdc)

VGS(Q) 2.8 Vdc

Fixture Gate Quiescent Voltage(VDD = 28 Vdc, IDQ2A + IDQ2B = 925 mAdc, Measured in Functional Test)

VGG(Q) 5.3 5.9 6.8 Vdc

Drain--Source On--Voltage(VGS = 10 Vdc, ID = 1 Adc)

VDS(on) 0.1 0.3 0.8 Vdc

Stage 2 Dynamic Characteristics (1,2)

Output Capacitance(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)

Coss 380 pF

Functional Tests (3) (In Freescale Wideband 2110--2170 MHz Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A +IDQ2B = 925 mA, Pout = 32 W Avg., f = 2167.5 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01%Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.

Power Gain Gps 27 28.5 32 dB

Power Added Efficiency PAE 27 30 %

Output Peak--to--Average Ratio @ 0.01% Probability on CCDF PAR 5.6 6.1 dB

Adjacent Channel Power Ratio ACPR --38 --36 dBc

Input Return Loss IRL --15 --9 dB

Typical Performances (3) (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA,2110--2170 MHz Bandwidth

Pout @ 1 dB Compression Point, CW P1dB 110 W

IMD Symmetry @ 112 W PEP, Pout where IMD Third OrderIntermodulation 30 dBc (Delta IMD Third Order Intermodulationbetween Upper and Lower Sidebands > 2 dB)

IMDsym 50

MHz

VBW Resonance Point(IMD Third Order Intermodulation Inflection Point)

VBWres 50 MHz

Gain Flatness in 60 MHz Bandwidth @ Pout = 32 W Avg. GF 0.3 dB

Quiescent Current Accuracy over Temperaturewith 4.7 kΩ Gate Feed Resistors (--30 to 85°C) (4)

∆IQT ±3 %

Average Deviation from Linear Phase in 60 MHz Bandwidth@ Pout = 110 W CW

Φ 0.6 °

Average Group Delay @ Pout = 110 W CW, f = 2140 MHz Delay 2.6 ns

Part--to--Part Insertion Phase Variation @ Pout = 110 W CW,f = 2140 MHz, Six Sigma Window

∆Φ 35 °

Gain Variation over Temperature (--30°C to +85°C) ∆G 0.042 dB/°C

Output Power Variation over Temperature (--30°C to +85°C) ∆P1dB 0.003 dB/°C

1. Each side of device measured separately.2. Part internally matched both on input and output.3. Measurement made with device in a single--ended configuration.4. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control

for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or AN1987.

4RF Device Data



Figure 3. MD7IC21100NR1(GNR1)(NBR1) Test Circuit Schematic

RFINPUT

VGG2

Z3

RFOUTPUT

C11

VDD2

1

2

3

4

5

8

9

14

12

11

10

DUT

Z8Quiescent Current

Temperature Compensation

Z9

R3

6

7

13

C8

Z7Z6

C4C3

VDD1

Z2

Z6 0.066″ x 0.821″ MicrostripZ7 0.066″ x 0.533″ MicrostripZ8, Z9 0.080″ x 0.902″ MicrostripPCB Rogers RO4350B, 0.030″, εr = 3.5

Z1 0.066″ x 2.193″ MicrostripZ2 0.141″ x 0.126″ MicrostripZ3 0.628″ x 0.045″ MicrostripZ4 0.628″ x 0.340″ MicrostripZ5 0.066″ x 0.581″ Microstrip

R5

VGG1

Z1 Z4 Z5

C2

VDD1

R4

NCNC

R2VGG1

R1VGG2

C1R6

Quiescent CurrentTemperature Compensation

C14

C15C13C12

C18C16C9

C6C5C19C17C10

NC

C7

NC

Table 6. MW7IC2220NR1(GNR1)(NBR1) Test Circuit Component Designations and ValuesPart Description Part Number Manufacturer

C1, C2, C3, C4, C5, C6 10 μF, 50 V Chip Capacitors GRM55DR61H106KA88B Murata

C7, C8, C9, C10 5.1 pF Chip Capacitors ATC100B5R1CT500XT ATC

C11 10 pF Chip Capacitor ATC100B100JT500XT ATC

C12, C13, C14 1.2 pF Chip Capacitors ATC100B1R2CT500XT ATC

C15 0.5 pF Chip Capacitor ATC100B0R5CT500XT ATC

C16, C17 0.1 μF, 100 V Chip Capacitors GRM32NR72A104KA01B Murata

C18, C19 1 μF, 100 V Chip Capacitors GRM32EER72A105KA01L Murata

R1, R2, R3, R4 4.7 kΩ, 1/4 W Chip Resistors CRCW12064701FKEA Vishay

R5, R6 2 Ω,1/2 W Chip Resistors CRCW12102R00FKEA Vishay



Figure 4. MD7IC21100NR1(GNR1)(NBR1) Test Circuit Component Layout

MD7IC21100NRev. 2

VGG2 R1

VGG1R2

R6

C1VDD1 C7

R3

R4

VGG1

VGG2 C2

R5

C8

C10 C19

C17

C6

C5

C13

C15C12

C14

C11

C4

C3C18

C16C9

CUTOUTAREA

6RF Device Data



TYPICAL CHARACTERISTICS

ACPR

(dBc)

IRL,INPUTRETURNLOSS

(dB)

222026

30

2060--42

31

f, FREQUENCY (MHz)

Figure 5. Output Peak--to--Average Ratio Compression (PARC)versus Broadband Performance @ Pout = 32 Watts Avg.

--25

--10

--13

--16

--19

--22

Gps,POWER

GAIN(dB)

ηD,DRAIN

EFFICIENCY(%)

29.6

29.2

28.8

28.4

27.6

28

27.2

26.8

26.4

30

29

28

27

--37

--38

--39

--40

--41

2080 2100 2120 2140 2160 2180 2200--2

--1

--1.2

--1.4

--1.6

--1.8

PARC(dB)

30025

30

1

1156 mA

Pout, OUTPUT POWER (WATTS) CW

Figure 6. Power Gain versus Output Power@ IDQ1A + IDQ1B = 190 mA

VDD = 28 VdcIDQ1A + IDQ1B = 190 mAf = 2140 MHz

Gps,POWER

GAIN(dB)

29

28

27

26

10 100

463 mA

30022

32

1

238 mA

IDQ1A + IDQ1B = 285 mA

190 mA

Pout, OUTPUT POWER (WATTS) CW

Figure 7. Power Gain versus Output Power@ IDQ2A + IDQ2B = 925 mA

VDD = 28 VdcIDQ2A + IDQ2B = 925 mAf = 2140 MHz

Gps,POWER

GAIN(dB)

30

28

26

24

10 100

143 mA

95 mA

100--60

--10

1

IM3--U

TWO--TONE SPACING (MHz)

Figure 8. Intermodulation Distortion Productsversus Tone Spacing

IMD,INTERMODULATIONDISTORTION(dBc)

10

--20

--30

--40

--50

IM3--L

IM5--U

IM5--L

IM7--U IM7--L

ηD

IRL

Gps

ACPR

PARC

Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF

VDD = 28 Vdc, Pout = 32 W (Avg.), IDQ1A + IDQ1B = 190 mAIDQ2A + IDQ2B = 925 mA, Single--Carrier W--CDMA3.84 MHz Channel Bandwidth

694 mA

925 mA

VDD = 28 Vdc, Pout = 112 W (PEP), IDQ1A + IDQ1B = 190 mAIDQ2A + IDQ2B = 925 mA, Two--Tone Measurements(f1+f2)/2 = Center Frequency of 2140 MHz

IDQ2A + IDQ2B = 1388 mA



TYPICAL CHARACTERISTICS

Figure 9. Output Peak--to--Average RatioCompression (PARC) versus Output Power

1

Pout, OUTPUT POWER (WATTS)

--1

--3

--530

0

--2

--4OUTPUTCOMPRESSIONAT

0.01%

PROBABILITY

ONCCDF(dB)

15 45 60 9015

45

40

35

30

25

20

ηD,DRAINEFFICIENCY(%)

75

ηD

ACPR

PARC

ACPR

(dBc)

--50

--20

--25

--30

--40

--35

--45

29

Gps,POWER

GAIN(dB)

28.5

28

27.5

27

26.5

26

Gps

1

Gps

ACPR

Pout, OUTPUT POWER (WATTS) AVG.

Figure 10. Single--Carrier W--CDMA Power Gain, DrainEfficiency and ACPR versus Output Power

--10

--20

15

45

0

60

50

40

30

20

ηD,DRAINEFFICIENCY(%)

ηD

Gps,POWER

GAIN(dB)

40

35

10 100 200

10

--60

ACPR

(dBc)

30

25

20

0

--30

--40

--50

TC = --30°C

25°C

85°C

85°C--30°C

25°C

Figure 11. Broadband Frequency Response

0

30

1650

f, FREQUENCY (MHz)

VDD = 28 VdcPout = 19 dBmIDQ1A + IDQ1B = 190 mAIDQ2A + IDQ2B = 925 mA

20

15

10

1850

GAIN(dB)

25Gain

1950 2050 2150 2250 2350 2450 2650

IRL

--30

0

--5

--10

--15

--20

IRL(dB)

5 --25

VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mAf = 2140 MHz, Single--Carrier W--CDMA3.84 MHz Channel Bandwidth, Input SignalPAR = 7.5 dB @ 0.01% Probability on CCDF

25°C

1750 2550

Single--Carrier W--CDMA, 3.84 MHz Channel BandwidthInput Signal PAR = 7.5 dB @ 0.01% Probability on CCDF

IDQ1A + IDQ1B = 190 mAIDQ2A + IDQ2B = 925 mA, f = 2140 MHz

--1 dB = 28.79 W

--2 dB = 38.93 W

--3 dB = 52.51 W

--30°C

VDD = 28 Vdc

8RF Device Data



W--CDMA TEST SIGNAL

0.0001

100

0

PEAK--TO--AVERAGE (dB)

Figure 12. CCDF W--CDMA IQ MagnitudeClipping, Single--Carrier Test Signal

10

1

0.1

0.01

0.001

2 4 6 8

PROBABILITY

(%)

W--CDMA. ACPR Measured in 3.84 MHzChannel Bandwidth @ ±5 MHz Offset.Input Signal PAR = 7.5 dB @ 0.01%Probability on CCDF

Input Signal

10

--60

--100

10

(dB)

--20

--30

--40

--50

--70

--80

--90

3.84 MHzChannel BW

7.21.8 5.43.60--1.8--3.6--5.4--9 9

f, FREQUENCY (MHz)

Figure 13. Single--Carrier W--CDMA Spectrum

--7.2

--ACPR in 3.84 MHzIntegrated BW

+ACPR in 3.84 MHzIntegrated BW

--10

0

1 3 5 7 9



Zo = 50Ω

Zload

Zsource f = 2220 MHz

f = 2060 MHz

f = 2220 MHz

f = 2060 MHz

VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA, Pout = 32 W Avg.

fMHz

Zsource (1)

ΩZloadΩ

2060 40.60 -- j16.80 1.99 -- j2.90

2080 40.51 -- j16.95 1.90 -- j2.74

2100 40.42 -- j17.10 1.82 -- j2.58

2120 40.32 -- j17.26 1.75 -- j2.41

2140 40.21 -- j17.42 1.68 -- j2.24

2160 40.10 -- j17.58 1.62 -- j2.08

2180 39.97 -- j17.75 1.55 -- j1.92

2200 39.84 -- j17.91 1.48 -- j1.77

2220 39.70 -- j18.08 1.41 -- j1.60

(1) Both 50 Ω inputs in parallel as per the product test fixture.

Zsource = Test circuit impedance as measured fromgate to ground.

Zload = Test circuit impedance as measuredfrom drain to ground.

Figure 14. Series Equivalent Source and Load Impedance

Zsource Z load

InputMatchingNetwork

DeviceUnderTest

OutputMatchingNetwork

10RF Device Data



ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS

28

56

22

P3dB = 52.51 dBm (178 W)

Pin, INPUT POWER (dBm)

VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mAIDQ2A + IDQ2B = 925 mA, Pulsed CW, 10 μsec(on)10% Duty Cycle, f = 2110 MHz

54

52

50

4823 2524 26

Actual

Ideal

P1dB = 51.87 dBm (154 W)

55

51

53

49

2721

P out,OUTPUTPOWER

(dBm

)

NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V

2019

Test Impedances per Compression Level

ZsourceΩ

ZloadΩ

P1dB 48.64 -- j0.94 1.02 -- j3.36

Figure 15. Pulsed CW Output Powerversus Input Power @ 28 V @ 2110 MHz

28

56

21

Pin, INPUT POWER (dBm)

54

52

50

4722 2423 2625 27

Actual

Ideal55

51

53

49

20

P out,OUTPUTPOWER

(dBm

)

NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V

1918

48

VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mAIDQ2A + IDQ2B = 925 mA, Pulsed CW, 10 μsec(on)10% Duty Cycle, f = 2170 MHz

P3dB = 52.59 dBm (182 W)

P1dB = 51.94 dBm (156 W)

Test Impedances per Compression Level

ZsourceΩ

ZloadΩ

P1dB 51.04 + j0.32 0.92 -- j3.48

Figure 16. Pulsed CW Output Powerversus Input Power @ 28 V @ 2170 MHz



Table 7. Common Source S--Parameters (VDD = 28 V, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA, TA = 25°C, 50 Ohm System)

fMHz

S11 S21 S12 S22

|S11| ∠ φ |S21| ∠ φ |S12| ∠ φ |S22| ∠ φ

1700 0.652 137.6 2.264 127.9 0.000338 110.1 0.986 170.7

1750 0.584 141.8 6.373 105.7 0.00176 --161.5 0.962 166.0

1800 0.967 149.5 22.975 30.1 0.00809 148.5 0.633 163.7

1850 0.830 109.6 14.760 --54.3 0.00544 88.8 0.872 --179.3

1900 0.609 93.0 12.528 --81.7 0.00445 92.7 0.891 175.2

1950 0.376 73.2 12.727 --115.4 0.00571 97.8 0.848 172.6

2000 0.159 50.5 11.639 --142.6 0.00781 75.0 0.785 177.3

2050 0.093 --129.9 11.706 --174.5 0.00711 50.8 0.863 --178.8

2100 0.200 --148.4 10.735 159.4 0.00593 37.7 0.921 179.9

2150 0.304 --156.5 9.872 135.1 0.00461 28.3 0.950 177.7

2200 0.386 --169.3 8.929 113.7 0.00366 28.3 0.958 176.2

2250 0.432 178.3 8.421 94.5 0.00304 33.7 0.960 175.5

2300 0.459 163.6 8.238 75.8 0.00281 41.0 0.962 175.2

2350 0.406 145.8 9.041 52.8 0.00253 46.3 0.963 175.5

2400 0.334 134.7 8.312 21.8 0.00255 54.7 0.971 175.7

2450 0.238 120.3 7.167 --5.1 0.00262 60.5 0.977 175.8

2500 0.133 110.4 5.879 --28.8 0.00270 65.2 0.981 175.8

2550 0.020 149.0 4.788 --50.7 0.00304 66.7 0.982 175.8

2600 0.102 --116.2 3.837 --70.6 0.00319 68.5 0.982 175.7

2650 0.204 --121.9 3.053 --89.3 0.00356 67.3 0.982 175.5

2700 0.280 --129.7 2.415 --105.9 0.00369 66.9 0.981 175.2

2750 0.342 --135.1 1.931 --121.3 0.00397 66.4 0.981 174.7

2800 0.392 --138.0 1.551 --135.6 0.00446 67.5 0.979 174.0

2850 0.455 --140.7 1.231 --148.0 0.00466 57.7 0.980 173.3

2900 0.503 --145.9 1.016 --160.1 0.00445 52.3 0.980 172.6

2950 0.531 --147.9 0.831 --172.2 0.00434 53.4 0.980 171.8

3000 0.566 --148.9 0.677 176.6 0.00437 54.8 0.981 171.1

3050 0.601 --149.7 0.550 166.3 0.00453 56.6 0.982 170.4

3100 0.634 --150.5 0.449 156.9 0.00486 57.6 0.982 170.0

12RF Device Data



PACKAGE DIMENSIONS

14RF Device Data



16RF Device Data



18RF Device Data



20RF Device Data





PRODUCT DOCUMENTATION AND SOFTWARE

Refer to the following documents and software to aid your design process.

Application Notes• AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages

• AN1955: Thermal Measurement Methodology of RF Power Amplifiers

• AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family

• AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family

• AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over--Molded Plastic Packages

• AN3789: Clamping of High Power RF Transistors and RFICs in Over--Molded Plastic Packages

Engineering Bulletins• EB212: Using Data Sheet Impedances for RF LDMOS Devices

Software• Electromigration MTTF Calculator• RF High Power Model

For Software, do a Part Number search at http://www.freescale.com, and select the Part Number link. Go to the Software &Tools tab on the parts Product Summary page to download the respective tool.

REVISION HISTORY

The following table summarizes revisions to this document.

Revision Date Description

0 Oct. 2008 • Initial Release of Data Sheet

1 June 2011 • Changed ESD Human Body Model rating from Class 1C to Class 0 to reflect recent ESD test results of thedevice, p. 2

• Fig. 13, MTTF versus Junction Temperature removed, p. 8. Refer to the devices MTTF Calculatoravailable at freescale.com/RFpower. Go to Design Resources > Software and Tools.

• Fig. 14, CCDF W--CDMA IQ Magnitude Clipping, Single--Carrier Test Signal and Fig. 15, Single--CarrierW--CDMA Spectrum updated to show the undistorted input test signal, p. 8 (renumbered as Fig. 13 andFig. 14 after Fig. 13 removed)

• Added AN3789, Clamping of High Power RF Transistors and RFICs in Over--Molded Plastic Packages toProduct Documentation, Application Notes, p. 21

• Added Electromigration MTTF Calculator and RF High Power Model availability to Product Software,p. 21

2 Feb. 2012 • Table 3, ESD Protection Characteristics, removed the word Minimum after the ESD class rating. ESDratings are characterized during new product development but are not 100% tested during production. ESDratings provided in the data sheet are intended to be used as a guideline when handling ESD sensitivedevices, p. 2

• Corrected bias conditions throughout the data sheet to reflect the true testing methodology.Changed IDQ1A = IDQ1B = 190 mA to IDQ1A + IDQ1B = 190 mA and changed IDQ2A = IDQ2B = 925 mA toIDQ2A + IDQ2B = 925 mA.

• Removed Fig. 5, Possible Circuit Topologies, and renumbered all subsequent figures, p. 5--10

22RF Device Data



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Document Number: MD7IC21100NRev. 2, 2/2012

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