A Factor-Graph Approach to Joint OFDM Channel Estimation and Decoding in Impulsive Noise Channels
FPGA Implementation of a Message-Passing OFDM Receiver for Impulsive Noise Channels
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FPGA Implementation of a Message-Passing OFDM Receiver for Impulsive Noise Channels Prof. Brian L. Evans, Wireless Networking and Communications Group, The University of Texas at Austin Students: Mr. Karl Nieman, Mr. Marcel Nassar and Ms. Jing Lin Approximate Message Passing (AMP) OFDM Objective: Implement real-time OFDM receiver with impulsive noise mitigation for use in power line communications (PLC). AMP PLC Test System Powered by NI Products Impulsive Noise in PLC • OFDM transmits data over multiple independent subcarriers (tones) • FFT spreads out impulsive noise across all subcarriers IFFT Filter + + FFT Equalize r and detector Impulsiv e noise estimati on Gaussian (w) + Impulsive Noise (e) Vector of symbol amplitud es (complex ) + - Channel Receiver x y Conventional OFDM system Added in our system Project supported by NI, Freescale, IBM, and TI DSP Design Diagram (step 2 of algorithm) Outdoor medium-voltage line (St. Louis, MO) Cyclostationary noise becomes impulsive after interleaving Interleave Indoor low-voltage line (UT Campus) = 1 MHz Local utility MV-LV transformer Data concentrator Smart meters • Iterative algorithm (4 iterations used) • In-band noise inferred from out-of-band guard tones • LabVIEW DSP Design Module (a high-level graphical synthesis tool) was used to map processing to FPGA • Mapped to fixed-point using MATLAB toolbox controlle r LabVIEW RT data symbol generation FlexRIO FPGA Module 1 (G3TX) LabVIEW DSP Design Module data and referenc e symbol interlea ve referenc e symbol LUT 43.2 kSps 8.6 kSps zero padding (null tones) generate complex conjugat e pair 103.6 kSps 256 IFFT w/ 22 CP insertio n 368.3 kSps NI 5781 16-bit DAC 10 MSps controlle r LabVIEW RT BER/SNR calculation w/ and w/o AMP FlexRIO FPGA Module 2 (G3RX) LabVIEW DSP Design Module NI 5781 14-bit ADC sample rate conversi on 10 MSps 400 kSps time and frequenc y offset correcti on 400 kSps 256 FFT w/ 22 CP removal, noise injectio n 368.3 kSps FlexRIO FPGA Module 3 (AMPEQ) LabVIEW DSP Design Module null tone and active tone separati on 184.2 kSps 51.8 kSps channel estimati on/ ZF equaliza tion AMP noise estimate Subtract noise estimate from active tones data and referenc e symbol de- interlea ve 51.8 kSps 8.6 kSps Host Computer LabVIEW 43.1 kSps 43.1 kSps sample rate conversi on 400 kSps 51.8 kSps 256 FFT, tone select 51.8 kSps 368.3 kSps testbench control/data visualization differential MCX pair TX Chassis RX Chassis 1 × PXIe-1082 1 × PXIe-8133 1 × PXIe-7965R 1 × NI-5781 FAM differential MCX pair (quadrature component = 0) 1 × PXIe-1082 1 × PXIe-8133 2 × PXIe-7965R 1 × NI-5781 FAM LabVIEW Front Panel BER Results Utiliza tion TX RX AMP+EQ FPGA 1 2 3 total slices 32.6 % 64.0 % 94.2% slice reg. 15.8 % 39.3 % 59.0% slice LUTs 17.6 % 42.4 % 71.4% DSP48s 2.0% 7.3% 27.3% blockRA Ms 7.8% 18.4 % 29.1% FPGA Resource Usage • BER analyzed over typical PLC operating range • Up to 8 dB SNR recovered using AMP algorithm Communicatio n in a Smart Grid with AMP convention al input impulsive noise Project website: http://users.ece.utexas.edu/~bevans/projects/plc/
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LabVIEW DSP Design Module. Local utility. testbench control/data visualization. Prof . Brian L. Evans , Wireless Networking and Communications Group , The University of Texas at Austin Stude nts: Mr. Karl Nieman , Mr. Marcel Nassar and Ms. Jing Lin. LabVIEW. - PowerPoint PPT Presentation
Transcript of FPGA Implementation of a Message-Passing OFDM Receiver for Impulsive Noise Channels
FPGA Implementation of a Message-Passing OFDM Receiver for Impulsive Noise ChannelsProf. Brian L. Evans, Wireless Networking and Communications Group, The University of Texas at Austin
Students: Mr. Karl Nieman, Mr. Marcel Nassar and Ms. Jing Lin
Approximate Message Passing (AMP)
OFDM
Objective: Implement real-time OFDM receiver with impulsive noise mitigation for use in power line communications (PLC).
AMP PLC Test System Powered by NI Products
Impulsive Noise in PLC• OFDM transmits data
over multiple independent subcarriers (tones)
• FFT spreads out impulsive noise across all subcarriers
IFFT Filter + + FFTEqualizer
and detector
Impulsive noise
estimation
Gaussian (w) + ImpulsiveNoise (e)
Vectorof symbolamplitudes(complex)
+
-
Channel
Receiverx y
Conventional OFDM systemAdded in our system
Project supported by NI, Freescale, IBM, and TI
DSP Design Diagram (step 2 of algorithm)
Outdoor medium-voltage line (St. Louis, MO)
Cyclostationary noise becomes impulsive after interleaving
Interleave
Indoor low-voltage line (UT Campus)
= 1 MHzLocal utility
MV-LV transformer
Data concentrator
Smart meters
• Iterative algorithm (4 iterations used)
• In-band noise inferred from out-of-band guard tones
• LabVIEW DSP Design Module (a high-level graphical synthesis tool) was used to map processing to FPGA
• Mapped to fixed-point using MATLAB toolbox
RT controller
LabVIEW RT
data symbol generation
FlexRIO FPGA Module 1 (G3TX)
LabVIEW DSP Design Module
data and reference
symbol interleave reference
symbol LUT
43.2 kSps
8.6 kSps
zero padding
(null tones)
generatecomplex
conjugate pair
103.6 kSps
256 IFFT w/ 22 CP insertion
368.3 kSps
NI 5781
16-bit DAC 10 MSps
RT controller
LabVIEW RT
BER/SNR calculation w/ and w/o AMP
FlexRIO FPGA Module 2 (G3RX)
LabVIEW DSP Design Module
NI 5781
14-bit ADCsample
rate conversion
10 MSps 400 kSps
time and frequency
offset correction
400 kSps
256 FFT w/ 22 CP removal,
noise injection
368.3 kSps
FlexRIO FPGA Module 3 (AMPEQ)
LabVIEW DSP Design Module
null tone and active
tone separation 184.2 kSps
51.8 kSps channel estimation/
ZFequalizationAMP noise
estimate
Subtract noise
estimate from active
tones
data and reference
symbol de- interleave
51.8 kSps
8.6 kSps
Host Computer
LabVIEW
43.1 kSps
43.1 kSps
sample rate
conversion400 kSps 51.8 kSps
256 FFT, tone select 51.8 kSps368.3 kSps
testbench control/data visualization
diffe
renti
al M
CX p
air
TX Chassis RX Chassis1 × PXIe-10821 × PXIe-81331 × PXIe-7965R1 × NI-5781 FAM
differential MCX pair(quadrature component = 0)
1 × PXIe-10821 × PXIe-81332 × PXIe-7965R1 × NI-5781 FAM
LabVIEW Front Panel
BER Results
Utilization TX RX AMP+EQ
FPGA 1 2 3
total slices 32.6% 64.0% 94.2%
slice reg. 15.8% 39.3% 59.0%
slice LUTs 17.6% 42.4% 71.4%
DSP48s 2.0% 7.3% 27.3%
blockRAMs 7.8% 18.4% 29.1%
FPGA Resource Usage
• BER analyzed over typical PLC operating range• Up to 8 dB SNR recovered using AMP algorithm
Communication in a Smart
Grid
with AMPconventional
input impulsive noise
Project website: http://users.ece.utexas.edu/~bevans/projects/plc/
