FMCAD 2027: Will the 'FM' Have a Real Impact on the 'CAD'?
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Transcript of FMCAD 2027: Will the 'FM' Have a Real Impact on the 'CAD'?
Formal Methods in Computer Aided DesignAustin, TX, USANovember 11 - 14
FMCAD 2027: Will the 'FM' Have a Real
Impact on the 'CAD'?
Moderator: William Joyner SRC
Panelists: Carl Pixley Synopsys
Robert Jones Intel
Andreas Kuehlmann Cadence
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SRC Program Entities
SRC TRC
Global Research
Collaboration
Focus Center Research Program
Nanoelectronics Research Initiative
Education Alliance
Topical Research
Collaboration
Semiconductor Research Corporation
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SRC-GRC Members and Partners
USA
Canada
Sweden
Japan
UK
Netherlands
India
Poland
China
Singapore
Italy
Qatar
TaiwanIsrael
Switzerland
Colombia
Finland
Russia
Austria
Germany
Spain
Completed
Australia
SRC-GRC Research Worldwide
January 2008
Current
Brazil
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SRC-GRC Research Program Structure
Computer-Aided Design and Test Sciences (CADTS) Logical and Physical Design Test and Testability Verification
Integrated Circuit and System Sciences (ICSS) Circuit Design Integrated Systems Design
Device Sciences (DS) Digital CMOS Memory Technologies Modeling and Simulation Compact Modeling Analog/Mixed-Signal Devices
Nanomanufacturing Sciences (NMS) Patterning Factory Systems ESH
Interconnect and Packaging Sciences (IPS) Packaging Back-End Processes
Cross-Disciplinary Semiconductor Research (CSR)
Computer-Aided Design and Test Sciences (CADTS) Logical and Physical Design Test and Testability Verification
Integrated Circuit and System Sciences (ICSS) Circuit Design Integrated Systems Design
Developing verification needs document Multi-core System/high-level verification Analog/mixed signal Hardware/software Post-silicon validation
Solicitations Late Dec System-level (including
verif) Late Jan Verification
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Office of Science and Technology PolicyExecutive Office of the PresidentNew Executive Office BuildingWashington, DC 20502
FOR IMMEDIATE RELEASE June 12, 2007
PRESIDENT BUSH ANNOUNCES THE RECIPIENTS OF THE 2005 NATIONAL MEDAL OF TECHNOLOGY
SRC Receives National Medal of Technology
WASHINGTON-- Today President George W. Bush announced the recipients of the Nation's highest honor for technology, naming the recipients of the 2005 National Medal of Technology. This prestigious award honors America’s leading innovators. The award is given to individuals, teams, and/or companies/divisions for their outstanding contributions to the nation’s economic, environmental and social well-being through the development and commercialization of technology products, processes and concepts; technological innovation; and development of the Nation’s technological manpower. The Department of Commerce administers the award, which was established by an act of Congress in 1980. For more information about the National Medal of Technology visit: www.technology.gov/medal/
SRC is recognized for constructing the world's largest and most successful university research force in support of the rapidly growing semiconductor industry; for proving the worth of collaborative research as the first high-tech research consortium; and for creating the concept and methodology that evolved into the International Technology Roadmap for Semiconductors.
SRC CEO Larry Sumney and President Bush at the White HouseJuly 27, 2007
The Handshake
The Medal
The Whisper
More money for formal methods!
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George Santayana
“Those who cannot remember the past are condemned to repeat it.”
“History is a pack of lies about events that never happened told by people who weren't there.”
The Past
William Faulkner
“In the South, the past isn’t dead – it’s not even past!”
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Hansel and Gretel (with thanks to Bob Brayton)
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The Future
Albert Einstein“I never think of the future. It comes soon enough.”
Niels Bohr“Prediction is very difficult, especially about the future.”
Dan Quayle“The future will be better tomorrow.”
Dan Quisenberry“I’ve seen the future, and it’s much like the present – only longer.”
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Other Quotes
Edsger Dijkstra“Testing can be used to show the presence of bugs, but never to show their absence.”
Donald Knuth“Beware of bugs in the above code; I have only proved it correct, not tried it.”
Kurt Keutzer“Functional correctness is the most fundamental requirement because the speed and reliability of an incorrectly functioning electronic system are of no interest.”
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Other Quotes
Alan Hu“It's important not to keep redefining formal verification to mean whatever we can't quite do yet.”
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Farid Najm“This model is useless, but its theoretical aspects may be appealing to this audience.”
Dan Beece“Formal methods will always be restricted to specialized design components and will occupy a relatively small niche in design verification.”
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Formal Verification Comes of Age!
Year
Com
ple
xit
y
system desig
n size
form
al cap
ability
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Functionality + Testability
Functionality + Testability + Wire Delay
Functionality + Testability + Wire Delay + Power Mgmt
Functionality + Testability + Wire Delay + Power Mgmt + Embedded software
Functionality + Testability + Wire Delay + Power Mgmt + Embedded software + Signal Integrity
Functionality + Testability + Wire Delay + Power Mgmt + Embedded software + Signal Integrity + Hybrid Chips
Functionality + Testability + Wire Delay + Power Mgmt + Embedded software + Signal Integrity + Hybrid Chips + RF
Functionality + Testability + Wire Delay + Power Mgmt + Embedded software + Signal Integrity + Hybrid Chips + RF + Packaging
Functionality + Testability + Wire Delay + Power Mgmt + Embedded software + Signal Integrity + Hybrid Chips + RF + Packaging + Mgmt of Physical Limits
Thousands
Billions
# T
ran
sist
ors
Exponentially growing number of elements (devices & wires) Design complexity is exponential function of element count
Superexponential Design Complexity
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Carl Pixley
Group Director in Advanced Technology Group, Synopsys
Taught at UT Austin and Southwest Texas State
Formerly at Burroughs, MCC, Mitsubishi, Motorola
Ph.D., SUNY Binghamton
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Robert Jones
Senior Principal Engineer at Intel
Strategic planner for Intel's internal EDA group
Previously at Intel's Strategic CAD Labs
Ph.D., Stanford
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Andreas Kuehlmann
Cadence Fellow and Director, Cadence Laboratories
Dr.-Ing. habil in EE, University of Technology, Ilmenau, Germany
Adjunct Professor, UC Berkeley
Worked at Fraunhofer Institute and IBM