Flip Flops 3.1 Latches and Flip-Flops 3 ©Paul Godin Created September 2007 Last Edit Aug 2013.
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Transcript of Flip Flops 3.1 Latches and Flip-Flops 3 ©Paul Godin Created September 2007 Last Edit Aug 2013.
Flip Flops 3.1
Latches and Flip-Flops 3
©Paul GodinCreated September 2007
Last Edit Aug 2013
Flip Flops 3.2
Edge-Triggered Devices
◊ Up to now we have looked at two digital values or states: 1 and 0
◊ There are also two dynamic digital values or states: ◊ rising edge (positive edge)◊ falling edge (negative edge)
posi
tive e
dge
negativ
e e
dge
1
0 0
Flip Flops 3.3
Edge-Triggered Devices
◊ Inputs to some devices will respond only to a dynamic state.
◊ This is known as an edge input or a clock input.◊ The symbol is a triangle at the input.
Positive Edge Negative Edge
Flip Flops 3.4
Edge-Triggering Notation
◊ Positive Edge:
◊ PGT (positive going transition)
◊ PT (positive transition)◊ P
◊ Negative Edge:
◊ NGT (negative going transition)
◊ NT (negative transition)◊ N
Flip Flops 3.5
Advantages of Edge-Triggered Devices
◊ Edge-Triggered devices are important for many applications, including:◊ Counters
◊ Clocks◊ Timers◊ Digital meters◊ Sequential circuits◊ Mathematical operations, …
◊ Shift Registers◊ Memory◊ Data communications◊ Logic operations◊ Mathematical operations, …
Flip Flops 3.6
Edge-Triggered D Flip Flop
◊ The edge-triggered D-Flip Flop will only read its input when the edge is received.
◊ “With an enabling edge, the Q output follows the D input”.
D Q
QClock
En D Q Q’ Mode
0 0 1 Reset
1 1 0 Set
1 X Q Q’ Hold
0 X Q Q’ Hold
X Q Q’ Hold
This is one memory cell in computer applications
Flip Flops 3.7
Edge-Triggered SR
◊ The edge triggered SR is not very popular.
◊ The only difference between the SR Latch and the edge-triggered SR is that it will read its input only when it receives the active edge.
Flip Flops 3.8
Edge-Triggered SR Flip Flop
Clk S R Q Q’ Mode
0 0 Q Q’ Hold
0 1 0 1 Reset
1 0 1 0 Set
1 1 0 0 Invalid
0 X X Q Q’ Hold
1 X X Q Q’ Hold
X X Q Q’ Hold
S
R
Q
Q
Clk
Flip Flops 3.9
Edge-Triggered JK Flip Flop
◊ The JK Flip Flop is a device that functions like an edge-triggered SR latch.
◊ The only exception: toggle state on two active inputs.
◊ Toggle means go to the complimentary (opposite) output state. This is a very useful function.
Flip Flops 3.10
Edge-Triggered JK Flip Flop
Clk J K Q Q’ Mode
0 0 Q Q’ Hold
0 1 0 1 Reset
1 0 1 0 Set
1 1 Q’ Q Toggle
0 X X Q Q’ Hold
1 X X Q Q’ Hold
X X Q Q’ Hold
J
K
Q
Q
Clk
Flip Flops 3.11
Toggling
Toggling has important applications including counters and frequency dividers.
A “T” Flip-Flop has a clock input only. The output will toggle on an input edge.
TQ
QClk
Flip Flops 3.12
Exercise 1: Edge-Triggered D Flip Flop
Complete the table
D Q
QClock
En D Q Q’ Mode
0
1
1 X
0 X
X
Flip Flops 3.13
Exercise 2: Edge-Triggered JK Flip Flop
Clk J K Q Q’ Mode
0 0
0 1
1 0
1 1
0 X X
1 X X
X X
J
K
Q
Q
Clk
Complete the table
Flip Flops 3.14
Exercise 3: D Flip Flop timing diagramComplete the timing diagram
D
Q
Q
Clk
D Q
QClock
Flip Flops 3.15
Exercise 4: JK Flip Flop timing diagram
J
K
Q
QClk
Complete the timing diagram
J
K
Q
Q
Clk
Flip Flops 3.16
Exercise 5: JK Flip Flop timing diagramComplete the timing diagram
J
K
Q
Q
Clk
J
K
Q
QClk
Flip Flops 3.17
END
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