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Flexible, Highly Dynamic, and Precise 30-kA Arbitrary Current Source

G. Tsolaridis, J. Biela Power Electronic Systems Laboratory, ETH Zürich

Physikstrasse 3, 8092 Zürich, Switzerland

3382 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 46, NO. 10, OCTOBER 2018

Flexible, Highly Dynamic, and Precise 30-kAArbitrary Current Source

Georgios Tsolaridis , Student Member, IEEE, and Juergen Biela , Senior Member, IEEE

Abstract— High-power current sources with high dynamicperformance, ultralow current ripple, and absolute referencetracking accuracy are the key elements for magnets (bumperand septum) that are used in accelerators. Similar requirementsare also encountered in plasma research applications in fusionreactors, as well as plasma research for the future high voltagedirect current circuit breakers. Therefore, the current sourcemust be able to drive resistive/inductive and highly fluctuatingloads without any compromise in its performance. In this paper,such a flexible, dynamic, and accurate current source is intro-duced, which able to provide amplitudes up to 30 kA and bipolarvoltages up to 10 kV. The system’s operating concept is presentedand its design procedure in order to fulfill a list of demandingspecifications is demonstrated. In addition, a detailed descriptionof its near-optimal, advanced control system is presented. Finally,the theoretical considerations are verified by extensive simulationresults for various operating scenarios, including driving chaoticarc loads.

Index Terms— Accelerator magnets, arc modeling, currentsources, modular power converters, plasma sources, powersupplies.

I. INTRODUCTION

H IGH-POWER current sources are able to generate fastcurrent gradients combined with ultralow current ripple

and absolute accuracy at steady state and are required forgenerating the magnetic fields for beam deviation in accel-erators with bumper and septum magnets [1]. These magnetstypically are purely inductive loads with inductance valuesranging from a few microhenry up to a few millihenry [2].They require [3]–[6]:

1) Current amplitudes ranging from a few hundreds ofamperes up to tens of kiloamperes;

2) Fast rise and fall times of some hundreds of microsec-onds;

3) High precision at flat top, often below 100 ppm.

For the generation of the high current gradient, a high outputbipolar voltage is required, while the flat-top current needs tobe precisely controlled in order to avoid inaccuracies.

Manuscript received December 4, 2017; accepted April 15, 2018. Date ofpublication May 17, 2018; date of current version October 9, 2018. Thiswork was supported by the Swiss Innovation Agency (Innosuisse—SCCERprogram). The review of this paper was arranged by Senior Editor W. Jiang.(Corresponding author: Georgios Tsolaridis.)

G. Tsolaridis is with the Laboratory for High Power Electronics, ETHZurich, 8092 Zürich, Switzerland (e-mail: tsolaridis@hpe.ee.ethz.ch).

J. Biela is with the Electrical Engineering Department, ETH Zurich,8092 Zürich, Switzerland.

Digital Object Identifier 10.1109/TPS.2018.2833282

Similar requirements in terms of current rating, flat-topaccuracy and rise/fall times are encountered in plasma confine-ment technologies for fusion applications where the positionof the plasma is controlled via the magnetic field produced bylarge inductive loads [7], [8].

Likewise, magnetic resonance imaging (MRI) systems haveparticularly high requirements with respect to their powersupply system. In MRI systems, magnetic field gradients aregenerated with coils that typically have an inductance around1 mH. The quality of the image is related to the accuracy ofthe current that generates the magnetic fields, the resolutionof the image is related to the current amplitude and theimaging duration is related to the current gradient throughthe coil [9]. Typically, several kiloamperes are needed with acurrent gradient higher than 2.5 A/μs and an accuracy higherthan 500 ppm [10].

Furthermore, precise and highly dynamic current sourcesare able to generate arbitrary current waveforms with similarrequirements and are required nowadays for research purposeson the next generation dc circuit breakers [11], [12]. Morespecifically, the development and optimization of high voltagedirect current (HVdc) circuit breakers is particularly chal-lenging because the chaotic behavior and the unknown prop-erties of the dc arc impose additional challenges in thedevelopment of accurate models for circuit breakers, whichcould facilitate a numerical optimization of the system [13],[14]. For accurate modeling, the properties of the dc arc needto be investigated in order to gain a better understanding of itsbehavior [15]. However, dc arc investigations require currentsources with the ability to drive highly fluctuating dynamicloads (dc arc). In [16] and [17], the operation of a small-scalecurrent source is described along with the target requirementsof a full-scale source.

Based on the above-mentioned applications, a set ofspecifications for a flexible, multipurpose, and modularcurrent source has been determined, as shown in Table I. Theinvestigated full-scale source consists of 20 stack modulesconnected in parallel. Each stack module increases the currentcapability of the system by 1.5 kA. Apart from the full-scalespecifications, Table I displays the specifications of a stackmodule. In [18] and [19], a novel topology that could be usedas a current source converter for such applications has beenintroduced. Therefore, a current-shaping converter, whichcontrols the output current of the system, is used in serieswith a modular multilevel Marx-type converter (M3TC) inorder to generate the required high output voltage. However,

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TSOLARIDIS AND BIELA: FLEXIBLE, HIGHLY DYNAMIC, AND PRECISE 30-kA ARBITRARY CURRENT SOURCE 3383

TABLE I

REQUIREMENTS FOR DIFFERENT APPLICATIONS AND TARGET SPECIFICATIONS OF THE INVESTIGATED FLEXIBLE CURRENT SOURCE.A FULL-SCALE SOURCE CONSISTS OF 20 PARALLEL STACK MODULES

the relatively simple applied control method (interleaved PIcontrol) limited the dynamic performance of the system andits robustness under load disturbances (e.g., dynamic loads).

Based on those results, a flexible, modular topology forgenerating high current pulses with high gradients duringtransient operation and ultralow ripple during steady state ispresented in [20], where a novel control system is discussed.The combination of an optimal design and a near-optimalcontrol enables the use of the topology’s full potential andensures that the requirements are met without compromisingthe stability of the system even in case of sudden loadchanges [21].

The contributions of this paper are: 1) the description ofthe analytical design procedure of the current source in orderto fulfill its dynamic and flat-top requirements; 2) the detailedpresentation of its advanced control system in order to copewith various types of loads, without compromising its overallperformance; and 3) the verification of the theoretical consid-erations through detailed simulation results, including drivinghighly fluctuating loads (i.e., dc arc). In addition, the simula-tion results demonstrate the suitability of the designed currentsource in a wide range of applications.

This paper is structured as follows. Section II presents anoverview of the converter system and its basic operating prin-ciple. Section III describes the analytic design procedure andthe choice of the main parameters of the system. Section IVprovides a description of the complete control system of thecurrent source. In Section V, the simulation results of thesystem under various operating conditions are shown. Finally,Section VI summarizes the main conclusions and contributionsof the paper.

II. OPERATING PRINCIPLE

This section introduces the basic topology of a stack moduleof the current source (Fig. 1) and describes its basic operationprinciple. At first, each stack of the current source consists of acurrent-shaping converter connected in series with the M3TC.The current-shaping converter is responsible for controllingthe current, shaping arbitrary current waveforms and is ableto provide a highly dynamic current. On the other hand,the M3TC is responsible for generating a high staircase outputvoltage by inserting or bypassing the precharged capacitors.

Fig. 1. Stack module of the proposed modular pulsed current source, with1.5-kA nominal current and ±10-kV output voltage per stack. The full-scalesource consists of 20 parallel stacks with a nominal current of 30 kA.

Fig. 2. Simplified equivalent circuit of a stack module of the proposed currentsource. The multiphase current shaping converter can be modeled as a voltagesource in series with an equivalent inductance, that is, Leq = (Li/n), wheren is the number of interleaved phases. Likewise, the M3TC is modeled as avoltage source. Note: Values within {. . .} are discrete while the ones inside[. . .] are continuous.

The equivalent circuit in Fig. 2 shows a simplified overviewof the topology operation.

As current-shaping converter, a multiphase interleaved2-level buck-type converter with split dc link is chosen. Thesplit dc link is used in order to allow controllability of the

3384 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 46, NO. 10, OCTOBER 2018

Fig. 3. Basic operating principle of the investigated current source. (a) Outputvoltage Vout. (b) Converter output voltage Vc. (c) M3TC voltage VM3TC.(d) Voltage of the first stage of the M3TC V1,M3TC. (e) Voltage of the secondstage of the M3TC V2,M3TC.

current waveform when the output voltage of the converter Vc

is around 0 V and enhances the dynamic performance of thesystem during step-down transients. In this way, the buck-typeconverter can generate Vcon = {V1 − V2} with respect to theground (midpoint). The interleaved concept helps in the mini-mization of the output current ripple, as shown analytically inSection III.

In order to reduce the ripple and increase the controllabilityof the current (i.e., increased bandwidth), a high switchingfrequency is chosen (as shown in Section III), and therefore,SiC MOSFET devices are required. The total dc-link voltageis chosen to be 850 V based on the available SiC MOSFETdevices (breakdown voltage of 1.2 kV). The input voltagelevels V1 = 750 V and V2 = 100 V are chosen in orderto allow sufficient controllability margin when the voltage Vc

is around its operating limits Vc = {0, 550 V}, as indicatedin Fig. 2. In order to supply the high output power (maximum15 MW per stack), the input capacitors C1 and C2 areprecharged by a bipolar power supply.

For the M3TC converter, up to nine bipolar modular multi-level stages are connected in series, consisting in principle asolid-state Marx-type generator. The M3TC is only responsiblefor the generation of the staircase output voltage, so itsdynamics are relatively slow. In this case, conventional siliconinsulated-gate bipolar transistors (IGBTs) are chosen as shownin Fig. 1. The stage voltage is chosen to be 1.1 kV based on

the commercial available silicon IGBT modules. In this way,the total output voltage of the M3TC can be designed to bebetween ±0.55 kV (if one stage is used) and ±9.35 kV (ifnine stages are used), in order to fit the needs of differentapplications. The capacitors of the M3TC stages are chargedin parallel between pulses, by a low-power capacitor charger,as shown in Fig. 1.

The basic operating principle of the current source is illus-trated in Fig. 3. For generating, for example, a linearly risingoutput voltage Vout, first the converter output voltage Vc at t0 isrising. At t1, Vc reaches 0.5 Vst, which is the precharged valueof the first stage of the M3TC. At that point, the first stage ofthe M3TC is turned ON and VM3TC becomes 0.5 Vst, while Vc

collapses to zero. As Vout continues to increase, Vc increases.At t2, Vc reaches again to 0.5 Vst and the first M3TC stageis turned OFF while the second stage, which is pre-charged toVst, is turned ON. Then, the voltage VM3TC becomes equal toVst and Vc collapses to zero. Likewise at t3, Vc reaches 0.5Vst,the first M3TC stage is turned ON, and VM3TC becomes 1.5Vst.

III. DESIGN PROCEDURE

In this section, the needed analytical considerations for thedesign procedure are given in order for a stack module ofthe current source to meet the requirements listed in Table I.The governing equations regarding the ripple calculations aswell as the gradient calculations are shown, demonstrating theworst case conditions, and finally, a feasible design space fora stack module with only one available bipolar M3TC stageis demonstrated.

A. Current Ripple

The current ripple of a single module of the current shapingconverter shown in Fig. 1 is given as

�iL,pp = 1

L fs(Vc + V2)

(1 − Vc + V2

V1 + V2

). (1)

Assuming an interleaved operation of the current-shapingconverter, the converter output current ripple �iout, pp can beexpressed as

�iout,pp = Di(1 − Di)V1 + V2

Li fs(2)

where Di is given as

Di = Vc + V2

V1 + V2− 1

n

⌊n · Vc + V2

V1 + V2

⌋. (3)

As a worst case assumption, the amplitude of the outputcurrent’s iout first harmonic (at ωh = 2πn fs ) is assumed tobe equal to the amplitude of the current ripple �iout, pp. Thesecond-order output filter L loadCout attenuates the ripple of theload current, which can be calculated by

�iload,pp = �iout,pp√(L loadCoutω

2h − 1

)2 + (RloadCoutωh)2. (4)

From (4), the worst case ripple condition arises for theminimum L load and the minimum Rload.

TSOLARIDIS AND BIELA: FLEXIBLE, HIGHLY DYNAMIC, AND PRECISE 30-kA ARBITRARY CURRENT SOURCE 3385

B. Current Gradient

Based on the equivalent circuit in Fig. 2, the current gradientthat the converter can generate at its output depends onthe voltage that can be applied across the equivalent induc-tance Leq. It must also be noted that during pulsed changes,when there is no need for a controllable waveform, the M3TCcapacitors can be inserted in order to either reduce or increasethe output voltage Vc during step-up or step-down transients,respectively. The worst case voltage Vc can then be assumedin order to calculate the minimum achievable gradient.

Based on these considerations and assuming a time-optimalcontroller, the converter output current gradient can be calcu-lated as

diout

dt= n

Vcon − Vc

Li. (5)

The load current can be expressed in the frequency domain as

iload(s) = iout(s)

L loadCouts2 + RloadCouts + 1. (6)

The current-shaping converter’s current iout according to (5)is a ramp and acts as an input to the second-order outputstage. If �Ipulse is the step change in the reference currentsetting (pulse amplitude), the ramp input is expressed in thefrequency domain as

iload(s) =diout

dt

s2

⎛⎝1 − e

−s�Ipulse

dioutdt

⎞⎠ . (7)

The current gradient can be calculated analytically bysolving (6) in the time domain. It is found that the worstcase scenario arises for the maximum L load and Rload in theconsidered range and the minimum pulse amplitude setting�Istep.

C. Robustness

Considering highly fluctuating loads, such as HVDC-breakers, repetitive highly dynamic load changes must beexpected and the robustness of the system is tested underextreme conditions. For example, in case of a voltage collapse,the slow switching M3TC IGBTs are not able to react fastand a high voltage is applied across the equivalent inductanceLeq, causing an over-current which could potentially triggerthe protection mechanisms of the system. In order to increasethe robustness, the individual module inductance Li must besufficiently large, setting an upper boundary on the allowablecurrent rise.

In the present design, the maximum considered voltage faultis chosen to be �Vmax = 1.5 kV continuously applied acrossthe inductor Leq, for a time duration of �t = 10 μs, whichrepresents the reaction time of the M3TC converter (turn-OFF/ON delay, finite sampling times, and so on). If Imax is themaximum current that can be tolerated, the minimum phaseinductance value can be calculated as

Li, min = n�Vmax�t

Imax − Irated. (8)

Fig. 4. Flowchart for the design of the current source for meeting the dynamicand flat-top constraints listed in Table I.

Fig. 5. Feasible design space for the system with one stack and one availablebipolar M3TC stage, precharged to 550 V. Increasing the number of M3TCstages and the number of stacks increases the possible current gradient anddecreases the load ripple.

D. Design Space for Minimum Output Voltage Stack

The demonstrated design procedure (Fig. 4) was followedand, for example, the design space for a stack module systemwith one available bipolar M3TC stage charged to 550 V isshown in Fig. 5 for six interleaved modules with a switchingfrequency of 60 kHz. As shown in Fig. 5, increasing thenumber of phases can lead not only to a significant decrease

3386 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 46, NO. 10, OCTOBER 2018

TABLE II

RESULTING PARAMETERS OF A STACK MODULE SYSTEMWITH ONE AVAILABLE BIPOLAR M3TC STAGE

Fig. 6. Output voltage limitations of a single-stack module as a function ofthe output current and the pulse duration. It can be noted that the systemcan deliver 5.5 kV, for 10 ms at the maximum operating pulsed currentof 1.5 kA. In order to increase the output voltage capabilities of the stackmodule, redundant stages need to be inserted, or larger capacitance values arerequired.

of the switching frequency to achieve the maximum currentripple requirements but also to an increased complexity. On theother hand, a higher switching frequency leads to increasedcontrollability, which is an important factor for the robustnessof the system. The chosen parameters are listed in Table II.It should be highlighted that for larger systems (higher outputvoltage and higher output current), the parameters of thesystem do not change and the system is extended by increasingeither the number of M3TC stages or the number of paralleledstacks.

E. System Performance Limitations

The previous analysis and optimization of the system para-meters relies on the assumption that the module inductorsare ideal, and therefore, the inductance values Li are equal.However, manufacturing and mechanical tolerances can resultin differences between the inductance values Li. In this case,the resulting output current ripple is expected to be higher thanthe calculated one. In [22], a sorting algorithm is proposedin order to minimize the output current ripple in the inter-leaved systems with different individual module inductances.It should be clear, however, that even after the proposed

Fig. 7. Hybrid controller of a stack module. Two modules of the current-shaping converter are shown (the master and one slave module). Each slavemodule consists of: 1) average current mode controller which is enabled duringsteady state and slow transients, 2) adaptive hysteretic mode controller thatis enabled during fast transients, and 3) phase-shifting controller for optimalinterleaving during steady state.

Fig. 8. Operation of the phase-shifting controller using only precise clocksignals. (a) Master and slave module currents. (b) Master and slave PWMclocks. In this scenario, the measured phase-shift �φ is smaller than thereference phase-shift �φ∗ so the slave’s PWM maximum counter cslave isincreased, decreasing the switching frequency, and shifting iL, slave to itsreference position i∗L , slave, within one period.

ripple optimization, the converter output current ripple �iout, ppwill be higher than the ideally calculated one, given by (2).In this case, the output filter capacitor Cout would need to beincreased in order to attenuate the load current ripple �iload, ppand comply with the steady-state ripple requirements of thesystem. To account for this case, the output capacitor is over-dimensioned in the final system.

TSOLARIDIS AND BIELA: FLEXIBLE, HIGHLY DYNAMIC, AND PRECISE 30-kA ARBITRARY CURRENT SOURCE 3387

Fig. 9. State machine of the M3TC. The algorithm measures the voltage Vc and uses the reference current Iref. When the voltage Vc exceeds the limits,the state machine changes the state, as described in Section II. The modulation of the state machine is performed in order to minimize the jittering due to theinterlocking time of the switches. During the state change, the state machine triggers the PI controller calculations, informing the controller for the eminentchange in voltage, as shown in Fig. 7. In fast transients (i.e., pulses), the algorithm turns multiple stages on simultaneously (VM3TC = Vpreset), in order toachieve a higher gradient and returns to the first state once the converter current is settled.

Another limitation of the system arises from the energystorage requirements of the M3TC capacitors. Since the M3TCcapacitors are not continuously charged, the maximum outputvoltage that the system can provide continuously throughouta pulse is not 10 kV but depends on the stage capacitanceCst and the load current iload. A good compromise betweenperformance and volume for the designed system can be the100-mF/0.55-kV foil capacitors for the first M3TC stage andthe 25 mF/1.1 kV for the rest of the M3TC stages. In Fig. 6,the maximum output voltage that can be supplied by thedesigned stack module source as a function of the outputcurrent and the pulse duration is shown, for the chosen stagecapacitance values.

IV. CONTROL SYSTEM

A. Control of Current Shaping Converter

In [21], an advanced multiphase hybrid controller thatcombines the time optimality of a hysteretic controller withthe robustness of an average current controller is presented andits ability to exploit the maximum capabilities of the convertersystem both when it comes to its transient (maximum currentgradient) as well as its steady-state (minimum current ripple)performance is explained.

This interleaved hybrid controller for the multiphasedc–dc converters is used in the presented current sourcein order to harness the full potential of the topology andmeet the specifications. Apart from the necessary high currentgradient, the hybrid control concept provides the system withan excellent disturbance rejection capability which is essential

during rapid load changes (e.g., in case of arcs). When aload disturbance occurs, the adaptive hybrid controller reactsby making use of the excellent properties of the hystereticcontroller. Moreover, the use of the hysteretic control intransients makes the controller parameters less sensitive tothe load parameters, which is advantageous in systems withunknown loads.

An overview of the control system is shown in Fig. 7.When the system is at steady state, the average current modecontrol (PI controller) is enabled along with the phase-shiftingcontroller in order to achieve an interleaved operation. In caseof a slow transient (e.g., slow ramp and sinusoidal waveform),the PI controller controls the current. When fast transientsoccur (e.g., pulse references), the adaptive hysteretic controlleris enabled providing a time-optimal transient response. Theinterleaved operation for the duration of the transient is lostin order to provide the maximum possible current gradientand hysteretic band adaptations are employed in order toachieve approximately interleaved currents after the end of thetransient. When the system is at steady state, the controllerreturns to an average mode control in order to maximizethe accuracy of the current regulation and achieve preciseinterleaving [21].

The operation of the phase-shifting controller is depictedin Fig. 8. In order to achieve the needed precision the phase-shifting controller adjusts the switching frequency of the slavemodules by comparing the respective pulse width modula-tion (PWM) clocks with the clock of the master module. In thisway, possible imprecisions due to the current sensing circuitryof the individual modules do not affect the interleaving and

3388 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 46, NO. 10, OCTOBER 2018

Fig. 10. State machine during commutation from state 1 to state 2, shownin Fig. 9. The intermediate states 1.1, 1.2, and 1.3 aim to minimize thedisturbance of the M3TC voltage during the simultaneous switching of thetwo M3TC stages, by synchronizing their switching actions.

the accuracy is enhanced. It should be noted that in the caseof parallel connected sources, the interleaving of the mastermodules of each stack follows the same concept. This isparticularly beneficial since only one clock signal (master’sclock) has to be distributed to the control units of the paralleledstacks in order to achieve interleaving, eliminating the need foran expensive high bandwidth current sensor at the output ofevery stack.

B. M3TC State Machine

The state machine of the M3TC, implementing the basicprinciple described in Fig. 3, is shown in Fig. 9. Thisfigure also depicts the switching actions during the leveltransitions in order to minimize the disturbance of the M3TCoutput voltage VM3TC, when two stages have to be switchedsynchronously. A commutation example from state 1 to state 2is shown in Fig. 10 and the respective voltages of the M3TCstages are shown in Fig. 11, along with the status of the IGBTswitches of the M3TC stages 1 and 2.

At state 1.1, switch S2, 2 is turned OFF, and the antipar-allel diode of S2, 2 is conducting, resulting in no change inVM3TC. After waiting for the interlocking time Tint,s of the1.7 kV switch S2, 2, the state machine commutes to state 1.2,by turning ON switch S2, 1. Due to the turn-ON delay timeof switch S2, 1, the VM3TC is not changing, and the statemachine waits for �TIGBT = Td, s − Td, f, which is the delaytime difference between the 1.7 kV and the 1.2-kV IGBT.

Fig. 11. M3TC voltages during commutation from state 1 to state 2, shownin Fig. 9. The commutation strategy shown in Fig. 10 ensures that the nonidealswitching causes only a small voltage disturbance during state 1.3. Thisdisturbances is caused by the difference between the fall time of switch S1, 1and the rise time of switch S2, 1.

In state 1.3, the state machine turns OFF switch S1,1. Duringthis state, a small disturbance is observed in the voltageof the M3TC due to the difference between the fall timeof switch S1,1 and the rise time of S2, 1 as can be seenin Fig. 11. At the end of state 1.3, switch S2, 1 is conductingand the voltage VM3TC becomes equal to Vst. During state 1.3,the algorithm triggers the PI controller calculations and feed-forward the voltage (Vprecontrol) to the PI controllers, as shownin Fig. 9. In this way, the transient behavior of the PI isimproved and the disturbance caused by the level change isminimized. After waiting for the interlocking time Tint,f ofthe 1.2-kV IGBT, the state machine commutes to state 2 byturning ON switch S1,2. In this way, the two simultaneousswitching actions (turning ON stage 2 and turning OFF stage1) are almost synchronous resulting in only a minor remainingvoltage disturbance of the VM3TC, which is caused by therise/fall times of the switches.

Furthermore, when a pulsed current is given as a reference,multiple M3TC stages can be directly turned ON and thevoltage of the M3TC is set to Vpreset. This could be either themaximum available voltage (i.e., all stages turned ON) or anyother value depending on the dynamic performance require-ments of the application. When the converter current iconis settled, the voltage of the M3TC returns to the initialstage and the M3TC enters again the normal operation mode.A similar algorithm is followed in the case of negative outputvoltages or step-down pulsed references as shown in Fig. 9.

TSOLARIDIS AND BIELA: FLEXIBLE, HIGHLY DYNAMIC, AND PRECISE 30-kA ARBITRARY CURRENT SOURCE 3389

TABLE III

CONTROLLER PARAMETERS, NONIDEALITIES, ANDPARASITIC COMPONENTS

V. SIMULATION RESULTS

In this section, simulation results that verify the perfor-mance of the designed stack module are presented. Table IIIlists the main control parameters, nonidealities, and parasiticcomponents included in the simulations. It is worth noting thatthe power semiconductor interlocking times and rise/fall timeshave been also included since they play a significant role inthe control of the M3TC and the performance of the currentsource. The times and parasitics used in the simulation aretaken from the respective manufacturer datasheets. In addition,the voltage divider and the current sensor have been simu-lated as the first-order low-pass filters, with the bandwidthlisted in Table III. The analog-to-digital converter (ADC) hasbeen modeled as a conventional quantizer with a resolutionof 12 bits and a sampling frequency of 2 MHz. Moreover,the SiC MOSFETs are modeled with an equivalent resistanceRds,ON and the IGBTs with a voltage source Vce,ON in seriesto a resistor Rce,ON. The simulation model is running with afrequency of 100 MHz, which is representing the maximumresolution of the field-programmable gate array (FPGA) clockof the control unit.

A. Resistive-Inductive Loads

Fig. 12 shows an arbitrary current waveform for a2-�–10 μH load. Initially, a ramp reference current with agradient of 1 A/μs is imposed and the PI controller is enabledfor the duration of this transient since there is no need for

Fig. 12. Arbitrary current waveform generation driving a 2 �–10 μHload. (a) Reference current (black) and load current waveform (gray). ThePI controller is used in transients (slow ramp (1 A/μs and 200 Hz sinusoidalwave). (b) Individual module currents (interleaved). The disturbance causedby the level change is attenuated due to the pre-control voltage commanddescribed in Fig. 7. (c) M3TC voltage VM3TC and converter output voltage Vc.

high dynamic performance. The module currents during thesetransients are interleaved, as shown in Fig. 12(b), and the loadcurrent ripple remains low due to the phase-shifting controllerdescribed in Fig. 8. As can be seen in the detailed transientin Fig. 12(a), despite the level change of the M3TC thatcauses the voltage Vc to collapse, the converter currents areonly slightly disturbed due to the feed-forward of the voltageVprecontrol, shown in Fig. 7.

Fig. 12(c) shows the output voltage of the M3TC VM3TCand the corresponding converter output voltage Vc. The controlof the M3TC follows the state machine described in Fig. 9,as its output voltage is changing with a step of 0.5Vst. It isworth noting that the droop is compensated by a respectiveincrease of the voltage Vc, when the capacitors of the M3TCare discharging, as highlighted in Fig. 12(c).

B. Inductive Loads

In Fig. 13, the ability of the current source to drive highlyinductive loads with a high current gradient (i.e., septum

3390 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 46, NO. 10, OCTOBER 2018

Fig. 13. Transient response of the current source driving an inductiveload 20 m�–100 μH. (a) Reference current (black) and load current wave-form (gray). The hysteresis controller is used in transients and along withthe M3TC voltage generates a current gradient of 76 A/μs on the load.(b) M3TC voltage VM3TC. When the reference change takes place, the M3TCstate machine jumps to Vpreset (here 9.35 kV).

Fig. 14. Steady-state performance of the current source driving an inductiveload 20 m�–100 μH. (a) Reference current (black), load current (dark gray),and converter current (light gray). (b) Individual module currents (interleaved)as seen by the control unit. The distortion is a result of the common couplingbetween the different phases and the effect of the finite current sensorbandwidth and finite ADC precision.

magnets) is demonstrated. Once the pulse reference is given,the M3TC state machine jumps to Vpreset, which is in thiscase 9.35 kV is the maximum output voltage of the M3TC,

Fig. 15. Simulation results for a dc arc implemented as a fluctuating resis-tance value: (a) Total output current waveform. The output current remainswithin ±10% of its target value. (b) M3TC voltage VM3TC. (c) Simulated dcarc voltage (measurement conducted at the High Voltage Laboratory at ETHZurich [17]).

as highlighted in Fig. 9. At the same time, the current-shapingconverter switches to hysteretic mode in order to generate themaximum possible di/dt . As shown in Fig. 13(a), once thecurrent is approximately settled, the M3TC stages are turnedOFF and the current gradient is slowed down in order to avoida high overshoot in the current. The transient performancegraph of Fig. 13(a) shows the overshoot of the current, whichis less than 1%. During the transient, the individual modulecurrents of the current-shaping converter are not interleaved,and therefore, the ripple is higher. In fact, the ripple in thehysteretic cycles is caused due to the nonoptimal interleaving.More details about the performance of the advanced hybridcontrol can be found in [21]. Nevertheless, once the referencehas settled, the controller returns to PI control mode and thephase-shifting controller returns the module currents to theiroptimal positions as shown in Fig. 8.

In addition, Fig. 14 illustrates the steady-state perfor-mance of the current source, when driving a highly inductive

TSOLARIDIS AND BIELA: FLEXIBLE, HIGHLY DYNAMIC, AND PRECISE 30-kA ARBITRARY CURRENT SOURCE 3391

Fig. 16. Simulation results for a dc arc implemented as a fluctuatingvariable voltage source. The need for staircase current waveforms is explainedin [11]: (a) Staircase output current waveform. Fast current pulses are gener-ated while the fluctuations of the output voltage cause a relatively high currentripple. (b) M3TC voltage VM3TC. (c) Simulated dc arc voltage (measurementconducted at the High Voltage Laboratory at ETH Zurich [17]).

load. In Fig. 14(b), it can be seen that in steady state,the module currents are fully interleaved, resulting in aconverter current icon, with minimum ripple and high effec-tive switching frequency (six times higher than the moduleswitching frequency). The additional filter stage at the outputof the current source, shown in Fig. 1, further attenuatesthe converter current ripple. The peak-to-peak ripple of loadcurrent iload is in this case smaller than 100 ppm. It shouldbe highlighted that further oscillations are caused due to theaction of the PI controller and the nonidealities of the controlsystem (e.g., quantization errors, filter delays). However,as illustrated in Fig. 14, the load current remains well withinthe ±100-ppm bands.

C. Fluctuating Dynamic Loads

Fig. 15 shows the ability of the current source to drivehighly fluctuating loads such as the plasma in an operating

HVDC circuit breaker. The load voltage as a function of timeis depicted in Fig. 15(c) and is deduced from measurementsof a dc arc performed at the High Voltage Laboratory atETH Zurich [17]. In this case, a reference pulsed currentof 1 kA is given and the control system generates a currentgradient of approximately 20 A/μs by using the hystereticmode. During flat top, the chaotic behavior of the load causesthe voltage of the load to oscillate resulting in oscillations ofthe output current and a high output current ripple. However,as highlighted in Fig. 15(a), the current remains within ±10%of its reference value. It is also evident that as soon as theoutput current exceeds the threshold value, the hysteretic modeis enabled and the limits of the hysteretic band act as an over-current protection.

In [11], the need for arbitrary current waveforms includingstaircase waveforms in order to study the step response prop-erties of the dc arc has been noted. Likewise, Fig. 16 showsthe performance of the current source while generating astaircase current waveform in a highly fluctuating load. Theload in this case is simulated as a variable voltage sourcebased on arc measurements performed at the High VoltageLaboratory at ETH Zurich. The simulated voltage waveformas a function of time can be seen in Fig. 16(c). The high-frequency, high-amplitude fluctuations result again in a highcurrent ripple. However, the combination of the robust design,with high module inductances and near-optimal control, resultsin a current that remains within the specified ±10% limitsduring flat-top operation and does not result in over-currentsthat could potentially harm the converter system and triggerthe protection systems. At the same time, the needed dynamicperformance is met as shown in the zoomed-in version of thetransient in Fig. 16(a).

VI. CONCLUSION

In this paper, a flexible, highly dynamic, and ultralow ripplearbitrary current source is presented. The output current ofthe source can be increased by increasing the number ofstacks up to 30 kA and its output voltage can be increased byincreasing the number of M3TC stages up to 10 kV. The highmodularity of the topology makes it an attractive candidate ina wide range of applications including driving HVDC circuitbreakers or inductive loads in accelerators and fusion reactors.Moreover, the combination of an analytical design procedureand a near-optimal control has enabled the use of the fullpotential of the topology.

Detailed simulation results have shown that the currentsource is able to fulfill the high current gradient requirementsduring transient operation, the low ripple and high precisionrequirements during the steady state and the stability require-ments during abrupt load changes. The simulations have shownthe ability of the current source under different operatingscenarios, with several loads using realistic control parameters,including component nonidealities and parasitic components.The results have verified that the current source is able todrive highly fluctuating loads (e.g., dc arcs) while providingthe necessary high dynamic.

Finally, the hardware prototype of the designed system iscurrently under development at the Laboratory for High Power

3392 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 46, NO. 10, OCTOBER 2018

Electronics, ETH Zurich and experimental results are expectedto be published in upcoming publications.

ACKNOWLEDGMENT

The authors would like to thank the Ampegon AG fortheir support and the High Voltage Laboratory, ETH Zurich,for providing the measurement data. This paper is a part ofthe activities of the Swiss Centre for Competence in EnergyResearch on the Future Swiss Electrical Infrastructure.

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Georgios Tsolaridis (S’17) received the Diplomadegree in electrical and computer engineering fromthe Aristotle University of Thessaloniki, Thessa-loniki, Greece, in 2014, and the master’s degree inpower electronics and drives from Aalborg Univer-sity, Aalborg, Denmark, in 2016. He is currentlypursuing the Ph.D. degree with the Laboratoryfor High Power Electronics, ETH Zurich, Zürich,Switzerland.

During his studies, he was a Research Intern withthe ABB Research Center, Vasteras, Sweden. His

current research interests include design, optimization, and control of highlydynamic and high output power current source converters for continuous andpulsed power applications.

Juergen Biela (S’04–M’06–SM’16) received theDiploma degree (Hons.) from Friedrich-AlexanderUniversitat Erlangen-Nürnberg, Nuremberg,Germany, in 1999, and the Ph.D. degree from thePower Electronic Systems Laboratory, ETH Zurich,Zürich, Switzerland, in 2006, with a focus onoptimized electromagnetically integrated resonantconverters.

In 2000, he joined the Research Department,Siemens A&D, Erlangen, Germany, where he hasbeen involved in inverters with very high switching

frequencies, SiC components, and electromagnetic compatibility. From2006 to 2007, he was a Post-Doctoral Fellow with the Power ElectronicSystems Laboratory, ETH Zurich, and a Guest Researcher with the TokyoInstitute of Technology, Tokyo, Japan. From 2007 to 2010, he was a SeniorResearch Associate with the Power Electronic Systems Laboratory. Since2010, he has been an Associate Professor of High-Power Electronic Systemswith ETH Zurich. His current research interests include the design, modeling,and optimization of PFC, dc–dc, and multilevel converters with an emphasison passive components, the design of pulsed-power systems, and powerelectronic systems for the future energy distribution.