Flash Qing Xu Tie Chen. Flash An electronic device Non-volatile Can be electrically erased and...
-
Upload
jada-small -
Category
Documents
-
view
213 -
download
0
Transcript of Flash Qing Xu Tie Chen. Flash An electronic device Non-volatile Can be electrically erased and...
Flash
Qing XuTie Chen
Flash
An electronic deviceNon-volatileCan be electrically erased and reprogrammed
Usage:Digital Music DeviceSmartphonesDigital CamerasRemovable Storage Devices
(picpedia.com)
Non-Volatile Memory
Non-Volatile Memory in Embedded System:• Stores data after power down– Battery Change– Consumer Electronics
FlashNon-Volatile Memory• Read-Only: ROM• Read-Write: EPROM, E2PROM, FLASH
(Figure Credit: Prof. Dennis Sylvester)
Flash• Flash Development vs. Moore’s Law
(Figure Credit: H. Cho, Stanford University)
MOSFET
How does a MOSFET transistor work?
(Wikipedia - Threshold formation in MOSFET)
Flash
How is Flash different from MOSFET?
(Figure Credit: Prof. Grishman, CSCI Inc.)
Flash Operations
Writes a Logic ZEROWrites a Logic ONE
(Figure Credit: S. Verna, Stanford University)
Flash Wearing
Erosion of a flash memory• Programming and erasing breaks down the oxide layer in the
transistor.• Life of 100,000 Program/Erase cycles
(Figure Credit: Prof. Li-Ping Zhang)
Flash Wearing
Flash Memory Controller• Arrange data so that programming/ erasing is distributed
evenly• A block of extended life memory is allocated for the
controller, stores operation data.
Flash Wear Leveling Algorithm:• Dynamic• Static
Flash Wear Leveling
Dynamic Wear Leveling: - Controller selects new free data block before write - Mapping points to new block location after write
Disadvantage: - Static blocks where data do not change (eg. OS file) wears slower than other blocks- Reduce lifespan of the flash drive
Flash Wear Leveling
Static Wear Leveling: - Works the same as dynamic wear leveling- Static blocks that do not change are periodically moved
Disadvantage:- Moving static blocks takes time
Flash Wear Leveling
Dynamic vs. Static
What to use? Use Both!
Static Dynamic
Performance Slower Faster
Complexity More Complex Less Complex
Endurance Longer Shorter
Introduction to AT45DB161D
Important Facts
• 4,096 Pages (512/528 Bytes/Page) Main Memory (2MB in total)
• Single 2.5V - 3.6V or 2.7V - 3.6V Supply• SPI Serial Port Interface– Mode 0 and Mode 3 compatible
• Two SRAM Data Buffers (512/528 Bytes)• 100,000 Program/Erase Cycles Per Page
Minimum
Block Diagram
(Figure Credit: AT45DB161D Datasheet)
Pin ConfigurationSymbol Function Asserted State Type
CSn Chip Select Low Input
SCK Serial Clock - Input
SI Serial Input - Input
SO Serial Output - Output
WPn Write protection Low Input
RESETn Reset Low Input
RDY/BUSYn Ready/Busy Low Output
VCC Device Power Supply - Power
GND Ground - Ground
SPI Interface• A valid instruction starts with the falling edge of CS
followed by the appropriate 8-bit opcode and the desired buffer or main memory address location.
Read Operations
• Main Memory Page Read
• Buffer Read
• Main Memory Page to Buffer Transfer
(Figure Credit: AT45DB161D Datasheet)
Write Operations
• Buffer Write
• Buffer to Main Memory Page Program
(Figure Credit: AT45DB161D Datasheet)
Erase Operations
• Page Erase (528/512 bytes)• Block Erase (8 pages)• Sector Erase (256 pages)• Chip Erase (all 16 sectors, which is 2MB)
Modifying Data in Flash
(Figure Credit: AT45DB161D Datasheet)
Why do We need Buffers?
Because it saves us a lot of trouble!• The minimum size of erase/programming is
one page.• You will have to send exactly one page data
through SPI for every write operation without buffers.
• You may have to first send back one page data from flash even before that!
Timing Issues
• Erase and Program time• Flash output delay• Setup time, hold time of
all serial port…
You are able to find timing diagrams and characteristic tables in datasheet.
(Figure Credit: AT45DB161D Datasheet)
Power Issues• 7 mA Active Read
Current Typical• 12 mA Active
Program/Erase Current Typical
• 25 μA Standby Current Typical
• 9 μA Deep Power Down Typical
(Figure Credit: AT45DB161D Datasheet)
Other Features
• Software Sector Protection• Sector Lockdown• Status Register• Security Register• Deep Power-down and Resume• Page Size Option
Reference• http://www.eeherald.com/section/design-guide/esmod16.html• http://
digitalelectronics.blogspot.com/2009/10/flash-memroies-introduction.html
• http://picpedia.com/flash-memory-cards• S. Verma, “Tunnel Barrier Engineering for Flash Memory Technology”,
Stanford University, May 2010• H. Cho, “Low Power, Highly Scalable, Vertical Flash Memory Cell and
MOSFET”, Stanford University, Sept 2007• ATMEL, AT45DB161D 16-megabit DataFlash Specification• L.P. Zhang, “Low Cost Wearing Algorithm for Block Mapping Solid State
Disks”, National Chiao Tung University, Taiwan‐
Questions?