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Five-level inverter voltage-space phasor generationfor an open-end winding induction motor drive

M.R. Baiju, K. Gopakumar, K.K. Mohapatra, V.T. Somasekhar and L. Umanand

Abstract:  A topology for voltage-space phasor generation equivalent to a five-level inverter for anopen-end winding induction motor is presented. The open-end winding induction motor is fedfrom both ends by two three-level inverters. The three-level inverters are realised by cascading twotwo-level inverters. This inverter scheme does not experience neutral-point fluctuations. Of the twothree-level inverters only one will be switching at any instant in the lower speed ranges. In themultilevel carrier-based SPWM used for the proposed drive, a progressive discrete DC biasdepending on the speed range is given to the reference wave to reduce the inverter switchings. Thedrive is implemented and tested with a 1 HP open-end winding induction motor and experimentalresults are presented.

1 Introduction

Multilevel converters can produce an output voltagewaveform having a large number of steps with lowharmonic distortion [1, 2]. They can also reduce the stresson the switching devices as higher levels are synthesisedfrom voltage sources with lower levels. These features havemade them suitable for application in large and mediuminduction motor drives. There are three main topologies of multilevel inverters relevant for large induction motor driveapplications: the extended neutral-point clamped inverters,series-connected H-bridge inverters, and dual-inverter-fedopen-end winding induction motor drives.

The extended neutral-point clamped inverters experienceneutral-point fluctuations as the DC-link capacitors have tocarry the load current   [3]. The series-connected H-bridgetopology of multilevel inverters has been suggested forinduction motor drives and it requires separate DC supplyfor all three phases, which increases the power circuitcomplexity. A five-level inverter structure using the H-bridge topology will require totally six power supplies  [4].

Feeding the open-end winding induction motor fromboth ends also results in a multilevel structure [5, 6]. In [5], aphase-shifted sine–triangle PWM is used for the multilevelvoltage generation for the open-end winding inductionmotor drive, and in   [6]   a space-vector-based PWMapproach is explained for three-level voltage-space phasor

generation for an open-end winding induction motor drive.The open-end winding structure is realised by opening theneutral-point of the conventional squirrel cage inductionmotor. The open-end winding induction motor is then fedby two inverters from the two the ends of the winding. Thistechnique has been used to implement a four-level inverterusing two two-level inverters with asymmetric DC links  [7].

In the present work, a multilevel voltage-space phasorgeneration, equivalent to a conventional five-level inverter is

presented for an open-end winding induction motor driveusing two three-level inverters. The three-level topologyused is realised by cascading two two-level inverters. Thisfive-level inverter does not experience neutral point fluctua-tion and uses a lesser number of DC sources compared tothe series-connected H-bridge topology. In the multilevelcarrier-based PWM implemented for the drive a progressivediscrete DC bias is given to the reference wave dependingon the speed range, resulting in reduced switching losses andin reduced switchings of the inverter.

2 Proposed inverter structure

The structure of the proposed drive with open-end windinginduction motor is shown in Fig. 1. The induction motor isfed by two three-level inverters, inverter A and inverter B.These three-level inverters are realised by cascading twotwo-level inverters. Inverter A is formed by cascading two-level inverters INV 1 and INV 2 and inverter B is formed bycascading two-level inverters INV3 and INV4. All four two-level inverters have a separate DC supply of  V dc/4 where V dcis the DC-link voltage of the conventional two-level inverterfed induction motor drive.

2.1 Operation of three-level inverter 

The pole voltages   v A2O,   v B2O   and  vC 2O   of inverter A canrealise three levels 0,  V dc/4 and  V dc/2. Inverter B is also athree-level inverter and its pole voltages with respect to thepoint O0   (v A4O0 ,   v B4O0   and   vC 4O0 ) can also independentlyrealise the three levels of 0,   V dc/4 and   V dc/2. When thesethree-level inverters drive the induction motor from bothsides, each phase of the induction motor can attain fivedifferent levels. To find the equivalent levels when invertersA and B are switched independently, we assume that thepoints O and O0  are connected. The phase voltages are thengiven by

v A2 A4 ¼ v A2O v A4O0   ð1Þ

v B2 B4 ¼ v B2O v B4O0   ð2ÞvC 2C 4 ¼ vC 2O vC 4O0   ð3ÞThe authors are with the Centre for Electronics Design and Technology, Indian

Institute of Science, India 560012

r IEE, 2003

IEE Proceedings online no. 20030659

doi:10.1049/ip-epa:20030659

Paper first received 6th November 2002 and in revised form 13th May 2003.Originally published online: 24th July 2003

IEE Proc.-Electr. Power Appl., Vol. 150, No. 5, September 2003   531

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The five levels generated in the A-phase when inverters Aand B are switched with different pole voltage levels areshown in Table 1. The first two levels V dc/2 and V dc/4(L1, L2) are obtained when inverter A is clamped to zeroand while inverter B is switched between  V dc/2 and  V dc/4.Hence at the lower speed range only inverter B will beswitching. These levels in any phase can be attained byturning on a combination of switches in inverter A andinverter B. Table 2 shows the switches to be turned on torealise levels in the A-phase winding. Whenever the bottomswitch in any leg of the bottom inverter is ‘on’, the topswitch in the same leg of the top inverter is kept ‘off’ so thatit has to block only the DC-link voltage of   V dc/4. The

conditions to be forced on the top switches of the invertersto realise these levels are shown in the Table 3. The state of the bottom switch is complimentary to the condition of thetop switch in the same leg. The bottom switches of thebottom inverters INV2 and INV4 have to be rated forV dc/2, as they will have to block V dc/2 when the top switchesof INV1 and INV3 are ‘on’.

This five-level topology does not need theclamping diodes as in the case of neutral-point-clampedinverters. The DC-link capacitors do not carry the loadcurrent and hence the neutral-point fluctuations are absent.When compared with the series-connected H-bridge, it usesthe same number of switching devices but employs fewer

Table 1: Levels realised in A-phase for combinations of polevoltages of inverter A and inverter B

Pole voltage of 

inverter A v A2O 

Pole voltage of 

inverter B  v A4O 

Voltage level in

A-phase winding

Level

0   V dc  /2   V dc  /2 L1

0   V dc  /4   V dc  /4 L2

0 0 0 L3

V dc  /4 0   V dc  /4 L4

V dc  /2 0   V dc  /2 L5

Fig. 1   Structure of the five-level inverter: two three-level inverters feeding induction motor from both ends

Table 2: Switching strategy to realise five levels shown for one pole (A-phase)

Levels in A-phase winding

of 5-level inverter

Switches to be made ‘on’ in A-phase legs (when top switch of leg is ‘on’ the bottom switch is ‘off’)

INV 1 INV 2 INV 3 INV 4

L1   V dc  /2 S14 (bottom) S24 (bottom) S31(top) S41 (top)

L2   V dc  /4 S14 (bottom) S24 (bottom) S34 (bottom) S41 (top)

L3 0 S14 (bottom) S24 (bottom) S34 (bottom) S44 (bottom)

L4   V dc  /4 S14 (bottom) S21 (top) S34 (bottom) S44 (bottom)

L5   V dc  /2 S11 (top) S21 (top) S34 (bottom) S44 (bottom)

Table 3: Status of top switches of two-level inverters forA-phase

Level of 5-level

inverter for

A-phase leg

Status of top switches of 2-level inverters

(bottom switches condition are complementary)

INV 1

(S11)

INV 2

(S21)

INV 3

(S31)

INV 4

(S41)

V dc  /2 off off on on

V dc  /4 off off off on

0 off off off off  

V dc  /4 off on off off 

V dc  /2 on on off off 

532   IEE Proc.-Electr. Power Appl., Vol. 150, No. 5, September 2003

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DC sources, as the H-bridge topology will need six DCsupplies.

3 Voltage space phasors of proposed scheme

The combined effect of the three voltages in the three 1201-separated phase windings of the induction motor at anyinstant could be represented by an equivalent vector inspace  V 

s given by

V s

 ¼v A2 A4

þv B2 B4:e

 jð2p=3Þ

þvC 2C 4:e

 jð4p=3Þ

  ð4

ÞSubstituting expressions for the phase voltages as given in(1) to (3) in (4) gives

V s ¼ðv A2O v A4O0Þ þ ðv B2O v B4O0Þ:e jð2p=3Þ

þ ðvC 2O V  C 4O0Þ:e jð4p=3Þ   ð5ÞThis equivalent vector can be determined by resolving thephase voltages along two mutually perpendicular axes, the aand b  axes, of which  a   is along the A-phase (Fig. 2). The

space vector is then given by

V s ¼ V   sðaÞ þ jV   sðbÞ   ð6Þwhere V   sðaÞ  is the sum of all components of  v A2 A4, v B2 B4 and

vC 2C 4   along the   a-axis and   V   sðbÞ   is the sum of the

components of  v B2 B4   and vC 2C 4  along the  b-axis.

V   sðaÞ ¼ v A2 A4 þ v B2 B4ðaÞ þ V  C 2C 4ðaÞ   ð7Þ

V   sðbÞ ¼ v B2 B4ðbÞ þ V  C 2C 4ðbÞ   ð8Þ

V   sðaÞ

V   sðbÞ

" #¼

1  1

2

1

2

0

 ffiffiffi3

p 

2

 ffiffiffi

3p 

2

2664

3775

v A2 A4

v B2 B4

vC 2C 4

264

375 ð9Þ

Substituting expressions for the phase voltages as given in(1) to (3) in the above equation gives

V   sðaÞ

V   sðbÞ

264 375 ¼1

  1

2

1

2

0

 ffiffiffi3

p 

2

 ffiffiffi3

p 

2

2664 3775v A2O

v A4O0

v B2O v B4O0

vC 2O vC 4O0

264 375 ð10Þ

The two three-level inverters can take the three levels of polevoltages independently in any three phases depending onthe condition of the inverter switches, as decided by themodulation scheme. For each of the different combinationsof their pole voltages, the equivalent voltage space phasorV s   can be determined using (10) along with (6). Thespace phasors for all possible combinations of thepole voltages of the two three-level inverters will occupydifferent locations, as in Fig. 3. There are totally 61locations forming 96 sectors and this structure is identicalto that of a conventional five-level inverter. The maximumamplitude of the space phasor generated can be verified tobe V dc.

Fig. 2   Determination of equivalent space vector from phasevoltages

Fig. 3   Space phasor locations for five-level inverter

IEE Proc.-Electr. Power Appl., Vol. 150, No. 5, September 2003   533

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3.1 Effect of common-mode voltage in space phasor locations In the foregoing analysis we have assumed that the points Oand O0  are connected. If these points are isolated, as in theproposed scheme, the actual phase voltages are

v A2 A4 ¼ v A2O v A4O0  vO0O   ð11Þ

v B2 B4 ¼ v B2O v B4O0  vO0O   ð12Þ

vC 2C 4 ¼ vC 2O vC 4O0  vO0O   ð13ÞV  O0O corresponds to the common-mode voltage present in

this balanced three-phase system and is given by

vO0O ¼ 1

3ðv A2O þ v B2O þ vC 2OÞ

1

3ðv A4O0 þ v B4O0 þ vC 4O0Þ ð14Þ

Substituting these expressions for the phase voltage in (4)

V  s

 ¼ðv A2O

v A4O0

 vO0O

Þ þ ðv B2O

v B4O0

 vO0O

Þ:e jð2p=3Þ

þ ðvC 2O vC 4O0  vO0OÞ:e jð4p=3Þ

¼ðv A2O v A4O0Þ þ ðv B2O v B4O0Þ:e jð2p=3Þ

þ ðvC 2O vC 4O0Þ:e jð4p=3Þ ðvO0O þ vO0Oe jð2p=3Þ

þ vO0O0 :e jð4p=3ÞÞIn this equation

ðvO0O þ vO0Oe

 j

ð2p=3

Þ þ vO0O0 :e

 j

ð4p=3

ÞÞ¼ vO0O 1

2vO0O 1

2vO0O

¼ 0

and the equation then reduces to

V s ¼ðv A2O v A4O0Þ þ ðv B2O v B4O0Þ:e jð2p=3Þ

þ ðvC 2O V  C 4O0Þ:e jð4p=3Þ

This equation is the same as that derived earlier (5),

assuming that points O and O0  were connected. Hence theabove analysis shows that the common-mode voltagepresent between points O and O0   does not change thespace phasor locations. This common-mode voltage willresult only in the multiplicity of space phasors in differentlocations, and the system with isolated O and O0   pointsgenerates the same voltage-space phasors.

4 Modulation scheme for proposed inverter

A multilevel-carrier-based PWM is used for the proposedinverter scheme. The multilevel-carrier-based PWM for anN -level inverter uses a set of   N 1 adjacent, level-shiftedtriangular carrier waves with the same peak-to-peak

amplitude V  c  and the same frequency f c  [8]. If the referencewave has peak amplitude   V   m   and frequency   f m   themodulation index is defined with reference to a triangular

wave of peak-to-peak amplitude of  V  cð N   1Þ  as

ma ¼   2V   mV  cð N   1Þ   ð15Þ

The other parameter of multilevel-carrier-based SPWM isthe ratio  mf  ¼ f c=f m  which should be kept high to keepthe harmonics to the higher end. For the five-level inverter,four triangular waves divide the whole modulating voltagelevel into five regions   R1 – R5.   R1   is the region below thelowest carrier C 1, R2  is the region between  C 1 and C 2, R3

between C 2 and C 3, R4 between C 3 and C 4 and R5  aboveC 4. When the modulating signal is in a particular region thecorresponding voltage level is applied across the phasewinding, assigned as follows:

 R1 ) V  dc

2  ;   R2 ) V  dc

4  ;   R3 ) 0;

 R4 ) V  dc

4  ;   R5 ) V  dc

2  ð16Þ

Three 1201   phase-shifted sinusoids with 20% thirdharmonic content are used as the reference waves forthe proposed carrier-based SPWM. The addition of thethird harmonic content increases the maximum fundamen-tal voltage amplitude that can be generated using theSPWM scheme   [9]. For low modulation index suchthat   V   0m  V  c=2, where   V   0m   is the peak value of themodulating signal, in conventional SPWM the referencewaves are placed at the centre of the carrier set(Fig. 4a). This will result in a three-level operation as themodulating signal at different instants could be in  R4,  R3

or   R2   and both the two-level inverters constitutinginverter B (INV3 and INV4) switch to realise these three-levels. In the present work, for this range of modulationindex, the reference wave is centered at the middle of thelowermost carrier as in Fig. 4b. It will result in only twolevels  L1 ðV  dc=2Þ   and L2 ðV  dc=4Þ  and switching lossesare due to only INV3. When the modulation index increasessuch that   V  c=2 V   0m  V  c, the reference wave in theproposed work is given an additional DC bias of   V  c=2such that it is in the middle of these two carriers andresulting in three-level operation (Fig. 4c). A similarcondition in conventional SPWM also results in the three-level operation, as seen in Fig 4d , but the reference wavesare placed at the centre of the carrier set. When

V  c  V   0m  3V  c=2, the modulating wave is shifted to placeit at the centre of the three lower carriers (Fig. 4e). This willresult in a four-level operation with INV2, INV3 and INV4switching. In conventional SPWM, since the referencewaves are placed at the centre of the carrier set (Fig. 4 f ), thiscondition will result in a five-level operation and all the two-level inverters would have switched. When the modulationindex increases such that V   0m  3V  c=2, the reference wave isshifted to be positioned at the centre of the carrier set as inFig. 4h.

Hence in the proposed SPWM scheme, aprogressive DC bias of   nV  c=2 with respect to thebottom point of the lowest carrier is given to thereference waves, where   n   takes the value from 1 to 4depending on the range in which the peak amplitude of themodulating signal falls. The equations for the referencewaves used in the proposed SPWM scheme for the present

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work are given by

V   a ¼ V  m sinot þ 0:2V  m sin 3ot þ nV  c

2  ð17Þ

V   b ¼ V  m sin   ot  2p

3

þ 0:2V  m sin 3ot þ n

V  c

2  ð18Þ

V   c ¼

V  m   sin   ot 

4p

3 þ

0:2V  m sin 3ot 

þnV  c

2   ð19

ÞWhen this scheme is employed for variable

frequency operation, for the lowest speed range only

INV3 will be switching (two-level mode); in next rangeonly INV3 and INV4 (three-level mode), and in thepenultimate range INV2, INV3 and INV4 (four-levelmode) will be switching. If conventional SPWMwas used at the two lower speed ranges, INV3 and INV4have to be switched (as the inverter is in three-levelmode for these ranges) and in the two upper speed rangesall the inverters have to switch, as the inverter is in the five-level mode for these speed ranges. When the motoraccelerates to the rated speed, this modified PWM willtake the motor through two, three, four and five-leveloperation whereas conventional PWM will result only in

Fig. 4a  Reference wave for conventional SPWM during two-level operation

b  Reference wave for the proposed SPWM during two-level operation

c  Reference wave for the proposed SPWM during three-level operation

d  Reference wave for conventional SPWM during three-level operation

e  Reference wave for the proposed SPWM during four-level operation

 f  Reference wave for conventional SPWM during four-level operation

g  Maximum reference wave during five-level operation

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three-level and five-level operation. Therefore this modifiedmethod of progressive discrete shifting of the modulatingsignal results in a reduced switching loss in the lower speedranges.

5 Experimental results

The proposed dual inverter is implemented and tested witha 1.5kW open-end winding induction motor. The open-loop v/f controller based on multilevel-carrier-based SPWM

is implemented on a TMS320F240 digital signal processorplatform. The ratio of carrier frequency to modulatingsignal frequency is 45 for all ranges of operation.Experiments are done by running the four invertersINV1, INV2, INV3, and INV4 with 100 V ðV  dc=4Þ  so thatthe equivalent DC-link voltage is 400V. Figure 5a  showsthe motor phase voltage ðv A2 A4Þ   in the lowest speed rangewhere the inverter is operating in the two-level mode. In thiscase, inverter B is switching in the two-level mode betweenV  dc=2 (200V) and V  dc=4 (100 V) as seen in the pole voltagewaveform v A4O0  (Fig. 5b), and inverter A is clamped to zero.Figure 6a shows the motor phase voltage in the next speedrange and inverter B is now in the three-level mode,switching between 0,   V  dc=4 (100V) and   V  dc=2 (200V) asseen from the pole voltage (Fig. 6b) whereas inverter A isstill clamped to zero. Figure 7a   shows the motor phasevoltage in next speed range in four-level operation. Theinverter A is switching in the two-level mode between 0 andV  dc=4 (100V) (Fig. 7b), and inverter B is switching in thethree-level mode (Fig. 7c). Figure 8a shows the motor phasevoltage in the final speed range in five-level operation, asinverter A is switching in the three-level mode between 0,V  dc=4 (100V) and V  dc=2 (200 V) (Fig. 8b), and inverter B isswitching in the three-level mode (Fig. 8c). Pole voltages aretaken with reference to O or O0, points which are isolated.The pole voltage waveforms therefore were taken separatelyand hence do not show the phase relation between the two

pole voltages. The simulation result presented in Fig. 8d shows the phase relation of the pole voltages of theinverters. Figures 9a –9d  show the motor current at the fourspeed ranges. Figures 10a –10d  show the A-phase referencewaveforms and the corresponding levels generated by thecontroller (taken as DAC outputs from the DSP controller)during different speed ranges. Figures 11a –11d . show the

triplen content , VO0O  (measured between O and O0  pointsin Fig. 1), in each level operation. Figure 12 shows theharmonic spectrum of the machine phase voltage at the five-level operation.

Fig. 5

a  Motor phase voltage during two-level operationx-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

b  Pole voltage of inverter B (two-level operation)

x-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

Fig. 6a  Motor phase voltage during three-level operation

x-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

b  Pole voltage of inverter B (three-level operation)

x-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

Fig. 7a  Motor phase voltage during four-level operation

x-axis 1 div¼ 5ms;  y-axis 1 div¼ 100V

b  Pole voltage of inverter A (four-level operation)

x-axis 1 div¼ 5ms;  y-axis 1 div¼ 100V

c  Pole voltage of inverter B (four-level operation)

x-axis 1 div¼ 5ms;  y-axis 1 div¼ 100V

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6 Conclusions

An open-end winding induction motor drive, where theinduction motor is fed by two three-level inverters fromboth ends, results in voltage-space phasors identical to afive-level inverter. The three-level inverters used are realisedby cascading two two-level inverters. This structure does notrequire the neutral clamping diodes and can be easilyrealised using conventional two-level power circuits. Whencompared with the series connected H-bridge, the proposed

five-level inverter scheme uses the same number of switchingdevices but employs fewer DC sources as the H-bridgetopology will need six DC supplies. The proposed inverterdoes not experience neutral-point fluctuation and the DC-link capacitors carry only the ripple current as isolated DCsupplies are used for all the DC links. In the lower speedranges, one of the inverters is switching while the otherinverter is clamped to zero. Multilevel-carrier-based SPWM,

where a progressive discrete DC shift is added to thereference wave depending on the speed range, allowingoperation in all levels including even-numbered levels, isemployed for the proposed work.

7 References

1 Nabae, A., Takahashi, I., and Akagi, H.: ‘A new neutral-point-clampedPWM inverter’, IEEE Trans. Ind. Appl., 1981,  17, (5), pp. 518–523

2 Bhagawat, P.M., and Stefanovic, V.R.: ‘Generalized structure of amultilevel PWM inverter’,  IEEE Trans. Ind. Appl., 1983,   19, (6), pp.1057–1069

3 Menzies, R.W., Steimer, P., and Steinke, J.K.: ‘Five-level GTOinverters for large induction motor drives’. Proc. IEEE Ind. Appl.Soc. Annual Meeting, Toronto, 2–8 October 1993, pp. 595–601

4 Manjrekar, M.D., and Lipo, T.A.: ‘A hybrid multilevel invertertopology for drive applications’. Proc. 13th IEEE Conf. on Appliedpower electronics (APEC), California, Feb 1998, pp. 523–529

Fig. 8a  Motor phase voltage during five-level operation

x-axis 1 div¼ 5ms; y-axis 1 div¼ 100V

b  Pole voltage of inverter A (five-level operation)

x-axis 1 div¼ 5ms; y-axis 1 div¼ 100V

c  Pole voltage of inverter B (five-level operation)

x-axis 1 div¼ 5ms; y-axis 1 div¼ 100V

d  Pole voltages of inverters A and B (five-level operation): simulation

results(i) Inverter A

(ii) Inverter B

Fig. 9a  Motor phase current during two-level operation

x-axis 1 div¼ 20ms; y-axis 1 div¼ 1 A

b  Motor phase current during three-level operation

x-axis 1 div¼ 10ms; y-axis 1 div¼ 1 A

c  Motor phase current during four-level operation

x-axis 1 div

¼10ms; y-axis 1 div

¼1 A

d  Motor phase current during five-level operationx-axis 1 div¼ 5ms;  y-axis 1 div¼ 1 A

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5 Stemmler, H., and Guggenbach, P.: ‘Configurations of high-powervoltage-source inverter drives’. Proc. EPE Conf., Brighton, UK, 13–16September 1993, pp. 7–12

6 Shivakumar, E.G., Gopakumar, K., and Ranganathan, V.T.:‘Space vector PWM control of dual inverter-fed open-endwinding induction motor drive’,  EPE J., 2002,  12, (1), pp. 9–18

7 Shivakumar, E.G., Somasekhar, V.T., Mohapatra, K.K., Gopakumar,K., and Umanand, L.: ‘A multilevel space-phasor based PWM strategyfor an open – end winding induction motor drive using two inverterswith different DC-link voltages’. Proc. IEEE Conf. PEDS, Bali,Indonesia, 22–25 October 2001, pp. 169–175

8 Carrara, G., Gardella, S.G., Marchesoni, M., Salutary, R., and Sciutto,G.: ‘A new multilevel PWM method: a theoretical analysis’,   IEEE Trans. Power Electron., 1992,  7, (3), pp. 497–505

9 Holmes, D.G.: ‘The significance of zero space vector placement forcarrier-based PWM schemes’,  IEEE Trans. Ind. Appl., 1996,   32, (5),pp. 1122–1129

8 Appendix

8.1 Motor specification 

1.5kW 400 V 50 Hz 4pole cage motorJ ¼ 0.0195 kgm2; Rs¼ 2.08ohm; Rr¼ 1.9 ohm; Lr¼ 0.28 H;M ¼ 0.272H;  Ls¼ 0.28H

Fig. 10a  A-phase reference wave and levels (two-level)

b  A-phase reference wave and levels (three-level)

c  A-phase reference wave and levels (four-level)d  A-phase reference wave and levels (five-level)

Fig. 11a   Triplen voltage  V  oo0   (two-level operation)

x-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

b   Triplen voltage  V  oo0   (three-level operation)

x-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

c   Triplen voltage  V  oo0   (four-level operation)x-axis 1 div¼ 10ms; y-axis 1 div¼ 100V

d   Triplen voltage  V  oo0   (five-level operation)

x-axis 1 div¼ 5ms;  y-axis 1 div¼ 200V

Fig. 12   Harmonic spectrum of machine voltage during five-level operation: experimental result

538   IEE Proc.-Electr. Power Appl., Vol. 150, No. 5, September 2003