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Automatic VHDL code generation for Fuzzy Logic system using FPGA

G.H.Raisoni Institute of Engineering and Technology,Pune

1

ABSTRACT

The project aims to design a Traffic Light Controller using VHDL and implement the

Traffic Light Controller in FPGA. The traffic in road crossings/junctions is controlled by

switching ON/OFF Red, Green & Amber lights in a particular sequence. The Traffic Light

Controller is designed to generate a sequence of digital data called switching sequences

that can be used to control the traffic lights of a junction.

16 bit microprocessor design in VHDL with implementation on FPGA provides

compact and robust solution for existing Traffic System. Mechanical traffic lights got

degrade after some time due to environmental factors which affects the delay. With

VHDL based traffic lights controller we can also control multiple locations at a same

time.





2

CHAPTER 1

INTRODUCTION

The monitoring and control of city traffic is becoming a major problem in many

countries. With the ever increasing number of vehicles on the road, the Traffic Monitoring

Authority or the Transport Ministry as the authority is known here in Malaysia has to find

new ways or measures of overcoming such a problem. The measures taken are

development of new roads and flyovers in the middle of the city; building of several ring

such as the inner ring road, middle ring road and outer ring road; introduction of city

trains such as the light rapid transit (LRT), and monorails; restricting of large vehicles inthe city during peak hours; and also development of sophisticated traffic monitoring and

control systems.

Fuzzy logic technology allows the implementation of real-life rules similar to the

way humans would think. For example, humans would think in the following way to

control traffic situation at a certain junction: ―if the traffic is heavier on the north or south

lanes and the traffic on the west or east lanes is less, then the traffic lights should stay

green longer for the north and south lanes‖. Such rules can now be easily accommodated

in the fuzzy logic controller. The beauty of fuzzy logic is that it allows fuzzy terms and

conditions such as ―heavy‖, ―less‖, and ―longer‖ to be quantized and understood by the

computer.

A large numbers of fuzzy control applications with the physical systems require a

real-time operation to interface high speed constraints; higher density programmable logic





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devices such as field programmable gate array (FPGA) can be used to integrate large

amounts of logic in a single IC.

The best part of using FPGA is we can easily reprogram it. We do not have need to

remove the FPGA from the hardware we can program it by placing it into the same board.

The motivation behind the implementation of a fuzzy controller in VHDL was driven

by the need for an inexpensive hardware implementation of a generic fuzzy controller for

use in industrial and commercial applications. A very simple fuzzy controller is used to

demonstrate this implementation. In the controller, an external device’s information, such

as that from a sensor, etc., is converted into an output control signal to drive a device(s)

such as motors,actuators etc., via the process of fuzzification, rule evaluation and

defuzzification . These processes are all based on a set of membership functions and the

details of this process can be found in numerous publications.





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CHAPTER 2

LITERATURE SURVEY

The traffic light controlling system was proposed in which the original relay

wiring was replaced by the program, and the hardware and software resources of

PLC were used reasonably.

The system simplified the communication between PLC and Host Computer .

But the algorithm was developed for coordinating adjacent traffic signals only

and wastage of time due to delay was another problem.

Using VHDL an algorithm was developed for coordinating adjacent traffic signals.

This technique uses sensors networks along with embedded system.

The Infrared Sensors are applied to detect vehicles is mounted on road.

But this technique was only for neighboring intersection.

CPLD based Traffic lights provide programmable accurate delay with preventive

measures from environmental hazards.

With VHDL based traffic lights controller we can also control multiple locations

at a same time.





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CHAPTER 3

FUZZY LOGIC

3.1 Evaluation Of Fuzzy Logic

In bivalent logic, BL, truth is bivalent, implying that every proposition, p, is either

true or false, with no degrees of truth allowed. In multivalent logic, ML, truth is a matter

of degree

In fuzzy logic, FL:

everything is, or is allowed to be, to be partial, i.e., a matter of degree

everything is, or is allowed to be, imprecise (approximate)

everything is, or is allowed to be, granular (linguistic)

everything is, or is allowed to be, perception based

Fuzzy logic is much more general than traditional logical systems. The greater

generality of fuzzy logic is needed to deal with complex problems in the realms of search,

question-answering decision and control. Fuzzy logic provides a foundation for the

development of new tools for dealing with natural languages and knowledge

representation. Among these tools are: Computing with Words (CW); PrecisiatedNatural

Language (PNL); Computational Theory of Perceptions (CTP); ProtoformTheory (PT);

Theory of Hierarchical Definability (THD); Perception-Based Probability Theory (PTp);

Unified Theory of Uncertainty (UTU).





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3.2 What Is Fuzzy Logic?

Fuzzy logic is very efficient technology to put engineering knowledge right into a

technical solution. Fuzzy logic refers to a logical system that generalizes the crisp true-or-

false concept to a matter of degree. Fuzzy logic provides the mechanism by which

numerical and linguistic information can be operated in a systematic manner.

Commercially, fuzzy logic has been used with great success to control machines &

consumer products. In the right applications fuzzy logic systems are simple to design &

can be implemented by non-specialists in control theory. Fuzzy logic is not the answer to

all technical problems where simplicity &speed of implementation is important then fuzzy

logic is the strong candidate.

Software implementation of fuzzy logic on general purpose computers cannot be

considered as a suitable design solution for this type of application, in such cases, design

specifications can be matched by specialized fuzzy processors. Higher density

programmable logic devices such as FPGA can be used to integrate large amounts of logic

in a single IC.

Fuzzy logic (FL) is aimed at a formalization of modes of reasoning which are

approximate rather than exact.

examples:

exact all men are mortal

Socrates is a manSocrates is mortal

Approximate most Swedes are tall

Magnus is a Swedeit is likely that Magnus is tall





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FL/L Logic (narrow sense FL)

Epistemic FL/E FL/S Set-theoretic

FL/R Relational

Fig 3.2.1.Principal aspects of fuzzy logic

F:Fuzziness/Fuzzification

G:Granularity/Granulation

F.G:F and G

The logical facet, FL/L, is focused on logical systems in which truth is a matter of

degree – a degree which is allowed to be a fuzzy set.The set-theoretic facet, FL/S, is

concerned, in the main, with the theory of fuzzy sets. Most of the mathematical literature

on fuzzy logic relates to FL/SThe relational facet, FL/R, is focused on fuzzy

dependencies, granulation, linguistic variables and fuzzy rule sets. Most practical

applications of fuzzy logic relate to FL/R.

The epistemic facet, FL/E, is concerned, in the main, with knowledge representation,

natural languages, semantics and expert systems. Probabilistic and possibilistic modes of

reasoning are a part of this facet as well as FL/L and FL/R

Fuzzy logic has been and still is, though to a lesser degree, an object of

controversy.For the most part, the controversies are rooted in misperceptions, especially a

misperception of the relation between fuzzy logic and probability theory,a source of

confusion is that the label ―fuzzy logic‖ is used in two different senses.

F GF.G





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(a) narrow sense: fuzzy logic is a logical system

(b) wide sense: fuzzy logic is coextensive with fuzzy set theory.

Today, the label ―fuzzy logic‖ (FL) is used for the most part in its wide sense .

3.3 Some Comments On Fuzzy Logic

R.E. KALMAN

Let me say quite categorically that there is no such thing as a fuzzy concept, We do

talk about fuzzy things but they are not scientific concepts. Some people in the past have

discovered certain interesting things, formulated their findings in a non-fuzzy way, and

therefore we have progressed in science.

3.4 Why Fuzzy Logic ?

In the evolution of science a time comes when alongside the brilliant successes of a

theory, T, what become visible are classes of problems which fall beyond the reach of T.

At that point, the stage is set for a progression from T to T*--a generalization of T.Among

the many historical examples are the transitions from Newtonian mechanics to quantum

mechanics; from linear system theory to nonlinear system theory; and from deterministic

models to probabilistic models in economics and decision analysis.





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Fuzzy logic is a better approximation to reality

In this perspective, a fundamental point--a point which is not as yet widely recognized-

-is that there are many classes of problems which cannot be addressed by any theory, T,

which is based on bivalent logic. The problem with bivalent logic is that it is in

fundamental conflict with reality – a reality in which almost everything is a matter of

degree.To address such problems what is needed is a logic for modes of reasoning which

are approximate rather than exact. This is what fuzzy logic is aimed at.

3.5 Principal Applications Of Fuzzy Logic

Control

consumer products

industrial systems

automotive

decision analysis

medicine

geology

pattern recognition

robotics

3.6 Emerging Applications Of Fuzzy Logic

computational theory of perceptions

natural language processing

financial engineering

biomedicine

legal reasoning





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CHAPTER 4

FUZZY CONTROLLER

4.1 Introduction

The fuzzy controller takes input values from the real world. These values are referred

to as "crisp" values since they are represented as a single number, not a fuzzy one. Inorder for the fuzzy controller to understand the inputs, the crisp input has to be converted

to a fuzzy number. This process is called fuzzification.

The next step in the fuzzy control process is the implementation of the rule base. This

is where the fuzzy inputs are compared and based on the membership of each, the fuzzy

output is chosen. For a 2 input system with 7 membership functions for each input, there

would be 49 fuzzy rules to compute since they are anded together.

The final step is to convert the fuzzy outputs of the rule-base to crisp ones. This

process is known as defuzzification. This process will take a fuzzy number and apply it to

a membership function to achieve the crisp number that will be sent to the real world.





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4.2 Block Diagram of Fuzzy Logic Controller:

Fig.4.2.1 Basic block diagram of fuzzy logic controller

Description Of Block Diagram:

The block diagram is mainly consists of:

Preprocessing

Fuzzification

Inference engine & rule base

Defuzzification

Postprocessing

4.2.1 Preprocessing:

A preprocessor conditions the measured inputs before they enter the controller and

maps crisp inputs into a standard universe.

Fuzzificatio

n

Pre-

Processing

Rule-Base

Inference

engine Defuzzifica

tion

Post-

Processing





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4.2.2 Fuzzification:

Fuzzification converts each crisp input datum into a degree of membership to one or

several membership functions. Crisp values are converted into fuzzy values.

There are numerous different types of membership functions. Among them, the two most

commonly used in practice are the triangular and trapezoidal membership functions

(triangular membership function being a special case of the trapezoidal function).

Each trapezoidal membership function is defined by two points and two slope values.

The entire membership function can be divided into three segments: 0, 1 and 2 as shown

in Figure 3.The Y axis shows the degree of membership (μ) as a value between 0 and 1.

The X axis shows the universe of discourse and is divided into three segments. The degree

of membership depends on the location of the input value with reference to these three

segments. Figure 3 shows how trapezoidal input membership functions are formed in the

fuzzification process [8, 9, 10].

The calculation of the degree of membership ((μ) can be categorized into three

different segments:

(a) in segment 0: μ = 0,

(b) in segment 1: slope is upward from left to right, therefore:

μ = (Input value – point 1) * slope1,

where μ is limited to a maximum value of 1,

(c) in segment 2: slope is downward from left to right,

therefore:

μ = 1 - (Input value – point 2) * slope 2,

where μ is limited to a minimum value of 0.





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Fig.4.2.2 Trapezoidal membership function

As an example, let’s use the input value of 10 to calculate the degree of membership

function. Using an 8-bit resolution computation, μ = 1 equals to $FF or 255 in decimal

(the ―$‖ sign indicates hexadecimal number representation). The values of Point

1 and Point 2 are $04 and $09, respectively, and the two slopes can be calculated as

follows:

Slope 1 = 1 / (6 – 4) = $FF / 2 = 255 / 2 = 127 = $7F (1)

and

Slope 2 = 1 / (12 – 9) = $FF / 3 = 255 / 3 = 85 = $55 (2)Since the input value of 10 ($0A) is greater than Point 2 and lies in segment 2, therefore:

μ = $FF – (Input value – point 2) * slope 2 = $FF – ($0A - $09)*$55 = $AA (3)

4.2.3 Inference Engine & Rule Base:

An inference engine translates the nonlinear input vector into a scalar output using

fuzzy rules. The fuzzy inference engine uses membership functions to represent the input

and output conditions. Membership functions maps fuzzy set elements to real numbered

values Normally it contains rules in linguistic format ( if-then), but other formats

(relational and tabular ) can also be used.





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A rule usually takes the form of IF-THEN statement as follow:

IF x is A AND y is B THEN z is C (4)

―AND‖ is a fuzzy operator which is the minimum operation between the two antecedents.

In VHDL, the following ―minimum‖ function is used to obtain the result of each rule

evaluation between two variables:

function minimum(a, b: std_logic_vector) return std_logic_vector is

variable min: std_logic_vector(7 downto 0) := (others => '0');begin

if a < b then min := a; else min := b; end if; return min; end minimum;

There is also an implied ―OR‖ operation between successive rules when more than one

rule is involved with the same output.

The linguistic rule,

IF ( x1 is A1 AND y1 is B1) OR ( x2 is A2 AND y2 is B2) THEN z is C ,

can be implemented by taking the maximum value of all the results with the same

consequent block. In VHDL code, a function of taking the maximum of two input

variables to determine the final result of all rules with the same output can be written as:

function maximum(a, b: std_logic_vector) return std_logic_vector is

variable max: std_logic_vector(7 downto 0) := (others => '0'); begin

if a > b then max := a; else max := b; end if; return max; end maximum;

By combining the ―minimum‖ and ―maximum’ functions, the truth value for each rule can

be obtained as:

C <= maximum( minimum(A1, B1), minimum(A2, B2));

4.2.4 Defuzzification:

Defuzzification is a process of changing the fuzzy control signal that comes from the

inference engine into a crisp output that can be used to control the system at hand. There

are several types of defuzzification including Center of Gravity (COG), Bisector of Area

(BOA), and Mean of Maxima (MOM).





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During the defuzzification process, each fuzzy output is multiplied by its

corresponding single on position. The sum of this product is divided by the sum of all

fuzzy output to obtain the result of the final output. In VHDL, this is implemented as:

For i = 1 to n do begin product = (s(i) × f(i)) + product; sum = f[i] + sum; end for loop;

output = product / sum;

Although several types of membership functions, such as singleton, trapezoidal etc.,

could beused to describe the output using VHDL, the defuzzification calculation are not

the same, some are more complicated than others. If trapezoidal shapes are used, finding

the center of gravity and overall area of the membership functions are considerably more

complicated than the calculation on singletons, and the results are not necessary effective

or better.

4.2.5. Post-Processing:

Post-processing is used to scale the output of the FLS. The output from the FLS is

defined on a standard universe that should be scaled or translated to engineering

units(such as volts, amperes, etc.).

4.3. Advantages of Fuzzy Logic:

The fuzzy controller also has an advantage of performing according to linguistic rules

in the manner of how a human would use.

The fuzzy logic control system provides better performance in terms of total waiting

time as well as total moving time.

Less waiting time.

Reduce the fuel consumption.

Reduce air and noise pollution.





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CHAPTER 5

TRAFFIC LIGHT CONTROLLER

5.1 Overview

Traffic signal control has become an important operational measure of road traffic

management, in particular as it has become more and more difficult to provide sufficient

road space despite growing traffic demand. Since traffic signal systems directly intervene

in traffic by alternatively stopping or releasing traffic flows which share conflict zones,they have to be designed, implemented and operated very carefully.

This section will present the traffic signal system according to "Steering

Committee Traffic Control and Traffic Safety".

5.2 System Overview

As a controlled automatic system, a traffic signal system can be divided on: detectors,

a controller and actuators. Detectors are the elements that transform a physical

information in a eletrical signal that can be undestood by a controller. Actuators are the

elements that transform an eletrical signal came from the controller in a physical

actuation. The controller is the elemnet that have all logic rules to control actuators based

on signals came from the detectors.





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In a traffic signal system the parts that constitute the system are:

detectors: loops (for vehicles presence detection), pedestrian buttons (for

pedestrian detection), internal clock (time detection).

controller: traffic light controller.

actuators: traffic lights (severals states).

The design of a traffic signal system covers the selection of the control strategy, i.e. the

selection of severals rules to change the traffic lights based on the detectors information.

These rules are dependent on the traffic engineer description of control, on the calculation

of the signal program elements as well the road traffic engineering design of theintersection, road section or part of a netwok including the corresponding control

measures.

The individual components, as for exemple the actual layout of the intersection, the

division of approaches into lanes, the direction of pedestrians and cyclists and the

signalization of the individual traffic streams have to be coordinated in a way that

precondition for safe traffic flow are given under all operational condition and for all

traffic loads. Road space layout, traffic layout and signalisation have to form an integrated

whole.

Summarizing, the controller internal logic is based on a control strategy that will

depend on traffic stream, intersection layout and etc. Based on these studies a control

strategy is built using logic functions depending on previous signal configurations, time

on the current signal configuration and others detectors activation. This logic act in two

levels on traffic lights: state changing and stateperiod. See fig 4





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However, as said before, the control strategy will depend on all intersection layout and

stream, thus, the changes on time and state of a sigle traffic light has to follow all other

changes on the traffic lights at the intersection. Therefore, the control strategy has to be

related to configurations of all signal groups at the intersection et not just one especific

traffic light.

Fig 5.2.1 controller internal logic

5.3 Control Strategies

Control strategy in a traffic light control can be classified in two types: regulative and

adaptative traffic control. "Regulative traffic control is preferred if a rigid operational

traffic management is desired on certain road sections. It requires constant traffic streams

featuring only long-term changes in volume since it not meant to react to short-term

variations on traffic demand". Otherwise "Adaptative traffic control is preferred if





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actuated operational traffic management is desired, taking into account the prevailing

traffic situation even at short-term variations of volume or direction of traffic".

In a Regulative traffic control the system normally consist in a controller and his traffic

lights. As only input the time will be the sigle variable used into the control actuation. In

this strategy, as there are constant streams, other detectors normally are not necessary.

Therefore, controller’s logic is based just in fixed times came from traffic flow studies at

the intersection and it’s actuation is based on a comparation between passed time and the

fixed times given by studies.

In an Adaptative traffic control strategy other detectors are constantly used and they

will interfere in the controller logic to changes phases at the intersection.In this strategy,

not just time is used to act on the system and all detectors, depending on priorities, can

have an influence on the output.

5.4 Detectors

To understand what kind of influence and changes we can have in an adaptative traffic

control strategy it is necessary to know what kind of information we can measure. Even if

to vehicles detection normally there are only loops on the ground detecting vehicle

presence, it’s possible to have many different variables that will ifluence on the control

strategy. With some different disposition or changing loop length is possible to measure:

time headways: Time between two vehicles.

traffic volume: Number of cars in an specific period of time.

period of occupancy: Time that a vehicle stayed on the detector.

speed: With two loops in sequence is possible to measure speed.





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To pedestrians detection there is a pedestrian button that detects a pedestrian presence

when he pushes the button.

Therefore, mixing time detection with presence loops it’s possible to create a series of

variables that will influence f function. Thus, we have a intermediate step between

stectors and logical function on controllers (Fig. 5)

Figure 5.4.1 controller internal logic with an intermediate treatment

All these variables will be analyzed by the controller logic, it will compare the instant

variable with minimums and maximums values for this variable. As result, the controller

will chose an actuation form.





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5.5 Actuators

As it can be seen in fig. 1 and 2 the controller logic function output will depend on all

it’s input variables. Until the moment it’s known that output can influence choosing stay

at the same signals configuration (or define a duration time to the current signal

configuration) or change to another one. [1] defines 4 different possible influence but in a

intermediate level, influendes that changes a internal level on the control function.

5.6 Internal Parameters

This section will give some important internal controllers concepts. Concepts defined,

it will be possible to understand how the internal logic is modeled and how exactly the

control acts. Therefore, it will be possible to understand how the logic function is

designed.

5.7 Traffic Light

As said in the previous section traffic light is the actuator of the system. It can be a two

(pedestrian) or three (vehicles) colors traffic light whose states can be:

Released:

Dark

Yellow Blinking

On

Green

Green Blinking

Released





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Closed:

Red

Off

Blinking

Closed

Transition:

Yellow

Green Blinking Transition

Red-Yellow

Unknown in special cases.

Moreover, for some control strategies there are well defined sequece, for exemple for

normal vehicle traffic the color sequence is Green-Yellow-Red an for pedestrian traffic

light is Green-Red-Green. The control strategy consists in make choices on the traffic

light state and on how much time the traffic light will stay on this state.

5.7.1 Phase

As was said a controller has to control the stream in all direction at an intersection. To

achieve this goal some traffic light configurations are continuously repeated. These

configurations are called phases. [1] gives a more rigorous definition: "A phase is that part

of a signal program during which a certain basic signalization stage do not change,

whereby the green times of the released traffic streams do not necessarily have to begin

and end at the same time". For example, in a simple intersection with 4 traffic lights to

simplify traffic lights are supposed to change between 2 states: red and green a controller

can have a minimum of 2 phases.





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It can have more phases if specific cases, as for turning left, are treated. Thus, a

controller stratagy has it logic for control the sequence of possible phases and not just

individual traffic lights.

Fig 5.7.1. Phases of traffic light





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5.7.2 Cycle

The logic controller function will chose, depending on controller input variables on

time, a sequence of phases that respect all requirements to a good road traffic

management. A sequence starting on a phase "a" than over some phases comes back to

phase "a" is called cycle. A control strategy can also changes a cycle depending on

controller income variables.

5.7.3 Program

A group of cycles carrying the same influences (rules) by a control is called program.

The program are use for long-term changes on cycles. To control strategy it’s possible

classify control input variables effect in two types: macro and micro affectation. Macro

affectation will interfere in program changes (long-term changes on sequence and

duration time) and micro affectations will interfere on the cycles (time and sequence of

phases).

5.7.4 Actuation on Internal Parameters

As was previous said, the controller actuation has an intermediate level actuating on

the internal parameters (phase, cycle, program) before giving the final visual effect on

traffic lights and on the traffic flow. We have seen previously 4 different possibleinfluence on internal parameters (figure 7 for an overview):





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Green Periods: Changing in green times (actuation on duration times in a

sequence of phases sharing the same green state in a single traffic light).

Phase Swapping: Alter phases sequence (actuation on number of phases in a

cycle).

Request of a demand phase: Alter number of phases and green periods

(actuation on the phase number and duration time at the same time).

Signal Program Formation: Can alter green times, phase sequence, phase

numbers and change the cycle time. (very open strategy)

Fig 5.7.4. Overview of control stratrgies





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5.7.5 Control Strategy and Internal Parameters

In a Regulative traffic control all internal parameters are fixed and determinists. The

programs are time-fixed, so there is a schedule that control a program change during a

day. Cycles are also time-fixed and for each program there is just one cycle, therefore,

there is a fixed sequence of phases that repeats in loop. In consequence, phases are time-

fixed as traffic light states as well.

In an Adaptative traffic control strategy all previous affectations are possibles. There

are micro and macro affectations, different cycles in a program due to duration time

changing in phases or due to phase inclusion on the middle of a cycle.





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CHAPTER 6

FPGA: FIELD PROGRAMMABLE GATE ARRAY

6.1 Introduction

Fig 6.1 An example of a Xilinx Spartan FPGA programming/evaluation board

A field-programmable gate array (FPGA) is an integrated circuit designed to be

configured by the customer or designer after manufacturing — hence "field-

programmable". The FPGA configuration is generally specified using a hardware

description language (HDL), similar to that used for an application-specific integrated

circuit (ASIC) (circuit diagrams were previously used to specify the configuration, as they

http://en.wikipedia.org/wiki/Xilinx

http://en.wikipedia.org/wiki/Integrated_circuit

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http://en.wikipedia.org/wiki/Hardware_description_language


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were for ASICs, but this is increasingly rare). FPGAs can be used to implement any

logical function that an ASIC could perform. The ability to update the functionality after

shipping, partial re-configuration of the portion of the design and the low non-recurring

engineering costs relative to an ASIC design (notwithstanding the generally higher unit

cost), offer advantages for many applications.

FPGAs contain programmable logic components called "logic blocks", and a hierarchy

of reconfigurable interconnects that allow the blocks to be "wired together" — somewhat

like many (changeable) logic gates that can be inter-wired in (many) different

configurations. Logic blocks can be configured to perform complex combinational

functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic

blocks also include memory elements, which may be simple flip-flops or more complete

blocks of memory.[2]

In addition to digital functions, some FPGAs have analog features. The most common

analog feature is programmable slew rate and drive strength on each output pin, allowing

the engineer to set slow rates on lightly loaded pins that would otherwise ring

unacceptably, and to set stronger, faster rates on heavily loaded pins on high-speedchannels that would otherwise run too slow.[3][4] Another relatively common analog

feature is differential comparators on input pins designed to be connected to differential

signaling channels. A few "mixed signal FPGAs" have integrated peripheral Analog-to-

Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) with analog signal

conditioning blocks allowing them to operate as a system-on-a-chip.[5] Such devices blur

the line between an FPGA, which carries digital ones and zeros on its internal

programmable interconnect fabric, and field-programmable analog array (FPAA), which

carries analog values on its internal programmable interconnect fabric.

http://en.wikipedia.org/wiki/Partial_re-configuration

http://en.wikipedia.org/wiki/Programmable_logic_device

http://en.wikipedia.org/wiki/Combinational_logic


http://en.wikipedia.org/wiki/Logic_gate

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http://en.wikipedia.org/wiki/XOR_gate

http://en.wikipedia.org/wiki/Flip-flop_%28electronics%29

http://en.wikipedia.org/wiki/Field-programmable_gate_array#cite_note-FPGA-1



http://en.wikipedia.org/wiki/Slew_rate

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http://en.wikipedia.org/wiki/Differential_signaling


http://en.wikipedia.org/wiki/Mixed-signal_integrated_circuit

http://en.wikipedia.org/wiki/Analog-to-Digital_Converter


http://en.wikipedia.org/wiki/Digital-to-Analog_Converter

http://en.wikipedia.org/wiki/System-on-a-chip




http://en.wikipedia.org/wiki/Field-programmable_analog_array

http://en.wikipedia.org/wiki/Field-programmable_analog_array


http://en.wikipedia.org/wiki/System-on-a-chip

http://en.wikipedia.org/wiki/Digital-to-Analog_Converter



http://en.wikipedia.org/wiki/Mixed-signal_integrated_circuit





http://en.wikipedia.org/wiki/Electrical_resonance

http://en.wikipedia.org/wiki/Slew_rate


http://en.wikipedia.org/wiki/Flip-flop_%28electronics%29

http://en.wikipedia.org/wiki/XOR_gate

http://en.wikipedia.org/wiki/AND_gate

http://en.wikipedia.org/wiki/Logic_gate



http://en.wikipedia.org/wiki/Programmable_logic_device

http://en.wikipedia.org/wiki/Partial_re-configuration





29

FPGAs can be characterized by the following items:

High production cost

Low design density

Programmable fabric adds significant overhead

No NRE and Re-Spin cost

Low development effort

Low dead-time

simplified timing

No test vectors

Relaxed verification

6.2 Block Diagram

Fig.6.2.1 Block diagram of fuzzy control board with FPGA

Address to data input from

Lookup table lookup table

INPUT

OUTPUT

INPUT

A/D

CONVERTER

ROM

D/A

CONVERTER





30

FPGA CHIP

The FPGA chip is most important factor in this project. The above fig.2 shows the

block diagram of fuzzy control board with FPGA. The block diagram consists of:

1. A/D converter

2. ROM

3. FPGA

4. D/A converter

The A/D converter converts analog inputs into digital output i.e. fuzzy output which is

given to the FPGA chip.This chip process on the inputs from A/D converter and input

from ROM memory. The FPGA chip gives address inputs to the ROM.

The output of FPGA chip is given to the D/A converter which converts the digit output

into analog output

6.3 FPGA Technology in Detail

FPGAs are chips, which are programmed by the customer to perform the desired

functionality. The chips may be programmed either:-

Once: Antifuse technology, e.g. devices manufactured by Quick logic

Several times: Flash based e.g. Devices manufactures by Actel

Dynamically: SRAM based e.g. Devices manufactured by Actel, Altera, Atmel,

Cypress, Lucent, Xilinx





31

Each technology has its own advantages, which shall be discussed only very briefly:

Antifuse FPGAs:

Devices are configured by burning a set of fuses. Once the chip is configured, it can-

not be altered any more.Bug fixes and updates possible for new PCBs, but hardly for

already manufactured boards.ASIC replacement for small volumes.

Flash FPGAs:

Devices may be re-programmed several thousand times and are non- volatile, i.e. keep

their configuration after power-off. With marginal additional effort, the chips may be

updated in the field

Expensive

Re-configuration takes several seconds

The CLBs form the central logic structure with easy access to all support and routing

structures. The IOBs are located around all the logic and memory elements for easy and

quick routing of signals on and off the chip.

SRAM FPGAs

Currently the dominating technology

Unlimited re-programming

Additional circuitry is required to load the configuration into the

FPGA after power- on

Re-configuration is very fast, some devices allow even partial

reconfiguration during operation.

Allows new approaches and applications





32

FPGA are two dimensional arrays of logic blocks and flip-flops with an electrically

programmable interconnection between logic blocks. The interconnections consist of

electrically programmable switches which is why FPGA differs from Custom ICs, as

Custom IC is programmed using integrated circuit fabrication technology to form metal

interconnections between logic blocks. In an FPGA logic blocks are implemented using

multiple level low fan in gates, which gives it a more compact design compared to an

implementation with two-level AND-OR logic. FPGA can be programmed as per user

requirement.

6.4 Traffic Light controller with FPGA:

Traffic signal is an essential element to manage the transportation network.

Modern approaches towards designing traffic signal controllers suggest way to convert

loop detector data or video detector into no. of vehicles waiting for queue for a major

arterial intersection under interrupted traffic flow conditions by means of fuzzy logic and

neural networks Intelligent traffic control system is generally designed for different traffic

parameters. The important parameters which contributes most for all types of traffic like

homogeneous and heterogeneous in urban, rural and metro cities are :

a) Congestion at the intersection,

b) Delay in traffic and

c) Synchronization of signal at current intersection with the signal at neighboring

intersection.





33

fig 6.4.1 conflicts in traffic signal





34

CHAPTER 7

SOFTWARE USED

7.1 Matlab

MATLAB® is a high-performance language for technical computing. It integrates

computation, visualization, and programming in an easy-to-use environment where

problems and solutions are expressed in familiar mathematical notation. Typical usesinclude Math and computation Algorithm development Data acquisition Modeling,

simulation, and prototyping Data analysis, exploration, and visualization Scientific and

engineering graphics Application development, including graphical user interface building

MATLAB is an interactive system whose basic data element is an array that does not

require dimensioning. This allows you to solve many technical computing problems,

especially those with matrix and vector formulations, in a fraction of the time it would

take to write a program in a scalar noninteractive language such as C or Fortran.

The MATLAB Application Program Interface (API). This is a library that allows you

to write C and Fortran programs that interact with MATLAB. It includes facilities for

calling routines from MATLAB (dynamic linking), calling MATLAB as a computational

engine, and for reading and writing MAT-files.





35

7.1.1 Some functions of Matlab used in the coding:

ycbcr2rgb

The function rgb2ycbcr converts colormaps or RGB images to the YCbCr color space.

ycbcr2rgb performs the reverse operation. For example, these commands convert an RGB

image to YCbCr format.

Example

RGB = imread('peppers.png');

YCBCR = rgb2ycbcr(RGB

rgb2gray

Convert an RGB image or colormap to grayscale

Syntax

I = rgb2gray(RGB)

example

newmap = rgb2gray(map)

imerode

IM2 = imerode(IM,SE) erodes the grayscale, binary, or packed binary image IM,

returning the eroded image IM2. The argument SE is a structuring element object or array

of structuring element objects returned by the strel function

Syntax

IM2 = imerode(IM,SE).





36

imdilate

IM2 = imdilate(IM,SE) dilates the grayscale, binary, or packed binary image IM,

returning the dilated image, IM2. The argument SE is a structuring element object, or

array of structuring element objects, returned by the strel function.

Syntax

IM2 = imdilate(IM,SE)

7.2 Xillin

7.2.1 Xilinx ISE Overview

The Integrated Software Environment (ISE™) is the Xilinx® design software suite that

allows you to take your design from design entry through Xilinx device programming.

The ISE Project Navigator manages and processes your design through the followingsteps in the ISE design flow.

7.2.2 Design Entry

Design entry is the first step in the ISE design flow. During design entry, you create

your source files based on your design objectives. You can create your top-level design

file using a Hardware Description Language (HDL), such as VHDL, Verilog, or ABEL, or

using a schematic. You can use multiple formats for the lower-level source files in your

design.





37

After design entry and optional simulation, you run synthesis. During this step, VHDL,

Verilog, or mixed language designs become netlist files that are accepted as input to the

implementation step.

7.2.3 Implementation

After synthesis, you run design implementation, which converts the logical design into

a physical file format that can be downloaded to the selected target device. From Project

Navigator, you can run the implementation process in one step, or you can run each of the

implementation processes separately. Implementation processes vary depending on

whether you are targeting a Field Programmable Gate Array (FPGA) or a Complex

Programmable Logic Device (CPLD).

7.2.4 Verification

You can verify the functionality of your design at several points in the design flow.

You can use simulator software to verify the functionality and timing of your design or a

portion of your design. The simulator interprets VHDL or Verilog code into circuit

functionality and displays logical results of the described HDL to determine correct circuit

operation. Simulation allows you to create and verify complex functions in a relatively

small amount of time. You can also run in-circuit verification after programming your

device.

7.2.5 Device Configuration

After generating a programming file, you configure your device. During

configuration, you generate configuration files and download the programming files from

a host computer to a Xilinx device.





38

CHAPTER 8

HARDWARE USED

Fig 8.1 Model View





39

8.1 Spartan-3 Trainer Kit

Fig 8.1.1.block diagram of spartan 3 trainer kit





40

8.2 Specification Of Spartan-3 Trainer Kit

Model-mxs3fk-pq-208_003_im

Spartan-3 Features

FPGA – Compatibility

Xilinx Spartan-3 XC3S400 in PQ208 pin package.

Configuration through

flash PROM.

JTAG Port.

Power Supply

Vccio and Vccint are generated on board using regulators.

User Interface

16 Digital Output LEDs

4 X 4 Matrix Keyboard

Six 7 Segment Display

Clock oscillator

User I/Os

Maximum 79 I/Os.

Standard Configuration

FPGA – XC3S400.

Standard Accessories

User Manual.

Codes for Demonstration.

Download Cable.

Power Supply Adapter.

One RS-232 channel using MAX3223

Interface Module

Light Controller

Real Time Clock Circuit





41

ADC- DAC Traffic

RS232 Serial Interface

RS232C compatible connectivity is provided using device MAX3223.

Signals provided are Rx, Tx RTS and CTS. These signals are terminated on

9-pin D connector

Analog Interface:

12 bit AD7891 ADC and 12 bit AD7541 DAC.

Analog Input – Eight channels using ADC using AD7891, (500Ksps, 12 bit).

Analog Output- Two channels using Two DAC’s-AD7541. (12 bit, 100 ns

conversion time)

Downloading Cable and Connector

For downloading the design from PC, one 10-pin FRC connector is provided

on board. (JTAG)

Configuration

Board supports two different configuration modes

Master Serial Mode (Configuration PROM.)

Boundary Scan Mode.(JTAG)

Configuration modes can be selected by setting mode pins using on board

jumpers.

Boundary Scan Mode

In this mode, FPGA and / or PROM can be configured through JTAG port.

Configuration through PROM – Master serial mode

One Platform Flash PROM XCF04S is provided on board.





42

User I/Os

Maximum of 24 I/Os are available from FPGA. These I/Os are provided using

34-pin box type FRC connector (5V input Tolerant and 3.3V output tolerant).

User LEDs

23 LEDs are provided on the board to monitor signals, which are grouped as follows.

Six POWER-ON LED - for power supply indication.

DONE LED – indicates successful configuration of FPGA.

Sixteen user LEDs to indicate output conditions

Clocks

Clock Source: 4MHz clock oscillator – supplied as standard and can be used as system

clock input

Seven Segment Display

Six 7-Segment LED displays are provided. They can be used as an aid to verify designs.

DIP switch

Sixteen input switches are provided on board, useful to give logic input to your design.

Test Points (TPs)

Test points are provided for 4MHz clock, ground,12VN,12V,5V,2.5V, 3.3V and 1.2V.

Keyboard

4 X 4 key matrix switches are provided on board





43

Interface Modules

1. Traffic Light Control Interface Module.

2. Real Time Clock (RTC) Interface Module.

3. ADC DAC Interface Module.

Traffic Light-Module -Interfaces with Spartan 3 KIT to implement traffic light

controller as an exercise in outputting digital data from Programming Logic Devices

to control real world around.

Fig.8.2.1 Traffic Light Module





44

ANALOG INPUT

Eight analog input channels using ADC – ADC0808 (Resolution – 8bits.Conversion Time

-100 us), as shown in Figure 8, are provided using ADC0808, with following

specifications

Input range - 0V to 5Volts.

The-ADC takes an external analog input from the PUT terminal.

Figure 8.2.21: Input Channels of ADC

ANALOG OUTPUT

Two analog output channels are provided on-board DAC – AD7541

Output Range +10 V to -10 Volts, single ended

Resolution - 12 bit.

Conversion time - 100 ns

Settling time – 600 ns.

Output Range -0 to 5 Volts.

Analog Output Connector:





45

Vout: PUT terminal is provided to provide ANALOG OUTPUTS

Analog Outputs

Vout

Vout GND

1 2

8.3. CAMERA

Fig 8.3.1 Iball Face2face C8.0 Web Camera

Specification

Image sensor:High quality 1/4 CMOS sensor

Effective Pixels:480K pixels ( Interpolated 8M pixels still image & 4M pixels video)





46

Video Resolution:Max. up to 2304 x 1728 pixels – 4MP

Image Resolution:Max. up to 3264 x 2448 pixels – 8MP

Frame Rate:30 frames per second

Colour Depth:24-Bit True Color

Focus:5 cm to Infinity

Microphone:Built-in high sensitive USB microphone

Snap Shot Button:Built-in snap shot button

Night Vision:6 LED’s for night vision, with brightness controller

Low Light Boost:Automatic low light boost

White Balance:Auto

Auto Exposure:Auto

Auto Compensation:Auto

Auto Tracking:Auto face tracking function

Zoom:4X Digital Zoom

Video Effects:10 photo frames and 16 special effects

OS Compatibility:Windows XP / Vista & 7

Bundled Software:Driver for Windows with 10 Photo frames, 16 Special effects & Auto

Face Tracking and more.

I/O interface:USB 2.0, backward compatible to USB 1.1





47

CHAPTER 9

ALGORITHM

1) Trigger the camera.

2) Take the photo .

3) According to the program, give the count of the vehicles.

4) Send the data serially to the FPGA.

5) Serial to parallel conversion of the data.

6) Operation on the data takes place.

7) Green signal is given to the side of the road having more number of vehicles for

the specified seconds





48

CHAPTER 10

Flowchart

no

yes

start

Ycbr2rgb(back. & obj)

Cap.

back

Capturing backg.

C=1:1000

Get data(vid)

Trigger camera

Analy & cl result

Rgb2gray(back. & obj)

Diff =grback.-graob

Dilate & erode

Get final count

o/p serially to FPGA

Controller read data

Comparing with

the available data

Right green time Left green time

change

All green

out

Set to Y-R

out

Set to R-R

out

Set to R-G

Set to R-Y

out

Set to R-R

out

Green

direction

straight





49

no

yes

no

yes

Out

Did cycle

change

Time up

<min

>maxTurn on led

Display time

Load timer

Display time

Count cars

Display time

Return

Display time

chan e

Call new green timeReturn





50

CHAPTER 11

RESULT

Fig 11.1 Output Of Matlab





51

Fig 11.2 Output After Simulation In Xillin





52

CHAPTER 12

CONCLUSION

The fuzzy logic traffic lights controller performed better than the fixed-time controller

or even vehicle actuated controllers due to its flexibility. The flexibility here involves the

number of vehicles sensed at the incoming junction and the extension of the green time. In

the fixed-time controller, being an open-loop system, the green time is not extended

whatever the density of cars at the junction. For vehicle actuated traffic light controllers,

which is an enhanced version of fixed-time controller, the green time is extended

whenever there is a presence of a vehicle. However, thesetimes are fixed in advance up to

a maximum time limit. For example when a car is detected, the green time is extended for

another 5 or 10 seconds until the maximum time limit is reached. In the fuzzy logic

controller, the extension time is not a fixed values. They are all fuzzy variables such as

long, medium and small. The number of cars sensed at the input of the fuzzy controllers

are also converted into fuzzy values, such as very small, small, medium, too many, etc. In

addition to the fuzzy variables as mentioned, the fuzzy controller also has an advantage of

performing according to linguistic rules in the manner of how a human would use. The

reasoning method in the fuzzy controller is also similar to that of the policeman handling

the traffic flow at a typical junction.

A simulation experiment was carried out to compare the performance of the fuzzy

logic controller with a fixed-time conventional controller. The flow density of the

simulation is varied according to real life traffic conditions. It can be observed from the

results that the fuzzy logic control system provides better performance in terms of total

waiting time as well as total moving time. Less waiting time will not only reduce the fuelconsumption but also reduce air and noise pollution.





53

APPENDIX

A. REFERENCES

C. C. Lee, ―Fuzzy Logic in Control System: Fuzzy Logic Controller - Part I & II‖,

IEEE Trans. On Systems, Man and Cybernetics, Vol. 20, No. 2, Mar/Apr. 1990,

pp. 404-435.

C. P. Pappis and E. H. Mamdani, ―A Fuzzy Logic Controller For a Traffic

Junction‖, IEEE Trans. On Systems, Man and Cybernetics, Vol. SMC-7, No.

10,Oct. 1977, pp. 707-717.

Shilpa S. Chavan (Walke), Dr. R. S. Deshpande, J. G. Rana, ―Design of IntelligentTraffic Light controller using Embedded System‖, International conference on

Emerging Trends in Engg. & Tech., ICETET-09.

Yan Li and Xiaoping FAN, ‖Design of Signal Controllers for Urban Intersections

Based on Fuzzy Logic and Weightings‖ in proc. IEEE Conf. July 23-7, 2003..

Dipti Srinivasan, Min Chee Choy, and Ruey Long Cheu, ‖Neural Networks for

Real-Time Traffic Signal Control‖, IEEE Transaction on Intelligent Transportation

Systems,Vol. 7, No. 3, September 2006.

C. T. Wannige and D.U.J. Sonnadara, ―Traffic Signal Control Based on Adaptive

Neuro-Fuzzy Inference‖ 4th international conference on information and

automation for sustainability, ICIAFS, 2008.

Md. Shabiul Islam, Masuri Othman, Md. Anwarul Azim, M. S. Bhuyan, M.

Saukat Jahan, H. R. Siddiquei, ―Design and Implementation of an Intelligent

Fuzzy VLSI Chip for Traffic Control Application‖, IEEE region conference

TENCON, 2006.

WM El-Medany and MR Hussain, ―FPGA based advanced real traffic light

controller system design‖, IEEE International Workshop on Intelligent Data

Acquisition and Advanced Computing Systems: Technology and Applications,

IDACS, 2007, Dortmund, Germany, 6-8 September 2007.




N. Y. Hamisi, N. H. Mvungi, D. A. Mfinanga, B. M. M. Mwinyiwiwa, ―Prospects

of Pre-timed Arterial Traffic Control Systems in City Roads of a typical

Developing Country: A case Study of Dar es Salaam City‖, 2nd international

conference on adaptive science and technology ICAST, December 2009,.

Yi Hu, Andrew Chiou and Qinglong Han, ―Hierarchical Fuzzy Logic Control for

Multiphase Traffic Intersection Using Evolutionary Algorithms‖, IEEE

International Conference on Industrial Technology, ICIT, 2009.

Xing Zheng and Lianyu Chu, ―Optimal Parameter Settings for Adaptive Traffic-

Actuated Signal Control‖, 11th International IEEE Conference on International

Transportation Systems, ITSC, 2008.

Liu Yang and Chen Xian Feng, ―Design of Traffic Lights Controlling System

Based on PLC and Configuration Technology‖, International Conference on

Multimedia Information Networking and security, MINES, 2009.

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