F1C81 class2 - F1 Media · 2017-09-01 · Eeprom 1.2 Features ... F1C81 has a digital audio...
Transcript of F1C81 class2 - F1 Media · 2017-09-01 · Eeprom 1.2 Features ... F1C81 has a digital audio...
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F1C81
Specification and Datasheet
Confidential / Preliminary Documentation
Revision 1.3
F1media Co., Ltd.
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List of Contents 1. General
1.1 Overview
1.2 Features
1.3 Application
1.4 Pinout Diagram & Outline Size
1.5 Device Terminal Functions
1.6 Module Dimension
2. Characteristics
2.1 Electrical Characteristics
2.2 RF Characteristics
2.3 Power Consumption
3. Interface
3.1 UART interface
3.2 Audio interface
4. Application Schematic
4.1 1.8V Supply
4.2 2.7~3.3V Supply
5. PCB Layout
6. Reflow Temperature Profile
7. Revision History
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1. General
1.1 Overview
This specification covers Bluetooth module (class-2) which complies with Bluetooth specification version 4.0
/Bluetooth low energy and integrates RF & Baseband controller in small package. This Module has deployed
CSR’s BC08-ROM WLCSP chipset.
F1C81
RAM
ROM
MMU
Processor
2.4GHz Radio
I/O
Filter
XTAL
UART
SPI
PCM/I2S
VCC
Eeprom
1.2 Features
• Dual-mode Bluetooth / Bluetooth low energy
• Fully Qualified Bluetooth v4.0
• Full-speed Bluetooth Operation with Full piconet Support (Up to 7 Slaves)
• Scatternet Support
• Ultra Low Power Consumption
• Support for 802.11 Co-existence
• PCM/I2S digital audio interface
• High speed UART interface (up to 4Mbps)
• Flexible Supply Voltage : 1.8V supply or 2.7~3.3V range supply
• Standard HCI support
• Competitive Size : 8mm x 7mm x 1.45mm (W x L x H, with Shield CAN)
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1.3 Application
• Low-cost phones, Feature phones, Smart-phones
• Personal Digital Assistants (PDA)
• Portable media Players
1.4 Pinout Diagram
PIO[0]
PCM_CLK
UART_RTS
UART_CTS
PIO[9]
PIO[2]
UART_RX
UART_TX
SPI/PCM# SEL
SCL
PIO[1]
PIO[3]
GND
ANT
GND
RESETB
PIO[4]
VDD_PADS
PCM_SYNC
PCM_IN
PCM_OUT
WP
SDA
GND
NC
NC
VDD_1V8
VDD_3V3
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1.5 Device Terminal Functions
Pin No. Pin Name Pin Description
1 SCL EEPROM Clock (option) , Only F1C81E
2 PIO[1] Programmable Input / Output
3 PIO[3] Programmable Input / Output , Clock REQ In
4 GND Ground
5 ANT RF IN/OUT , Connection to Antenna
6 GND Ground
7 RESETB Reset. Active low , Power On Reset
8 PCM_OUT / SPI_MISO PCM synchronous data output /SPI data output
9 PCM_CLK / SPI_CLK PCM synchronous data clock/ SPI clock
10 PCM_IN / SPI_MOSI PCM synchronous data input /SPI data input
11 PCM_SYNC / SPI_CSB PCM synchronous data sync / SPI chip select, active low
12 PIO[0] Programmable Input / Output , 32KHz Sleep Clock In
13 VDD_PADS VDD_IO
14 PIO[4] Programmable Input / Output
15 SPI/#PCM SEL Select SPI or PCM , High = SPI / Low = PCM
16 UART_TX UART Data Output , Active High
17 UART_RX UART Data Input , Active High
18 PIO[2] Programmable Input / Output , Clock REQ Out
19 PIO[9] Programmable Input / Output
20 UART_CTS UART clear to send , Active Low
21 UART_RTS UART request to send , Active Low
22 VDD_3V3 VDD_3V3 Supply
23 VDD_1V8 VDD_1V8 Supply
24 NC NC
25 NC NC
26 GND Ground
27 SDA EEPROM Data (option) , Only F1C81E
28 WP EEPROM Write protect (option) , Only F1C81E
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1.6 Module Dimension
1. Top View (mm)
2. Side View (mm)
P C B
Filter
7
8
1.10.40.8
0.4
0.8
1.6
CSR
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3.3
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4.3
0.7
0.7
SHIELD CAN
1.45±0.05
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2. Characteristics
2.1 Electrical Characteristics
Absolute Maximum Ratings
Rating MIN MAX
Storage temperature -40°C 85°C
Max Junction Temperature(Tjmax)¹ 115°C
Supply voltage (VDD_3V3) 2.3V 4.8V
Supply voltage (VDD_1V8) 1.7V 2.0V
I/O voltage (VDD_PADS) 1.7V 3.6V
Other terminal voltages VSS-0.4V VCC+0.4V
1. Condition : On a 4 layer PCB
Recommended Operating Conditions
Operating Condition MIN MAX
Operating temperature range -30°C 85°C
Theta JA (θJA)¹ 83°C
Supply voltage (VDD_3V3) 2.3V 4.8V
Supply voltage (VDD_1V8) 1.75V 1.95V
I/O voltage (VDD_PADS) 1.7V 3.6V
RESETB VDD_PADS VDD_HOST
1. Condition : On a 4 layer PCB
2.2 RF Characteristics
Transmitter
Specification Condition MIN TYP MAX UNIT
Output transmit power Normal -6 2 8 dBm
Transmit power density Normal 4 dBm
Transmit power control Normal 2 8 dBm
Frequency Range Normal 2400 2483.5 MHz
20dB bandwidth for modulated carrier Normal 850 1000 KHz
Adjacent channel transmit power ±2MHz -20 dBm
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±3MHz
±4MHz
-40
-40
Modulation Characteristics
f1avg
f2max
f2avg / f1avg
140
115
175
80
KHz
KHz
%
Initial carrier frequency tolerance Normal -20 20 KHz
Carrier frequency Drift
One slot packet(DH1)
Three slot packet(DH3)
Five slot packet(DH5)
-25
-40
-40
25
40
40
KHz
Transceiver
Specification Condition MIN TYP MAX UNIT
Adjacent channel transmit power
30MHz ~ 1GHz
1GHz ~12.75GHz
1.8GHz ~5.1GHz
5.1GHz ~5.3GHz
-36
-30
-47
-47
dBm
Receiver
Specification Condition MIN TYP MAX UNIT
Sensitivity level (0.1% BER) Single slot packets -70 -83 dBm
Transmit power density Multi slot packet -70 -80 dBm
C/I performance
co-channel
1MHz
(Adjacent channel)
2MHz
(2nd Adjacent channel)
3MHz
(3rd Adjacent channel)
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0
-30
-40
dB
Blocking performance
30MHz ~ 2000MHz
2000MHz ~ 2400MHz
2500MHz ~ 3000MHz
3000MHz ~ 12.75GHz
-10
-27
-27
-10
dBm
Intermodulation performance n=5 -39 dBm
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Maximum input level -20 -10 dBm
2.3 Power Consumption
Power Consumption is affected by the Host.
Link State Power Consumption Profile
ACL 20mA Under A2DP,SPP,MAP,OBEX etc
SCO 37mA Under HFP
No Connection , Ready 2mA Under
Connection , Ready 3mA Under
No Connection , Sleep 200uA Under
3. Interface
3.1 UART interface
Four signals are used to implement the UART function.
UART_TX and UART_RX transfer data between the two devices. The remaining two signals, UART_CTS
and UART_RTS, can be used to implement RS232 hardware flow control where both are active low
indicators.
HOST_RX
HOST_TX
HOST_CTS
HOST_RTS
HOST
UART_RX
UART_TX
UART_CTS
UART_RTS
F1C81
3.1.1 UART Setting User can change data format the following selection using PSKEY.
However, host shall communicate with default setting UART connection initiated at first time.
Baud Rate = (PSKEY_UART_BAUD_RATE) / 0.004096
Parameter Possible value
Baud Rate 9600 ~ 4M Baud
Flow Control None
Parity None, Odd or Even
Number of Stop Bits 1 or 2
Bits per channel 8
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3.2 Audio Interfaces
F1C81 has a digital audio interface that is configurable as either a PCM or I2S.
3.2.1 PCM Interface - Continuous transmission and reception of PCM encoded audio data over Bluetooth
- Processor overhead reduction through hardware support for continual transmission and reception of
PCM data
- PCM interface master, generating PCM_SYNC and PCM_CLK
- PCM interface slave, accepting externally generated PCM_SYNC and PCM_CLK
- Various clock formats including :
. Long Frame Sync
. Short Frame Sync
. GCI timing environments
- 13-bit or 16-bit linear, 8-bit u-law or A-law companded sample formats
- Receives and transmits on any selection of 3 of the first 4 slots following PCM_SYNC
3.2.2 I2S Interface The digital audio interface supports the industry standard formats for I2S, left-justified or right-justified. The
interface shares the same pins as the PCM interface, which means each audio bus is mutually exclusive in
its usage.
PCM Interface I2S Interface
PCM_OUT SD_OUT
PCM_IN SD_IN
PCM_SYNC WS
PCM_CLK SCK
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4. Application Schematic
4.1 1.8V Supply
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4.2 2.7~3.3V Supply
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5. PCB Layout
1. Top View (mm)7
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1.10.40.8
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0.8
1.6
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3.3
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1.0
0.7
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6. Reflow Temperature Profile Recommended solder reflow profile are shown in below and follow the lead-free profile in accordance with
JEDEC Std 20C. Table lists the critical reflow temperatures. Flux residue remaining from board assembly
can contribute to electrochemical migration (ECM) over time. This depends on a number of factors, including
flux type, amount of flux residue remaining after reflow, and stress conditions during product use, such as
temperature, humidity, and potential difference between pins. Care should be taken in selecting production
board/module assembly processes and materials, taking into account these factors.
Tem
pera
ture
(deg
ree)
260℃ MAX.10sec.MAX
Pre-Heating150~200℃120sec.MAX
60 sec.MAX Above 220℃
220
200
150
Time
Process Step Lead-Free Solder
Pre-Heat 150~200°C
Pre-Heat Time MAX 120 sec.
Time above liquidus Above +220°C. MAX 60 sec
Peak temperature MAX +260°C
Time within 5°C of peak temperature MAX 10 sec
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7. Revision History
Revision Date Change Descriptions Issued by
Rev 1.0 2012-10-08 Initial release S.J.LEE
Rev 1.1 2013-09-23
Model Name Change(F1C80⇒F1C81)
Electrical Characteristic
Module Layout & Description
J.M.KWON
Rev 1.2 2013-10-29 TX Power ,RX Sensitivity Change.
Power Consumption Add J.M.KWON
Rev1.3 2013-11-26 Junction Temperature Add J.M.KWON