BCM 10-03-2006 F. Anghinolfi CERN Slide 1

NINO, an ultra-fast, low-power, front-end amplifier discriminator

(developed for the Time-Of-Flight experiment in ALICE)

F. Anghinolfi, P. Jarron, CERN

F. Krummenacher, Smart Silicon System, Lausanne

E. Usenko, IHEP Protvino

M.C.S. Williams, INFN Bologna

BCM 10-03-2006 F. Anghinolfi CERN Slide 2

NINO, an ultra-fast, low-power, front-end amplifier discriminator

500fC average charge, up to few pC.

Typical threshold at 50fC.

< 3000 el. Noise @ 10pF Cdet

Tunable input impedance (40-75)

NINO Electronic channel

Differential cathode-anode signal.

LVDS outputs

1ns front edge delay vs. input

< 25 ps rms front edge time jitter

Pulse width variable with input charge

BCM 10-03-2006 F. Anghinolfi CERN Slide 3

NINO, an ultra-fast, low-power, front-end amplifier discriminator

• Common gate circuit with very high bandwidth (<1ns peaking time)

• The input charge is flowing through the output load, while the input impedance is low

• Input impedance (1/gmsb) is tuned to match the impedance of detector signal transmission lines

• Stable (no signal feedback, fully differential circuit)

Input stage (half of fully differential circuit)

Input Impedance (1/gmsb)

v=ZL.i

Very fast MRPC signal (100ps rise

time)

Input stage

BCM 10-03-2006 F. Anghinolfi CERN Slide 4

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Input stage biasing circuit

20

)1/(.2

.

1

RpMML

WKn

I

2

1

W

WM

Rp Source impedance of M2

Current expression

Rp

IL

WKn

GmM

0

2

.2

.2

1/1

If M=2

Channel input device is same size and bias as M2

BCM 10-03-2006 F. Anghinolfi CERN Slide 5

NINO, an ultra-fast, low-power, front-end amplifier discriminator

• Low bandwidth feedback circuit to control input stage common mode DC settings

• Th+/Th- are external inputs (voltages) to create current imbalance on input stage differential branches

Diff pair outputs senseInput stage currents

BCM 10-03-2006 F. Anghinolfi CERN Slide 6

2

NINO, an ultra-fast, low-power, front-end amplifier discriminator

• Fully differential structure from input to output

• Gain is obtained by 4 consecutive stages as . High bandwidth low gain stages (G=6, BW=500Mhz)

• Last stage is a open-drain differential pair to provide LVDS like outputs

2

i1 i2 Diff pair outputs sense

BCM 10-03-2006 F. Anghinolfi CERN Slide 7

NINO, an ultra-fast, low-power, front-end amplifier discriminator

• Input stage, DC condition and Threshold setting

2

• Gain is obtained by 4 cascaded high bandwidth low gain stages (G=6, BW=500Mhz)

Fully differential structure from input to output

BCM 10-03-2006 F. Anghinolfi CERN Slide 8

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Simulation results

Input stage Channel Outputs

100 fC to 2.1pC input charge, 50fC threshold20 fC to 200fC input charge

BCM 10-03-2006 F. Anghinolfi CERN Slide 9

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Delay and Width Time Measurement (test bench)

NINO channel delay is only a fraction of

this delay measurement

BCM 10-03-2006 F. Anghinolfi CERN Slide 10

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Pulse Width Measurement vs. Simulation (test bench)

BCM 10-03-2006 F. Anghinolfi CERN Slide 11

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Time Jitter Measurement (test bench)

Differential output jitter snapshot

200 ps

BCM 10-03-2006 F. Anghinolfi CERN Slide 12

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Time slewing versus input charge (test beam, with MRPC detector)

Pulse width measurement can be used for time walk correction

BCM 10-03-2006 F. Anghinolfi CERN Slide 13

NINO, an ultra-fast, low-power, front-end amplifier discriminator

Time resolution and efficiency (test beam, with MRPC detector)

Beam spot 14.4ps

MRPC 25ps

NINO 20ps

HPTDC 21.2ps

Contributions to 41ps resolution

99.9%

Quoted < 5ps now

BCM 10-03-2006 F. Anghinolfi CERN Slide 14

NINO, an ultra-fast, low-power, front-end amplifier discriminator

• IBM 0.25 m CMOS technology• 8 channels, 2x4 mm2 chip• Channel power is 27mW• Time resolution <5ps rms• Delay time 1ns• Pulse Width 2 to 8ns (or 16 to 21ns)• 3000 el. Noise @ Cdet=10pF

The NINO ASIC bonded to the PCB

BCM 10-03-2006 F. Anghinolfi CERN Slide 15

NINO, an ultra-fast, low-power, front-end amplifier discriminator