Extent3 exactpro the_future_of_risk_controls
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The Future of Risk ControlsEXTENT Trading Technology Trends and Quality Assurance
EXTENT Conference April 14, 2012, Kostroma, Russia
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Brokerage System
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Brokerage System
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Naked Sponsored Access
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Access Procedures
Financial Controls to prevent:o Orders that exceed appropriate pre-set credit or capital thresholds o Orders that exceed appropriate price or size parameters
Regulatory Controls:o Prevent entry of orders unless there has been compliance with all regulatory requirementso Restrict a person’s access to only those market-access systems and technologies that are pre-approved by the brokerso Provide surveillance system of the brokers with immediate post-trade execution reports
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Risk Control Module
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Implementation options:
• Hardware implementation: Firewalls Microcontrollers FPGA vs. ASIC
• Software implementation: A program integrated into OS
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FIREWALLS
Types of traffic:PacketsConnectionsState
Technologies in Firewalls:Packet filteringProxy firewallStateful packet filtering (Dynamic Filtering)
Dynamic Filtering:The best combination of performance and securityACL (Access Control List)A state table
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Microcontroller• central processing unit - ranging from small and simple 4-bit processors
to complex 32- or 64-bit processors
• volatile memory (RAM) for data storage
• ROM, EPROM, EEPROM or Flash memory for program and operating parameter storage
• discrete input and output bits, allowing control or detection of the logic state of an individual package pin
• serial input/output such as serial ports (UARTs)
• other serial communications interfaces like I²C, Serial Peripheral Interface and Controller Area Network for system interconnect
• peripherals such as timers, event counters, PWM generators, and watchdog
• A clock generator - often an oscillator for a quartz timing crystal, a resonator or RC circuit
• A lot of microcontrollers include analog-to-digital converters, some include digital-to-analog converters
• in-circuit programming and debugging support
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FPGA vs. ASIC
(FPGA) Field-programmable gate array Configurable by customer. Reprogrammed as many times as customer needed. High performance. High costs.
(ASIC) Application-specific integrated circuito Configurable by customer.o Non possible to reprogram.o The performance higher than FPGA.o The cost lower than FPGA with large amounts.
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Non-physical implementation. Only a program integrated into Client workstation
Low costs
Simple installation
Acceptable speed performance for most tasks
Mobility and speed when requirements change
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Pricing module
Goal: to provide correct parameters to the risk control
Risk exposure of portfolioo e.g. options delta calculation
Pricing thresholdo Parameters for pricing threshold calculation
To make it fast:o Delegate complicated calculations to GPU
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Concurrent Computing in GPU
Portfolio: Parallel pricing for several options
Monte-Carlo simulation: Parallel simulation of several paths
Delta: Parallel pricing with different market rates
Pricing
Market Rates
Market Rates
PortfolioPortfolio
New OrderNew Order
Portfolio revaluation
Risk exposure
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Example: SABR model for American options (Monte-Carlo simulation)
SABR – Stochastic Alpha, Beta, Rhoo Stochastic volatility model with three parameters – alpha, beta, rho o Price and volatility evolution based on 2 correlated Wiener processeso The model can be calibrated to suit the market data
American options – early exercise
Monte-Carlo Simulation – average random walk
Early exercise requires additional computationo Solution of a system of linear equationso No parallelizing Gauss method ~ O(n3)o Parallelizing n multiplications and a number of additions
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Thank you!
Questions?