Slide 1

ENGG3190 Logic Synthesis Boolean Satisfiability Winter 2014 S. Areibi School of Engineering University of Guelph

Slide 2

Outline SAT ProblemSAT Problem TerminologyTerminology How do we solve it?How do we solve it? ApplicationsApplications Logic Circuit RepresentationLogic Circuit Representation EfficiencyEfficiency 2

Slide 3

What is SAT? How to make a Boolean Function=1 Why is it important Application (Network Repair) Conjunction Normal Form Boolean Satisfiability

Slide 4

SAT in a Nutshell Given a Boolean formula (propositional logic formula), find a variable assignment such that the formula evaluates to 1, or prove that no such assignment exists. For n variables, there are 2 n possible truth assignments to be checked. First established NP-Complete problem. S. A. Cook, The complexity of theorem proving procedures, Proceedings, Third Annual ACM Symp. on the Theory of Computing,1971, 151-158 F = (a + b)(a + b + c) a bb cccc 0 1 0 0 00001 1 1 111

Slide 5

Slide 6

Using BDDs to Solve SAT R. Bryant. Graph-based algorithms for Boolean function manipulation. IEEE Trans. on Computers, C-35, 8:677-691, 1986. Store the function in a Directed Acyclic Graph (DAG) representation. Compacted form of the function decision tree. Reduction rules guarantee canonicity under fixed variable order. Provides for efficient Boolean function manipulation. Overkill for SAT. Overkill for SAT.

Slide 7

Why Bother? Core computational engine for major applications EDA Testing and Verification Logic synthesis FPGA routing Path delay analysis And more AI Knowledge base deduction Automatic theorem proving

Slide 8

For what values of d0,d1,d2,d3 can Z = 1??

Slide 9

Conjunctive Normal Form F = (a + b)(a + b + c) Simple representation (more efficient data structures) Logic circuit representation Circuits have structural and direction information Circuit CNF conversion is straightforward!!! Problem Representation a b d e c (a + b + d) (a + d) (b + d) d (a + b) (c + d + e) (d + e) (c + e) e (c d) literal clause

Slide 10

Clauses Positive Literal Negative Literal

Slide 11

If a clause evaluates to a 0 we call it conflicting It is conflicting because it conflicts with the goal of Boolean Satisfiability. If a clause evaluates to a 1 we call it satisfied. In the third clause since we only know the value of a it is unresolved! a = 0, b = 1 Clause = 0 Conflicting!! a = 0, b = 1 Clause = 1 Satisfied!! a = 0, b = 1 Unresolved!! a = 0, b = 1 Clause = 1 Satisfied!!

Slide 12

Deduction is at the heart of Boolean Satisfiability. If we can deduce that other values must be assigned to some value for SAT Example?

Slide 13

Can BDDs help? Yes but many Boolean functions are large and using BDDs will be complex!

Slide 14

Recursion to solve Satisfiability. Boolean Constraint Propagation (BCP). The Algorithm. Limitation. Code for SAT problem. Boolean Satisfiability

Slide 15

However, only C is the deciding factor (exactly one unassigned literal found in the third clause). What do we know? c has to be a 0 so that c=1 deduced by implication We deduced by implication that c=0 11 00 This clause has become unit C must be 0

Slide 16

Satisfied Literal Unsatisfied Literal Unassigned Literal (a +b+ c)(b + c)(a + c) a = T, b = T, c is unassigned Implication Implication A variable is forced to be assigned to be True or False based on previous assignments. Unit clause rule Unit clause rule (rule for elimination of one literal clauses) An unsatisfied clause is a unit clause if it has exactly one unassigned literal. The unassigned literal is implied because of the unit clause. Boolean Constraint Propagation Boolean Constraint Propagation (BCP) Iteratively apply the unit clause rule until there is no unit clause available. a.k.a. Unit Propagation Workhorse of DLL based algorithms. Implications and Boolean Constraint Propagation

Slide 17

Phi has nine clauses (Omega1 Omega9) Not easy to say Not easy to say if Phi is Satisfiable!! Imagine thousands of clauses partial assignment If we perform the partial assignment then what happens?

Slide 18

Nothing much happens? I cant satisfy any of these clauses yet. So what should we do?

Slide 19

Assigning x 1 =1 implies that x2 has to equal to 1 and x3 also.!! Which clauses imply this decision? Dont worry about these..

Slide 20

W7 and W8 are already satisfied! (dont worry about them) What next?

Slide 21

In gigantic circuits the BCP goes on and on..

Slide 22

If X5=1 and X6=1 then w4 and w5 are unit (Satisfiable). So we are making great progress We continue to uncover clauses that make unit to reach a solution. So far so good! What next? Unit

Slide 23

Unfortunately we have a conflict This is one reason of using recursion. What should we do now? Undo some previous decision taken that might have led to this situation!!

Slide 24

what is the name So what is the name of the algorithm for the recursive framework?

Slide 25

This the heart and soul of every SAT engine!! (50 years old) It is famous and has an entry in Wikipedia.

Slide 26

Lots of work on SAT. What do you think research concentrated on to make the algorithm more efficient?

Slide 27

DLL Algorithm Davis, Logemann and Loveland M. Davis, G. Logemann and D. Loveland, A Machine Program for Theorem-Proving", Communications of ACM, Vol. 5, No. 7, pp. 394-397, 1962 Also known as DPLL for historical reasons Basic framework for many modern SAT solvers

Slide 28

Basic DLL Procedure - DFS (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c)

Slide 29

Basic DLL Procedure - DFS (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) a

Slide 30

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) Decision

Slide 31

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 Decision

Slide 32

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 Decision

Slide 33

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 d=1 c=0 (a + c + d) a=0 d=0 (a + c + d) Conflict! Implication Graph

Slide 34

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 d=1 c=0 (a + c + d) a=0 d=0 (a + c + d) Conflict! Implication Graph

Slide 35

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 Backtrack

Slide 36

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 d=1 c=1 (a + c + d) a=0 d=0 (a + c + d) Conflict! 1 Forced Decision

Slide 37

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 Backtrack

Slide 38

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 1 Forced Decision

Slide 39

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 d=1 c=0 (a + c + d) a=0 d=0 (a + c + d) Conflict! 1 c 0 1 Decision

Slide 40

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 Backtrack

Slide 41

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 d=1 c=1 (a + c + d) a=0 d=0 (a + c + d) Conflict! 1 c 0 1 1 Forced Decision

Slide 42

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 Backtrack

Slide 43

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 Forced Decision

Slide 44

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 b 0 Decision

Slide 45

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 b 0 c=1 b=0 (a + b + c) a=1 c=0 (a + b + c) Conflict!

Slide 46

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 b 0 Backtrack

Slide 47

Basic DLL Procedure - DFS a 0 (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 b 0 1 a=1 b=1 c=1 (a + b + c) Forced Decision

Slide 48

Basic DLL Procedure - DFS a (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 b 0 1 a=1 b=1 c=1 (a + b + c)(b + c + d) d=1 0

Slide 49

Basic DLL Procedure - DFS a (a + c + d) (a + c + d) (a + c + d) (a + c + d) (a + b + c) (b + c + d) (a + b + c) (a + b + c) b 0 c 0 1 c 0 1 1 1 b 0 1 a=1 b=1 c=1 (a + b + c)(b + c + d) d=1 SAT 0

Slide 50

Since problems are large (Vars, Literals, Clauses) we cannot use BDDs!! What are available SAT code available?

Slide 51

Many Good SAT Solvers. Examples: MiniSat, from NiKlas Een, Sweden CHAFF, Sharad Malik (Princeton) GRASP (Greedy Randomized Adaptive Search) from Karem Sakallah, University of Michigan Many others SAT Solvers

Slide 52

Lots of information on the web and lots of papers and research What next? Applications in VLSI Design and Logic Synthesis

Slide 53

Using SAT for Logic. Real Netlists logic of gates CNF Applications: Similarity of logic functions Gate Consistency Function. Boolean Satisfiability

Slide 54

BDDs are not equivalent to SAT! BDDs are a canonical representation of a Boolean Function. We can do SAT with a BDD but it is not the most efficient way!

Slide 55

Exactly the same inputs! Is F == G? For every pair of output X = F 1 XOR G 1, Y = F 2 XOR G 2 Z = X OR Y, Z == 1 IFF F NOT EQUAL TO G!

Slide 56

For NAND gate, (Phi) d = d XNOR (ab) (Phi) d = (a + d) (b + d)(a + b + d) How? PHI

Slide 57

Y = AB + AB Y = AB + AB

Slide 58

You enter a pattern for inputs and output and then you say either YES that is what the circuit does, or NO that is not what the circuit does. (Phi) d = d XNOR (ab) == 1 Consistent (Phi) d = d XNOR (ab) == 0 inconsistent

Slide 59

(Phi) g = g XNOR (d + e) = (d + g)(e + g)(d + e + g) (d + g)(e + g)(d + e + g)

Slide 60

Five gate consistency functions listed! No Boolean simplification necessary for the whole function How can we remember the CNF for each gate?? rules Are there rules for all kinds of basic gates?

Slide 61

Just need to remember them!!

Slide 62

Slide 63

Slide 64

SAT has largely displaced BDDs for just solve it apps Reason is scalability: can do large problems faster, more reliably Still, SAT, like BDDs, not guaranteed to find a solution in reasonable time or space. However, BDDs are still used in many important applications apart from SAT. Many important applications of SAT for Logic Synthesis and Verification. 40 years old, but still the big idea: DPLL Many recent engineering advances make it extremely fast!! Summary