Emulated EEPROM Function for Data storage (ref. 908LJ12)
description
Transcript of Emulated EEPROM Function for Data storage (ref. 908LJ12)
Prepared by K.M. Fung 8 Jan 2002Internal Use Only 1
Emulated EEPROM Function for Data storage (ref. 908LJ12)Emulated EEPROM Function for Data storage (ref. 908LJ12)
• The code is pre-installed in ROM and ready to use - USER FRIENDLY!• Data file can be located in any location of RAM - FLEXIBLE!• User defined data size to be programmed, 2bytes to 15 bytes at a time - FLEXIBLE!• FLASH endurance can be improved up to 60 times with 128 bytes block size.
CPUSPD
Data Size
Address High 2
Address Low 2
Data0
Data1
DataN
DataFile2 pointer :LDHX $<DataFile1PTR>JSR WRITE_EE :
:LDHX $<DataFile1PTR>JSR READ_EE :
CPUSPD
Data Size
Address High 1
Address Low 1
Data0
Data1
DataN
DataFile1 pointer
RAM
Segment0
Segment1 Segment2 Segment3 Segment4
Segment5 Segment6
SizeControl Control
BlockBoundary
FLASH memory
LIFO
Prepared by K.M. Fung 8 Jan 2002Internal Use Only 2
In Circuit Flash Programming Platform (ref. 908LJ12)In Circuit Flash Programming Platform (ref. 908LJ12)
Function Name Calling Address Feature
WRITE_EE $FC00 Stack the DATA segment from data file to the FLASH block and updates dirty control bitaccordingly. If block overflows, performs block erase.
READ_EE $FC03 Read last updated DATA segment from FLASH block back to data file.
LDRNGE $FF30 Load data from FLASH block to data file with specific location and size.
PRGRNGE $FC06 Program specific FLASH location with data listed in data file.
ERARNGE $FCBE Perform mass erase or single block erase according to user selection.
ICP_LDRNGE $FF24 Perform same operation as LDRNGE. This subroutine is specially designed to use undermonitor mode.
ICP_PRGRNGE $FF28 Perform same operation as PRGRNGE. This subroutine is specially designed to useunder monitor mode.
ICP_ERARNGE $FF2C Perform same operation as ERARNGE. This subroutine is specially designed to useunder monitor mode.
CPUSPDData Size
Address High 1Address Low 1
Data0Data1
DataN
DataFile1 pointer
CPUSPDData Size
Address High 1Address Low 1
Data0Data1
DataN
DataFile2 pointer
:LDHX $<DataFile1PTR>JSR PRGRNGE :
:LDHX $<DataFile2PTR>JSR LDRNGE :
PROGRAM VERIFY
FLASH
RAM RAM
Prepared by K.M. Fung 8 Jan 2002Internal Use Only 3
ISP?
Start
Execute User Code
Disable COP.Exec. ISP Routine
Application System
TXD
RXDSCI
68HC908MCUMC145407RS232
HC908 Flash In System Programming through SCI PortHC908 Flash In System Programming through SCI Port
The window s/w allow user - Load/Upload data from MCU - Erase/Program/Verify Flash Memory
Prepared by K.M. Fung 8 Jan 2002Internal Use Only 4
RegistersMonitor ROM
Vectors
$0040
$023F
$FE00
FLASH ProgrammingAlgorithm
$0000
$FFFF
ISP Routine
RxD
TxD
PTA0
I/O Registers
RAM
SCI
FLASH Data
FLASH
$8000
Erase FLASH
Application Software
Programming and erasing of FLASH locations cannot be performed by code being executed from the FLASH memory
HC908 Flash In System Programming through SCI PortHC908 Flash In System Programming through SCI Port
Prepared by K.M. Fung 8 Jan 2002Internal Use Only 5
In-Circuit Programming system configurationIn-Circuit Programming system configuration
• In-System Programming is a process by which the device is programmed or In-System Programming is a process by which the device is programmed or erased with the device on the final end target system without open the case erased with the device on the final end target system without open the case of the system.of the system.
Remark: OSC_SEL and HC4066 is used when the oscillation frequency of target system is not equal to the oscillation
frequency which required to entry to the monitor mode of the MCU.
Personal Computer Interface Board Target System
Software
- MCUscribe- ICS08 RS232
GND
VCC_S
VPP
PA0
OSC_SEL*
OSC_1
M68SPGMR08 Additional H/W:
- Header x 1 pcs- Diode x 2 pcs- Resistor- HC4066* x 1 pcs
It may be some different control signals between interface board and target system depends on different applicationExample: GP32 and MR24/32 ICP Reference Demo board use 4 wires (PA0, Vpp, Vcc_s and GND).
Prepared by K.M. Fung 8 Jan 2002Internal Use Only 6
GP32 In-Circuit Programming Reference DemoGP32 In-Circuit Programming Reference Demo
GP32 Target board simulates a typical application, user running code will beexecuted after provided the power to the board (rurns the LED on and offrepeatedly) Remove the Target Board power and then
upgrade the firmware through four wiresand SPGMR with PC