Emerging Memory Technologies

Sudhanva Gurumurthi

http://www.cs.virginia.edu/~gurumurthi

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Hard Disk Drive (HDD)Solid State Drive (SSD)

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The Transistor

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If the voltage applied at the gate > a threshold voltage, a conducting channel forms between the source and drain

Flash Memory

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• Floating Gate Transistor (FGT)– Has a “floating

gate” between the gate and the channel that is surrounded by SiO2

• Removing the voltage on the gate leaves the induced charges on the floating gate– Non-Volatility

Tunneling

6Image Source: http://www.bun.kyoto-u.ac.jp/~suchii/Bohr/tunnel.html

Quantum mechanics provides for wave-particle duality

Flash Cell Wearout• Writing and erasing flash cells is bad!

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Transistor

Write

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Erase

State After Write

State After Erase

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Impact on Retention Time

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Memory cell state at time ‘t’

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Memory cell state after retention period

- - Time to LeakTime to Leak

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Charge trapping increases Stress Induced Leakage Current (SILC)

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Boosting Flash EnduranceComputed for a Flash Cell Using Our Model

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Magnetic Tunnel Junctions

• If tunnel barrier is thin enough, electrons can tunnel from one ferromagnet to the other

• Electrical resistance of the MTJ depends on the orientation of the fields on the two plates

12Image Source: Wikipedia

Data Representation in an MTJ

13Image Source: http://www.mdm.imm.cnr.it/SPAM3/background.html

Used in Magnetic RAM (MRAM) and Spin Transfer-Torque RAM (STT-RAM)