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![Page 1: Electrical and Electronics Engineering Institute College of Engineering University of the Philippines, Diliman IML Probationary Members’ Final Project.](https://reader036.fdocuments.us/reader036/viewer/2022081419/56649f0c5503460f94c20206/html5/thumbnails/1.jpg)
Electrical and Electronics Engineering InstituteCollege of Engineering
University of the Philippines, Diliman
IML Probationary Members’ Final IML Probationary Members’ Final Project – ECE TrackProject – ECE Track
Microelectronics and Microprocessors Laboratory
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OverviewOverview
Introduction
Project Specifications
Methodology
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LOW POWERLOW POWER
Mobile CommsMobile Comms Field TestingField Testing
Health MonitoringHealth Monitoring
CurrentCurrent TrendTrendCurrentCurrent TrendTrend
IntroductionIntroduction • Project Specifications• Methodology • Project Specifications• MethodologyIntroductionIntroduction • Project Specifications• Methodology • Project Specifications• Methodology
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• design & implement a CMOS op-amp topology for low-power application
• formulate testing methodology• for device characterization• generating plots for datasheet
• model bond wires
ProjectProject ObjectivesObjectivesProjectProject ObjectivesObjectives
IntroductionIntroduction • Project Specifications• Methodology • Project Specifications• MethodologyIntroductionIntroduction • Project Specifications• Methodology • Project Specifications• Methodology
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250,000 V/V gain
250 μW power consumption
rail-to-rail input/output capability
LowLow PowerPower IndustryIndustryLowLow PowerPower IndustryIndustry
IntroductionIntroduction • Project Specifications• Methodology • Project Specifications• MethodologyIntroductionIntroduction • Project Specifications• Methodology • Project Specifications• Methodology
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Different Process!
LPC661 by National Semiconductor
Op-ampOp-amp FeaturesFeaturesOp-ampOp-amp FeaturesFeatures
IntroductionIntroduction • Project Specifications• Methodology • Project Specifications• MethodologyIntroductionIntroduction • Project Specifications• Methodology • Project Specifications• Methodology
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TSM27M2C by STMicroelectronicsDifferent Topology!
Op-ampOp-amp FeaturesFeaturesOp-ampOp-amp FeaturesFeatures
Bi-CMOS Process!
IntroductionIntroduction • Project Specifications• Methodology • Project Specifications• MethodologyIntroductionIntroduction • Project Specifications• Methodology • Project Specifications• Methodology
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Design ConstraintsDesign ConstraintsDesign ConstraintsDesign Constraints
Minimum DC Gain (AMinimum DC Gain (Avv))Minimum DC Gain (AMinimum DC Gain (Avv))
15,00015,00015,00015,000
2.5 mW2.5 mW2.5 mW2.5 mW
Maximum Power ConsumptionMaximum Power ConsumptionMaximum Power ConsumptionMaximum Power Consumption
IntroductionIntroduction • • Project SpecificationsProject Specifications• Methodology• MethodologyIntroductionIntroduction • • Project SpecificationsProject Specifications• Methodology• Methodology
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2-stage or Miller2-stage or Miller2-stage or Miller2-stage or Miller
Design & ImplementationDesign & Implementation
DifferentialDifferentialAmplifierAmplifier
DifferentialDifferentialAmplifierAmplifier
CommonCommonSourceSource
AmplifierAmplifier
CommonCommonSourceSource
AmplifierAmplifier
BiasBiasCircuitCircuit
BiasBiasCircuitCircuit
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Differential AmplifierDifferential AmplifierDifferential AmplifierDifferential Amplifier
Design & ImplementationDesign & Implementation
Group TransistorsGroup TransistorsGroup TransistorsGroup Transistors Derive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter Dependencies
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Differential AmplifierDifferential AmplifierDifferential AmplifierDifferential Amplifier
Design & ImplementationDesign & Implementation
11
22
33
Transistor PairsTransistor PairsTransistor PairsTransistor Pairs
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Differential AmplifierDifferential AmplifierDifferential AmplifierDifferential Amplifier
Design & ImplementationDesign & Implementation
Group TransistorsGroup TransistorsGroup TransistorsGroup Transistors
Set CurrentSet CurrentSet CurrentSet Current
Set LengthSet LengthSet LengthSet Length
Compute WidthsCompute WidthsCompute WidthsCompute Widths
Size ResistorSize ResistorSize ResistorSize Resistor
Extract ParametersExtract ParametersExtract ParametersExtract Parameters
Check ConstraintsCheck ConstraintsCheck ConstraintsCheck Constraints Met?Met? Met?Met? EndEndEndEndYY
Adjust WidthsAdjust WidthsAdjust WidthsAdjust Widths
NN
2'
2D GS T
k WI V V
L 2'
2D GS T
k WI V V
L
Derive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter Dependencies
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design and ImplementationDesign and ImplementationDifferential AmplifierDifferential AmplifierDifferential AmplifierDifferential Amplifier
DC Gain
0
50
100
150
200
250
-0.0
149
9
-0.0
140
1
-0.0
1303
-0.0
1205
-0.0
110
7
-0.0
100
9
-0.0
0911
-0.0
0813
-0.0
071
4
-0.0
061
6
-0.0
051
8
-0.0
0420
-0.0
0322
-0.0
022
4
-0.0
012
6
-2.8
2E-0
4
6.99
E-0
4
0.00
168
0.002
661
0.00
3642
0.00
462
3
0.00
560
4
0.006
585
0.00
7566
0.00
854
7
0.00
952
8
0.010
509
0.01
149
0.01
2471
0.01
345
2
0.01
443
3
vid
gain deriv(vout)
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Transistor Computed Final
NM0-NM1 2.9um 580nmNM2-NM3 ----- 900nmPM0-PM1 7.55um 18umPM2-PM3 15.1um 36um
Design and ImplementationDesign and ImplementationDifferential AmplifierDifferential AmplifierDifferential AmplifierDifferential Amplifier
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design and ImplementationDesign and ImplementationDifferential AmplifierDifferential AmplifierDifferential AmplifierDifferential Amplifier
Vic 1.53V * all voltages in mV
Vid 2.83mV Av 228 unless indicated otherwise
LABEL Id (uA) Vds Vdsat Vds-Vdsat Vgs Vth Vov
NM0 4.921 1381 295.7 1085 762.8 470 292.8NM1 4.828 762.8 295.5 467.3 762.8 470.3 292.5NM2 10 984.1 336.9 647.2 984.1 649.1 335NM3 10 824.8 334.1 490.6 824.8 481.6 343.2PM0 4.923 902 128.2 773.8 754.5 669.7 84.83PM1 4.83 1520 126.3 1394 751.7 669.6 82.15PM2 9.749 216.9 126.8 90.04 691.1 605.4 85.76PM3 10 691.1 126.9 564.2 691.1 605.3 85.87
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & ImplementationCommon Source AmplifierCommon Source AmplifierCommon Source AmplifierCommon Source Amplifier
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & ImplementationCommon Source AmplifierCommon Source AmplifierCommon Source AmplifierCommon Source Amplifier
Design & ImplementationDesign & Implementation
Group TransistorsGroup TransistorsGroup TransistorsGroup Transistors
Set CurrentSet CurrentSet CurrentSet Current
Set LengthSet LengthSet LengthSet Length
Vary WidthsVary WidthsVary WidthsVary Widths
Plot GainPlot GainPlot GainPlot Gain
Extract ParametersExtract ParametersExtract ParametersExtract Parameters
Check ConstraintsCheck ConstraintsCheck ConstraintsCheck Constraints Met?Met? Met?Met? EndEndEndEndYY
Adjust WidthsAdjust WidthsAdjust WidthsAdjust Widths
NN
Derive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter DependenciesDerive Parameter Dependencies
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & ImplementationCommon Source AmplifierCommon Source AmplifierCommon Source AmplifierCommon Source Amplifier
Family of Gain Curves
-120
-100
-80
-60
-40
-20
0
0
0.1
7
0.34
0.5
1
0.6
8
0.8
5
1.02
1.1
9
1.3
6
1.5
3
1.7
1.8
7
2.0
4
2.2
1
2.38
vid (V)
Gain
(A
v) 10u
20u
30u
40u
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Gain
-100
-80
-60
-40
-20
0
1.3
1.32
1.33
1.35
1.36
1.38
1.39
1.41
1.43
1.44
1.46
1.47
1.49
vid (V)
Gai
n (
Av)
deriv(vout)
Design & ImplementationDesign & ImplementationCommon Source AmplifierCommon Source AmplifierCommon Source AmplifierCommon Source Amplifier
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & ImplementationCommon Source AmplifierCommon Source AmplifierCommon Source AmplifierCommon Source Amplifier
Transistor Simulated Final
NM0 3um 3umNM1 3um 3umPM0 30um 36umPM1 18um 18um
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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VIN 1.4 * all voltages in mV
Av 89.5 unless indicated otherwise
LABEL Id (uA) Vds Vdsat Vds-Vdsat Vgs Vth Vov
NM0 141.07 1855 629.9 1225.1 1247 496.7 750.3NM1 139.614 1247 629.6 617.4 1247 497.1 749.9PM0 141.078 644.8 460.7 184.1 1100 605.2 494.8PM1 139.614 1252 588 664 1252 604.8 647.2
Design & ImplementationDesign & ImplementationCommon Source AmplifierCommon Source AmplifierCommon Source AmplifierCommon Source Amplifier
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Transistor Final Transistor Final
NM0 600nm PM0 18umNM1 600nm PM1 18umNM2 900nm PM2 36umNM3 900nm PM3 36umNM4 3um PM4 30umNM5 3um PM5 18um
Design & ImplementationDesign & Implementation2 Stage Amplifier2 Stage Amplifier2 Stage Amplifier2 Stage Amplifier
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Vic 1.53V * all voltages in mV
Vid 2.94mV Av 20.4K unless indicated otherwise
LABEL Id (uA) Vds Vdsat Vds-Vdsat Vgs Vth Vov
NM0 4.925 1406 275.8 1110 762.8 470 292.9NM1 4.828 762.8 295.5 467.3 762.8 470.3 292.6NM2 10.01 984.2 337 647.2 984.2 649.2 335NM3 10.01 824.9 334.2 490.7 824.9 481.6 343.3NM4 140 1385 629.7 755.7 1248 497 750.5NM5 139.6 1248 629.7 617.8 1248 497.1 750.4PM0 4.925 877.1 128.2 748.9 754.6 669.7 84.92PM1 4.828 1520 126.3 1394 751.7 669.6 82.13PM2 9.753 216.8 126.9 89.9 690.9 604.5 86.38PM3 10.01 690.9 127 563.9 690.9 604.4 86.49PM4 140 1115 455.8 658.8 1094 605.1 488.9PM5 139.6 1252 588.1 664.4 1252 604.9 647.6
Design & ImplementationDesign & Implementation2 Stage Amplifier2 Stage Amplifier2 Stage Amplifier2 Stage Amplifier
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
Internal Routing MinimizedInternal Routing Minimized
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
Guard Rings as Close as PossibleGuard Rings as Close as Possible
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
Metal over Metal MinimizedMetal over Metal Minimized
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
# of contacts & vias maximized# of contacts & vias maximized
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
Consistent Routing DirectionConsistent Routing Direction
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
0.60um Width for routing Metal0.60um Width for routing Metal
0.60um0.60um
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & ImplementationNMOS TransistorsNMOS TransistorsNMOS TransistorsNMOS Transistors
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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PMOS TransistorsPMOS TransistorsPMOS TransistorsPMOS Transistors
Design & ImplementationDesign & Implementation
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Miller or 2 Stage Op-AmpMiller or 2 Stage Op-AmpMiller or 2 Stage Op-AmpMiller or 2 Stage Op-Amp
Design & ImplementationDesign & Implementation
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & ImplementationVertical Parallel-plate CapacitorVertical Parallel-plate CapacitorVertical Parallel-plate CapacitorVertical Parallel-plate Capacitor
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Compensation Capacitor 5 pFCompensation Capacitor 5 pFCompensation Capacitor 5 pFCompensation Capacitor 5 pF
Design & ImplementationDesign & Implementation
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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2 Stage Op-Amp with Compensation2 Stage Op-Amp with Compensation2 Stage Op-Amp with Compensation2 Stage Op-Amp with Compensation
Design & ImplementationDesign & Implementation
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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2 Stage Op-Amp with Probe Pads2 Stage Op-Amp with Probe Pads2 Stage Op-Amp with Probe Pads2 Stage Op-Amp with Probe Pads
Design & ImplementationDesign & Implementation
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Design & ImplementationDesign & Implementation
Miller Op-amp w/ Bond PadsMiller Op-amp w/ Bond Pads
vin-vin-
vddvdd vin+vin+
voutvoutgndgnd
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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2 Stage Op-Amp2 Stage Op-Amp2 Stage Op-Amp2 Stage Op-Amp
Design & ImplementationDesign & Implementation
Av 21.3K 21.5K
Power consumption
766.48uW 778.66uW
Parameter Schematic Layout
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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ParametersParametersParametersParameters
Gain marginGain marginGain marginGain margin
3dB bandwidth3dB bandwidth3dB bandwidth3dB bandwidth
Phase marginPhase marginPhase marginPhase margin
Gain-bandwidth productGain-bandwidth productGain-bandwidth productGain-bandwidth product
Power supply rejectionPower supply rejectionPower supply rejectionPower supply rejection
AC AnalysisAC AnalysisAC AnalysisAC Analysis
Testing MethodologyTesting MethodologyTesting MethodologyTesting Methodology
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Schematic for Gain (dB)Schematic for Gain (dB)Schematic for Gain (dB)Schematic for Gain (dB)
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Frequency ResponseFrequency Response
Comparison of gain versus frequency
-80
-60
-40
-20
0
20
40
60
80
100
1.00E+00 1.00E+02 1.00E+04 1.00E+06 1.00E+08 1.00E+10
Frequency (Hz)
Gai
n (
dB
) Miller
Telescopic
Folded
184.78Hz184.78Hz
2.16kHz2.16kHz
16.26kHz16.26kHz
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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ParametersParametersParametersParameters
Slew rateSlew rateSlew rateSlew rate
Settling timeSettling timeSettling timeSettling time
Transient AnalysisTransient AnalysisTransient AnalysisTransient Analysis
Testing MethodologyTesting MethodologyTesting MethodologyTesting Methodology
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Schematic for Settling TimeSchematic for Settling Time
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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Settling Time ComparisonSettling Time Comparison
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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BondBond WireWire ModelingModelingBondBond WireWire ModelingModeling
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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BondBond WireWire ModelingModelingBondBond WireWire ModelingModeling
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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BondBond WireWire ModelingModelingBondBond WireWire ModelingModeling
with bond wires
without bond wires
with bond wires
without bond wires
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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BondBond WireWire ModelingModelingBondBond WireWire ModelingModeling
with bond wires
without bond wires
with bond wires
without bond wires
IntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodologyIntroductionIntroduction • Project Specifications• • Project Specifications• MethodologyMethodology
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ProblemsProblems EncounteredEncounteredProblemsProblems EncounteredEncountered
• Constraints not possible to achieve in length used by previous thesis (0.5um)– Length used was 1.2um
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QuestionsQuestionsQuestionsQuestions