Global Institute of Technology

Assingement-II

III Semenster: EE &EIC

Unit –IV

1. Design a combinational circuit with three inputs and six outputs. The output binary number should be the square of the input binary number.

2. Design a minimal network that has three binary inputs and whose output represents the number of input variables having the value 1: That isInputs: (X2,X1,X0) Xi:ε{0,1}Output: Z ε{0,1,2,3}

2Function: Z=∑ Xi

I=03. Design a full subtractor using minimum number of NAND gates.4. How many 4-input multiplexers are needed to implement a 256 input multiplexers? How

many level will be there be.5. Obtain the type 1 MUX design for the following Boolean function:

F=∑m(0,3,6) +d((5,7)

6. Implement the following function using 8:1 multiplexer.F(A,B,C,D) =∑(1,2,6,7,9,11,13,15)

7. Implement the given logical using type of multiplexerF(W,X,Y,Z) =∑(0,1,3,7,9,13,15)

8. Implement a full adder circuit using two 4:1 multiplexers.9. Design a logic circuit that receives a four bit binary number of ABCD and gives an output

whenever the number is divisible by 4 or 5. Realize it by 8 X 1 multiplexer IC.10. Implement the following gates with 2-input multiplexers, assuming that complemented and

uncomplemented variables are available : 2-input OR, 2-input NOR, 3-input NAND.11. Write short note on Multiplexer.12. Write a short note on Demultiplexer.13. Write the difference between multiplexer and demultiplexer.14. Write short note on design circuit using multiplexer.15. Write the difference between encoder and decoder in brief.16. What do you mean by odd parity generation17. Design a BCD adder.18. Design a four input priority encoder.