EE 434 Lecture 11
Transcript of EE 434 Lecture 11
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EE 434Lecture 11
Process Flow
Device Modeling in Semiconductor Processes
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Quiz 5Three methods of attaching the die to a package or circuit were discussed. Give two of them.
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And the number is ….
6
31
2
45
7
8
9
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And the number is ….
6
31
2
4
5
7
8
9
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Quiz 5Three methods of attaching the die to a package or circuit were discussed. Give two of them.
Solution:
EutecticSolder PreformConductive Epoxy
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Review from Last TimeInterconnects Introduce Parasitic Capacitances
Vertical Layer to LayerC=AOLCD
Lateral Layer to LayerMore difficult to Model
DiffusionBottom (area dependent)
C=ADCDSidewall (fringe)
C=PDCDL
Back-End Processing StepsNot closely coupled with specific front-end processDicingDie AttachBondingPackaging
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Review from Last TimeInterconnects Introduce Parasitic Capacitances
Vertical Layer to LayerC=AOLCD
Lateral Layer to LayerMore difficult to Model
DiffusionBottom (area dependent)
C=ADCDSidewall (fringe)
C=PDCDL
Back-End Processing StepsNot closely coupled with specific front-end processDicingDie AttachBondingPackaging
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Basic Semiconductor ProcessesMOS (Metal Oxide Semiconductor)
1. NMOS n-ch2. PMOS p-ch3. CMOS n-ch & p-ch– Basic Device: MOSFET– Niche Device: MESFET– Other Devices: Diode
BJTResistorsCapacitorsSchottky Diode
Review from Last Time
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Basic Semiconductor Processes
1. T2L2. ECL3. I2L4. Linear ICs
– Basic Device: BJT (Bipolar Junction Transistor)– Niche Devices: HBJT (Heterojunction Bipolar Transistor)
HBT– Other Devices: Diode
ResistorCapacitorSchottky DiodeJFET (Junction Field Effect Transistor)
Bipolar
Review from Last Time
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Basic Semiconductor Processes
• Thin and Thick Film Processes– Basic Device: Resistor
• BiMOS or BiCMOS– Combines both MOS & Bipolar Processes– Basic Devices: MOSFET & BJT
• SiGe– BJT with HBT implementation
• SiGe / MOS– Combines HBT & MOSFET technology
• SOI / SOS (Silicon on Insulator / Silicon on Sapphire)• Twin-Well & Twin Tub CMOS
– Very similar to basic CMOS but more optimal transistor char.
Other Processes
Review from Last Time
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Summary of Devices by Processes• Standard CMOS Process
– MOS Transistors• n-channel• p-channel
– Capacitors– Resistors– Diodes– BJT (in some processes)
• npn• pnp
– JFET (in some processes)• n-channel• p-channel
• Standard Bipolar Process– BJT
• npn• pnp
– JFET • n-channel• p-channel
– Diodes– Resistors– Capacitors
• Niche Devices– Photodetectors (photodiodes, phototransistors, photoresistors)– MESFET– HBT– Schottky Diode (not Shockley)
– MEM Devices– ….
Review from Last Time
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Process Flow
Processing Steps Have Been Discussed
Wafer Prep, Photolithography, Deposition, Etching, Diffusion, …
Combining these Processing Steps to Make Useful Integrated Circuits constitutes a Process Flow
Each Process has a unique process flowProcess flow constitutes very valuable IP
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Basic Devices• Devices in Standard Processes
– MOS Transistors• n-channel• p-channel
– Capacitors– Resistors– Diodes– BJT (in some processes)
• npn• pnp
• Niche Devices– Photodetectors– MESFET– Schottky Diode (not Shockley)
– MEM Devices– ….
Primary Consideration in This Course
Limited Consideration in This Course
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Basic Devices and Device Models
• Resistor• Capacitor• MOSFET• Diode• BJT
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Basic Devices and Device Models
• Resistor• Capacitor• MOSFET• Diode• BJT
- Resistors and Capacitors were discussed previously in the context ofinterconnects
- Were generally considered parasitics in earlier discussions- Will now be considered as desired components- Models obviously will be very similar or identical
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Basic Devices and Device Models
• Resistor• Capacitor • MOSFET• Diode• BJT
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Resistors• Generally thin-film devices• Almost any thin-film layer can be used as a resistor
– Diffused resistors– Poly Resistors– Metal Resistors– “Thin-film” adders (SiCr or NiCr)
• Subject to process variations, gradient effects and local randomvariations
• Often temperature and voltage dependent– Ambient temperature– Local Heating
• Nonlinearities often a cause of distortion when used in circuits• Trimming possible resistors
– Laser,links,switches
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Resistor Model
V
W d
L
I
IVR =
Model:
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Resistivity
• Volumetric measure of conduction capability of a material
LR
Areais A
LAR
=ρ
for homogeneousmaterial,ρ ⊥ A, R, Lunits : ohm cm
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Sheet Resistance
R
W d
L
LRW R = ( for d << w, d << L ) units : ohms /
for homogeneous materials, R is independent of W, L, R
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Relationship between ρ and R
d WA ×=LAR
=ρ
RWA
=ρLRW R =
RxdRW
dW RWA
===ρ
Number of squares, NS, often used instead of L / W in determining resistance of film resistors
R=RNS
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Example 1
W
R = ?
L
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Example 1
W
L
SNWL
=
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Example 1
.4 8 7 6 5 4 3 2 1
R = ?
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Example 1
.4 8 7 6 5 4 3 2 1
R = R (8.4)
R = ?
NS=8.4
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Corners in Film Resistors
Rule of Thumb: .55 squares for each corner
Corner
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Example 2Determine R if R = 100 Ω /
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Example 2
1 2 3 4 5 6 .55
1 2 3 4 5 6 7 .55
1
2
3
NS=17.1R = (17.1) RR = 1710 Ω
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Resistivity of Materials used in Semiconductor Processing
• Cu: 1.7E-6 Ωcm• Al: 2.7E-4 Ωcm• Gold: 2.4E-6 Ωcm• Platinum: 3.0E-6 Ωcm• n-Si: .25 to 5 Ωcm• intrinsic Si: 2.5E5 Ωcm• SiO2: E14 Ωcm
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Temperature CoefficientsUsed for indicating temperature sensitivity of resistors & capacitors
Cppm dTdR
R1TCR
610
tempop.
°
=
This diff eqn can easily be solved if TCR is a constant
( ) ( )TCR
10TT
126
12
TRTR−
= e
( ) ( ) ( )
−+≈ 61212 10
TCRTT1 TRTR
For a resistor:
Identical Expressions for Capacitors
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Voltage CoefficientsUsed for indicating voltage sensitivity of resistors & capacitors
Vppm dVdR
R1VCR
610
voltage ref
=
This diff eqn can easily be solved if VCR is a constant
( ) ( )VCRVV
12
12
VRVR 610−
= e
( ) ( ) ( )
−+≈ 61212 10
VCRVV VRVR 1
For a resistor:
Identical Expressions for Capacitors
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Temperature and Voltage Coefficients
• Temperature and voltage coefficients often quite large for diffused resistors
• Temperature and voltage coefficients often quite small for poly and metal resistors
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Capacitance and Resistance in Interconnects
• See MOSIS WEB site for process parameters that characterize parasitic resistances and capacitances
www.mosis.org
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Basic Devices and Device Models
• Resistor• Capacitor • MOSFET• Diode• BJT
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CapacitanceC
A1
cond1 insulator
A2cond2
Parallel Plate
dAC ∈
= A = area of intersection of A1 & A2
d
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Capacitance
dC hereA wCC
areaunit CapC If ddd
∈===
Parallel Plate
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Capacitance
d pn
depletionregion
C
Junction Capacitor
dAC ∈
=
Note: d is voltage dependent-capacitance is voltage dependent-usually parasitic caps-varicaps or varactor diodes exploit
voltage dep. of C